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Biasing MSA Series RF

Integrated Circuits

Application Note S003

Bias Point Selection Both power and gain can be ad- the device is operated over
Like discrete transistors, the MSA justed by varying I d. Curves of temperature. There is no intrinsic
Series of RF Integrated Circuits typical performance as a function reliability problem associated
can be operated at different bias of bias are shown on the indi- with operation below this bias
points to achieve different perfor- vidual MSA data sheets. Table 1 level, however. The column la-
mance results. These Monolithic lists the range of bias currents beled “Guaranteed Performance”
Silicon Amplifiers have an inter- over which the various MSAs can lists the bias level at which HP
nal structure consisting of a be expected to operate. The col- specifies and tests device perfor-
Darlington connected pair of bi- umn labeled “Minimum mance. It represents a “typical”
polar transistors embedded in a Recommended Operation” repre- operating bias point. The “Maxi-
matrix of resistors. Since this sents the lowest level at which HP mum Recommended Operation”
structure is current controlled, recommends operating the MSA. column lists HP’s recommenda-
the bias point of an MSA can best Operation of the MSA below this tion for the highest level of bias
be described by specifying the to- threshold causes the IC to be par- for the MSA. In particular, signifi-
tal device current, Id. tially turned off; performance cant improvements in P1dB and
becomes unpredictable, and sta- (to a lesser extent) gain can be
bility problems can result when obtained for the MSA-06 and

Table 1. MSA Typical Operating Currents


Minimum Guaranteed Maximum Absolute Maximum
Geometry Recommended Performance (mA) Recommended (mA)
Current (mA) Current (mA)
01 13 17 25 40
02 18 25 40 60
03 20 35 50 80
04 30 50 70 85–100
0420 30 90 110 120
05 60 80 100 135
0520 80 165 200 225
06 12 16 20–25 40–50
07 15 22 30–40 60–50
08 20 36 40 80–65
09/99 25 35 45 80
10 150 325 400 425
11 40 60 70–75 80–100
20 — 32 — 50
31 — 29 — 50
2

MSA-07 geometries when oper- experience. The internal resistors this bias scheme, temperature
ated at higher currents – refer on the MSA have a temperature variations on the order of 25°C
to the product data sheets for coefficient of – 0.08%/°C; the will cause significant alterations
more information. Typically on-chip transistors increase in β in performance; temperature
operation at currents above the at a rate of +0.7%/°C. If the bias variations on the order of 75°C
“maximum recommended” level current Id is to remain constant can destroy devices by causing
yields minimal returns in terms over a broad temperature range, them to draw too much current.
of improved performance, and the bias circuitry must decrease Device-to-device variations may
causes a noticeable decrease in the device voltage Vd at higher also yield a MSA that draws an
device life expectancy. HP sug- temperatures and increase Vd at excessively high current if Vd is
gests that this value be used as an lower temperatures. fixed, even at room temperature.
upper limit when selecting device
operating point. The “Absolute A number of possible biasing Collector Bias
Maximum” column lists the value schemes are described in Stabilization Resistor
of I d beyond which catastrophic detail below. The fixed collector voltage bias
device failure can be anticipated. circuit described above can be
It represents the most current the Voltage Source On changed into a temperature-
MSA can ever be expected to Collector compensated bias circuit with the
handle without being destroyed. The simplest bias scheme avail- addition of a bias stabilization re-
able is to provide a fixed voltage sistor in the collector feed. This
In general, the maximum device to the “collector” or output termi- resistor acts as a simple feedback
current ratings are thermally lim- nal of the MSA. This voltage can element. As the temperature in-
ited. The thermal conductivity be supplied either from a voltage creases, the MSA tries to draw
properties of the 200 mil BeO (20) regulator or from a power supply. more and more current. Since
package are good enough to allow It must be provided through an this current is supplied through a
a chip mounted in this package to RFC (Radio Frequency “Choke,” resistor, the MSA bias voltage Vd
be rated significantly higher in or high-value inductor) to keep decreases as I d tries to increase:
current handling capability than the high frequency signal isolated VCC stays fixed; I d increases with
the same chip mounted in any of from the DC circuitry. A large- temperature causing the voltage
the other package options. Con- value capacitor (e.g., 1 µF) should drop I d R C across R C to increase,
versely, the thermal properties of be connected from the DC side of thus lowering Vd and “throttling
the plastic packages (04, 05, 85, the RFC to Ground to provide a back” on the bias current I d.
86, and especially 11) requires a low-impedance path to any signal
lowering of the maximum allow- that does get past the RFC. DC Note that the amount of feedback
able current. For this reason some blocking capacitors (or alterna- is proportional to the voltage drop
devices have ranges of “maximum tively transformers, if the MSA across RC, and hence to the value
recommended” and “absolute is to be operated at very low fre- of RC. For effective compensation
maximum” currents; refer to the quencies or at DC) must be used over normal operating tempera-
individual product data sheets for to isolate both the input of the ture ranges (– 25°C to +100°C),
details. The style 20 package per- MSA from the drive source and a voltage drop of at least 4 volts
formance is sufficiently different the output of the MSA from the is recommended.
to be listed separately in Table 1. load. The entire circuit is shown
in Figure 1. +
Bias Circuitry Options Vd 1 µF

Once an appropriate bias point Because of its very narrow tem- RF
CHOKE
has been chosen, circuitry must perature operating range and
RFIN MSA RFOUT
be provided to ensure that the sensitivity to Vd this bias scheme
MSA operates at that bias point. is not appropriate for most pro- Vd
INPUT OUTPUT
To be effective, this circuitry must duction circuits. It finds its major BLOCKING BLOCKING
CAPACITOR CAPACITOR
establish an appropriate bias applications in laboratory testing
point across the entire operating of devices utilizing variable power Figure 1. Fixed Collector Voltage Bias
temperature range the MSA will supplies to provide the bias. With Circuit
3

Remember that RC itself will the amplifier chip. Since devices These must provide excellent high
change in resistance as the tem- incorporating internal bias frequency grounding throughout
perature changes. By selecting a stabilization resistors require in- the entire frequency range of
bias resistor with an appropriate dependent access to the VCC port, operation. This means that large
temperature coefficient the one ground lead is given up to valued capacitors must be used
temperature compensation of make room for the extra connec- to ensure good low frequency
this circuit can be “fine tuned.” tion that must now be provided. operation (1/(2πfC)< 1 Ω at f min),
Carbon composite resistors Some high-frequency performance and that low parasitic inductance
typically have a temperature is therefore sacrificed with these capacitors must be used to ensure
coefficient of +0.10% /°C, and devices due to their increased good high frequency grounding
work particularly well as bias common lead inductance. (2πfL)< 1 Ω at f max). These re-
stabilization resistors. quirements sometimes necessitate
± Supply Bias the use of multiple bypass capaci-
A side benefit of using a bias sta- Sometimes the designer does not tors. Typically, it is not possible to
bilization resistor is that it is often have available the higher voltages avoid some degradation in gain at
of high enough impedance that an necessary to use the bias stabiliza- higher frequencies if this bias
RFC is no longer needed to keep tion resistor method described scheme is used.
the high frequency signal out of above, but does have available
the DC bias. It is recommended both positive and negative volt- Active Bias
that an RFC still be used if the ages. Under these circumstances Active bias circuitry can be used
MSA is being used near satura- the MSA may be DC “floated” and to provide temperature stability
tion; otherwise R C appears in the difference between the two without requiring the large
parallel with the load resistance voltage supplies used to voltage drop or relatively high dis-
and can cause enough of a shift provide the voltage drop neces- sipated power needed with a bias
in load impedance to reduce sary to use a stabilization resistor. stabilization resistor. A simple re-
both gain and saturated power A schematic showing this tech- alization using a resistively-biased
by 1 to 2 dB. nique is shown in Figure 3. PNP transistor as a current source
is shown in Figure 4.
The circuitry needed for a bias An RFC is needed in the path to
stabilization resistor scheme is the negative voltage supply, again In this circuit R1 and R 2 form a
shown in Figure 2. MSAs were de- to keep the RF signal separated resistive divider that establishes
signed with this bias scheme from the DC. The most critical the bias point of the PNP bias
in mind and many of the devices elements are the capacitors used transistor. R 3 provides a “bleed
are available with R C built onto to “float” the MSA. path” for any excess bias current;

R1 R2
+
VCC RC 1 µF R3
– (≅ 1 Ω)*
Id
PNP D1
+ RF 1 µF RC
VCC RC 1 µF CHOKE
– (OPTIONAL)
+
RFIN MSA RFOUT VCC
RF

V - Vd RF Vd CHOKE
RC = CC CHOKE INPUT OUTPUT
Id MSA
(OPTIONAL) BLOCKING BLOCKING RFIN RFOUT
MSA CAPACITOR CAPACITOR
RFIN RFOUT
BYPASS RF Vd
INPUT OUTPUT
Vd CAPACITOR CHOKE
BLOCKING BLOCKING
INPUT OUTPUT CAPACITOR CAPACITOR
BLOCKING BLOCKING
CAPACITOR CAPACITOR V - Vd

RC = CC V–
* (ASSUMES A 1 VOLT DROP ACROSS RC)
Id +

Figure 2. Collector Bias Stabilization Figure 3. ± Power Supplies Bias Figure 4. Active Bias Circuit
Resistor Bias Circuit Circuit
4

it is a safety feature that can be Systems requiring wide dynamic Note that this circuit works only
omitted from minimum element range operation or AGC (auto- to increase the MSA bias current
realizations of this circuit. D1 is matic gain control) often require beyond some minimum value
also an optional element; its pur- that the MSAs operate at variable established by the device’s inter-
pose is to provide temperature operating points. If R2 is made nal bias resistors and the voltage
compensation by tracking the variable, this bias scheme will Vd. If R were connected from the
voltage variation with tempera- work well for such applications. input of the MSA to ground
ture of the emitter-to-base (instead of to R C), an analogous
junction of the PNP bias transis- Current Adjust Passive circuit that would decrease bias
tor. For this reason, when it is Bias current as R was decreased in
included it is often realized using It is possible to design a simple value would result.
the E-B junction of a second PNP passive bias circuit that allows the
transistor identical to the bias designer to adjust the MSA bias Current Adjust Active
transistor, connected with its current Id while using a fixed volt- Bias
collector-base junction shorted. age power supply. This allows Figure 6 shows a circuit that
operation of the MSA at bias combines the features of adjust-
R C is a feedback element that points other than those established able (offset) bias current and
keeps I d constant. If the device by its internal bias circuitry, e.g., active bias. The “base” voltage
current starts to increase, the operation at the data sheet value applied to the MSA is set by the
voltage drop across R C also of Id but with a lower Vd than output voltage of the PNP bias
increases, turning off the E-B specified on the device data sheet. transistor. The bias applied to this
junction of the PNP transistor, The schematic for such a circuit is PNP transistor is established by
and hence decreasing the bias shown in Figure 5. the voltage divider formed by R1
voltage Vd applied to the MSA. and R 2. Adjusting the value of R 2
For best circuit operation, there This circuit works by supplying therefore determines the MSA
should be at least a 0.5 to 1 volt an external “base” voltage to the bias current I d.
drop across R C. The PNP transis- MSA that can be adjusted by using
tor is acting in the saturated mode a variable resistor, R. Decreasing R 4 is present to decrease the
with both junctions forward R will raise the voltage on the power dissipation of the bias
biased. The voltage drop needed input of the IC, and hence transistor. Given the relatively
across the emitter to collector increase its bias current. R must low “collector” to “base” voltages
junction of this transistor will be connected in series with an required to operate most MSAs,
therefore be equal to its VCE sat - RFC to prevent it from degrading this element can be omitted at
typically only several tenths of a the input impedance of the MSA. the designer’s discretion. R3 once
volt. Thus, the total voltage differ-
ence needed between VCC and Vd R1 R2
is only about 1.3 volts for this cir-
R3 R4
cuit, as compared to the 4 volts or (≅ 1 Ω)*
Id
so needed by the bias stabilization + D1
VCC RC 1 µF PNP
resistor for good bias stability RC

over temperature. +
1 µF 1 µF
VCC
V - Vd –
A side effect of the PNP bias tran- RC = CC
Id
sistor operating in the saturated RF
RF RF
CHOKE
mode is that this bias requires (OPTIONAL) CHOKE CHOKE
RFIN MSA RFOUT MSA
some extra “charge up” time at RFIN RFOUT
turn-on and “discharge” time at Vd V Vd
INPUT OUTPUT INPUT B OUTPUT
turn-off. How much extra time is BLOCKING BLOCKING BLOCKING BLOCKING
CAPACITOR CAPACITOR CAPACITOR CAPACITOR
required will depend on the time
constants of the PNP transistor. * (ASSUMES A 1 VOLT DROP ACROSS RC)

Figure 5. Current Adjust Passive Bias Figure 6. Current Adjust Active Bias
Circuit
5

again serves as a bias current An important consideration when Conclusions


“safety bleed path.” using this circuit is that it changes A variety of bias circuits that can
bias point by changing bias load be used with MSAs have been
RF chokes and bypass capacitors line, that is, it adjusts Vd and I d shown. The simplest scheme (a
are used in both “collector” and simultaneously. This circuit is constant voltage source) is not
“base” feeds to keep the DC and therefore not readily adaptable to acceptable for most applications
RF circuitry separate. situations where the designer because of poor temperature sta-
wishes to continuously vary the bility. The next simplest scheme
This circuit provides excellent operating point of the MSA. It is (the bias stabilization resistor) is
bias stability over temperature. best suited for situations where the most widely used bias method
Due to the feedback function of the designer has a specific due to its low cost and stable per-
R C, increases in Id resulting from “non-standard” bias point in mind formance over temperature. Its
rises in temperature are compen- that must be closely maintained major drawback is the relatively
sated for by a lowering of VB. This over temperature. large voltage drop required across
results from the increased voltage the stabilization resistor for good
drop across R C turning off the A saturated variant of this bias bias stability over temperature.
PNP bias transistor. results if the RFC connecting the Bias schemes that address this
output of the MSA to the emitter problem by using two power sup-
Note that the “base” current pro- of the PNP is moved to connect plies (± supply bias) or active bias
vided to the MSA by the PNP is the output of the MSA to the col- (active bias circuit) were also
much less than the “collector” lector of the PNP. Such a bias shown. Finally, bias schemes that
current of the MSA. This indicates functions as a hybrid between the allow the user to alter the MSA
that the PNP transistor is not op- active bias scheme of Figure 4 operating point from the design
erating in the saturated mode in and the current adjust passive operating point have been in-
this circuit, as it was in the active bias of Figure 5. It allows opera- cluded (current adjust passive
bias circuit described above. tion from low voltage power bias, current adjust active bias).
This circuit will therefore have a supplies (minimum voltage drop
much faster response time than required for the PNP, ability to
will the previously described raise I d by decreasing R 4) while
active bias circuit. simultaneously allowing a sweep-
ing of bias points for AGC type
operation by varying R 2.
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Data Subject to Change
Copyright © 1997 Hewlett-Packard Co.
Obsoletes 5091-6489E
Printed in U.S.A. 5965-8669E (6/97)