June 1996

Appl i cat i on Not e 42010

Theor y and Appl i cat i on of t he ML4874
and ML4876 LCD Backl i ght Cont r ol l er I Cs
1
George A. Hall
and Urs Mader
I NTRODUCTI ON
The ML4874 and ML4876 are high performance backlight
and dimming controller integrated circuits specifically
designed to control miniature cold-cathode fluorescent
lamps (CCFLs) for portable computing and instrumentation
equipment.
These devices are designed to achieve high efficiency as
well as high application flexibility. Some of the key
features are:
Low Standby Current (<10A)
Differential Output Lamp Driver
Up to 30% Less Power for Same Light Output
Allow Use of all N-channel FETs
Resonant Threshold Detect (RTD) Switching
Regulated lamp current by means of a buck switching
converter which is synchronized to the lamp driver
frequency for flicker free operation. The duty cycle is
capable of operating from 0% to 100%.
Uses off the shelf power components including
magnetic components.
Improved Efficiency (95%)
Surface mount SSOP package of this circuit is available
for space economy.
FUNCTI ONAL BLOCK DI AGRAM
All controllers in this series consist of two main functional
blocks.
A buck current regulator block that controls the lamp
current.
A current fed lamp driver block that uses a self-
synchronizing scheme for low loss resonant threshold
detect switching (RTD), and facilitates flicker free
dimming.
The simplified block diagram of the ML4874 is shown in
Figure 1. The timing of the circuit is controlled by setting
the frequency of the oscillator by components connected
to pins 4 and 9 and ground. For ML4876, only pin 9 is
used for C
T
. R
T
is built-in internally. See Figure 14. For
ML4874, there is a zener diode at pin 2 to set the voltage,
whereas the ML4876 does not have this feature.
AZR VDD
LI NEAR
REGULATOR
MASTER
BI AS
& UVLO
HVDD
VREF
ON/ OFF
PGND GND NC RT CT
SS CAP
LEA
LEA OUT
L I LI M
L GATE2
L GATE1
L RTD
B ON B OFF B SYNC OUT
+

OSCI LLATOR
RESONANT
THRESHOLD
DETECTOR
0.2V
0.5V
S
Q
Q
R
VDD
ONE
SHOT
NEG
EDGE
DELAY
16V
CLK
13 2 19 20 11
10
14
16
6
8
7
3
9 4 1 18 17
15
5
12
+

DR1 DR1 DR3

Q
Q R
S
T
Q
Q
DR2
DR2
Fi gur e 1. Bl ock Di agr am of t he ML4874.
REV. 1.0 10/25/2000
2
Appl i cat i on Not e 32
The frequency of the pre-regulator stage and the contrast
regulator stage are synchronized with the inverter circuit
which share a common oscillator. This feature helps to
Fi gur e 3. Bl ock Di agr am of ML4876.
VDD
LI NEAR
REGULATOR
MASTER
BI AS
& UVLO
Q
Q R
S
HVDD
ON/ OFF
VREF
FEA OUT CT LEA OUT
LEA
L GATE2
L GATE1
L RTD
B ON B OFF B SYNC OUT
+

OSCI LLATOR
RESONANT
THRESHOLD
DETECTOR
+

0.2V
+

S
Q
Q
R
VDD
T
Q
Q
DR1 DR1
ONE
SHOT
DR3
NEG
EDGE
DELAY
DR2
16V
CLK
LON
F GATE
F I LI M
FEA
FEA+
GND
0.5V
Q
R
S
+

0.1V
+

13 17 18 19 11
14
16
7
8 9 1
3
2
20
12
6
15
5
4
DR2
10
reduce possible RFI and the effect of the walking lines
across the LCD screen. The operating frequency of the
buck and the contrast regulator is twice that of the CCFL
current frequency.
Fi gur e 4. C
T
Sel ect i on t o Set Fr equency f or ML4876.
200KHz
100KHz
70KHz
50KHz
40KHz
30KHZ
20pF 30pF 40pF 50pF 70pF 100pF 200pF
F
R
E
Q
U
E
N
C
Y

CT
200KHz
100KHz
70KHz
50KHz
40KHz
30KHz
20K 30K 40K 50K 70K 100K 200K
F
R
E
Q
U
E
N
C
Y

RT
C

=

3
0
p
F

C

=

4
6
p
F

C

=

8
1
p
F

C

=

1
2
0
p
F

Fi gur e 2. R
T
and C
T
Sel ect i on t o
Set Fr equency f or ML4874.
REV. 1.0 10/25/2000
3
Appl i cat i on Not e 32
SI MI LARI TI ES AND DI FFERENCES BETWEEN
THE ML4874 AND THE ML4876
Si mi l ar i t i es
They are both high-efficiency differential backlight drivers,
with low standby current (<10A).
The buck regulator with synchronous rectification and
resonant threshold detection are also common features.
Di ff er ences
The basic differences between the two controllers are
tabulated below:
ML4874 ML4876
No Contrast Contrast Control
Zener (Pin 2) No Zener
R
T
and C
T
Pins Only C
T
Pin
Separate input for Both functions
lamp current feedback share one pin
and current limit
L
ON
pin for L
ON
and ON/OFF
lamp only pins
Soft Start Pin No Soft Start
DESCRI PTI ON OF THE LAMP I NVERTER CI RCUI T
The lamp inverter circuit is comprised of the current
regulating buck converter and the current-fed Royer-type
inverter. The buck converter controls the magnitude of
lamp current. This feature is instrumental in providing
dimming control. The simplified equivalent electrical
schematic of the driver section is shown in Figure 5. Due
to the presence of L
1
, the circuit shown in Figure 5 is
essentially a current fed parallel loaded parallel resonant
circuit, which can be further simplified to that shown in
Figure 6.

I C
4 x CR
Lm
T1
1:N
2 x C
O UT
RL
2
Fi gur e 6. Si mpl i f i ed Lamp Dr i ver Ci r cui t .
L
m
is the magnetizing inductance of the inverter
transformer, which tunes with the resonant capacitor C
R
to set the resonant frequency of the inverter. The oscillator
frequency of the ML874/76 is set lower than the resonant
frequency to ensure synchronization.
The current source labeled I
C
in Figure 6 is a conceptual
current source which models the function of L
1
. Since the
circuit always operates at resonance the impedance seen
by the above current source is resistive and equal to the
transformed impedance of the lamp which is given by the
formula below:
R
V
I
L
L
L

(1)
where V
L
is the operating voltage of the lamp at full
brightness and I
L
is the lamp current.
In most cases the value of the ballasting capacitor C
OUT
is chosen such that its reactance is approximately equal to
the lamp resistance R
L
. The two capacitors C
OUT
are used
to simulate two separate current sources, so that current
will share between the lamps. The typical value for R
L
is
100K. For a typical operating frequency of 50kHz, C
OUT
yields a capacitive reactance of approximately 100K. The
best choice for this capacitor therefore lies between 27
to 33pF.
OPERATI NG WAVEFORMS OF
THE LAMP DRI VER SECTI ON
Figure 7 shows some of the waveforms present in critical
parts of the circuit. Refer to Figure 8.
SO URCE O F
U2-A
T1-CNTR-PRI
DRAI N-Q 3
L GATE2
DRAI N-Q 4
L GATE1
CT
CLO CK
Fi gur e 7. Oper at i ng Wavef or ms of t he
Lamp Dr i ver Sect i on.
Fi gur e 5. Si mpl i f i ed Lamp Dr i ver Ci r cui t .
The simplification in Figure 6 assumes that two lamps are
operating in parallel. If one lamp is used then the original
output ballast capacitor value should be used in the
calculations.
T1
CO UT
L
A
M
P
1

L
A
M
P
2

CO UT

CR
Q 1 Q 2
Lm Lm
T1
1:N
I C
REV. 1.0 10/25/2000
4
Appl i cat i on Not e 32
OSCI LLATOR
The oscillator frequency is set externally through R
T
and
C
T
for ML4874, and C
T
only for ML4876 (R
T
is a resistor
of 82K integrated on the chip). The equation below
gives the relationship between frequency and timing
components. This frequency should be set below the
resonant frequency of the inverter. See Figures 2, 4 and 8.
f
R C
OSC
T T

1
3 51 .
(2)
Under steady state conditions, the oscillator frequency
will be locked to twice the natural frequency of the lamp
inverter resonant frequency. The lower bound on the
resonant frequency (that will be used to calculate the
oscillator timing components) can be calculated by using
the following formula:
f
L C nN C
MIN
m R OUT

+
( )
1
2 4
2

(3)
Fi gur e 8. Typi cal Appl i cat i on Schemat i c f or t he ML4874.
DR1 DR1 DR3
DR2

+
T
Q
Q Q
Q
S
R
NEG
EDGE
DELAY
ONE
SHOT

+
0.2V

+
16V
RESONANT
THRESHOLD
DETECTOR
OSCI LLATOR
CLK
NC
RT CT
C5 R2
82K
47pF
SS CAP
C2
0.1F
ON/ OFF
Q
Q R
S
MASTER
BI AS
& UVLO
LI NEAR
REGULATOR
C3
0.1F
GND PGND
VREF
HVDD
5.0 TO 18V
I N
C7 C8
R1
C9 C1
VDD
VDD AZR
Q1
U2-A
T2
D1
Q2
B ON B OFF B SYNC
U2-B
L RTD
L GATE1
L GATE2
L I LI M
LEA OUT
LEA
C4
0.047F
R5
0.5
R3
100K
R4
1.6M
BRI GHTNESS
ADJUST
0.5V
C6
0.1F
Q3 Q4
T1
C11
39pF
L1
100H
R6
4.3K
L
A
M
P

2 13 19 20 11
12
5
10
14
16
6
8
7
3 9 4 1 18 17
15
DR2
* OPTI ONAL
SEE NOTE
OPTI ONAL OR
* NOTE: USED FOR I NPUT VOLTAGES
GREATER THAN 18 VOLTS
REV. 1.0 10/25/2000
5
Appl i cat i on Not e 32
Where n is the number of lamps at the output with
ballasting capacitors C
OUT
, N is the secondary to primary
turns ratio of T
1
, L
m
is the primary inductance of T
1
and
C
R
is the capacitance across the primary. Based on this
information the oscillator free running frequency is set to
approximately 10% to 15% lower than twice the
minimum frequency of the resonant tank.
C
L C nN C
R
T
m R OUT
T

+
( )
4
2
(4)
R
L C nN C
C
T
m R OUT
T

+
( )
4
2
(5)
Example Calculation for ML4874:
L
m
= 12 x 10
6
C
R
= 0.1 x 10
6
C
T
= 47 x 10
12
n = 1
C
OUT
= 39 x 10
12
N = 135
f
L C nN C
kHz
m R OUT

+
( )

1
2 4
43
2

(6a)
R
L C nN C
C
k
T
m R OUT
T

+
( )

4
78
2
(6b)
The natural frequency of the resonant tank will increase as
the lamp(s) are dimmed. The upper bound of this increase
can be estimated by the formula below:
f
L C
MAX
m R

1
4
(7)
For the previous example this will be:
L
m
= 12 x 10
6
C
m
= 0.1 x 10
6
f
L C
kHz
MAX
m R

1
4
72

(8)
Thus the lowest operating frequency will be at full
brightness.
REFERENCE VOLTAGE
The reference voltage is 2.5 volts t2%. To guard against
noise, it is advisable to connect a 0.1F capacitor across
the reference to ground. This precise reference voltage
helps to stabilize the brightness and contrast from unit
to unit.
BUCK REGULATOR AND GATE DRI VE CI RCUI T
The ML4874/76 design is based on a 5V BiCMOS
process to obtain the highest possible efficiency and size
economy. The buck converter power MOSFET switch,
U
2A
is driven by a special gate drive circuit (see Figure 14).
This drive circuit consists of T
2
, D
2
and Q
3
. T
2
has the
dual function of isolating the drive signal and stepping up
its voltage for adequate enhancement of U
2A
. T
2
is a
standard surface mount transformer that can be obtained
from many coil manufacturers. The ML4874/76 has been
designed such that a short duration (approx. 150ns)
voltage pulse is applied to T
2
. This pulse charges the gate
of U
2A
. The charge is trapped at the gate by D
2
until the
end of the ON-time at which point the gate of U
2A
is
discharged by Q
3
. This drive technique enables the
ML4874/76 to control power at voltages that are higher
than its own maximum operating voltage rating of 5V.
The gate drive transformer requirements are listed below:
Leakage inductance <300nH
Primary magnetizing inductance >3H.
SELECTI ON OF THE BUCK I NDUCTOR (L1)
The inductor plays a central role in the proper operation
of the inverter circuit.
To find the inductor value it is necessary to consider the
inductor ripple current. The following formula gives the
inductor peak to peak current ripple for when V
TP
<V
IN
.
i
V
f L
COS
V
V
For V V
Lp p
tp
OSC B
TP
IN
TP IN
+

_
,

1
]
1
1
2
1 2

<
(9)
Where: i
Lp-p
is the peak to peak inductor current, V
IN
is
the supply voltage, V
TP
is the peak voltage at the tab of T
1
(the waveform at this point is a full wave rectified
sinewave), f
OSC
is the inverter operating frequency, and L
B
is the inductance of the buck regulator.
Normally the inductor peak to peak ripple current is
chosen to be a small fraction of the overall DC current
level. However, the circuit continues to function adequately,
when this ripple is as large as the DC current. Ripple
currents larger than the DC current will lead to larger-
sized inductors due to the high peak currents with large
ripple.
If we define the percentage of ripple in the inductor as:
% ripple =
i
i
Lp p
Lave

, then L
B
is given by the following
equation.
L
ripple
V
f P
COS
V
V
B
TP
OSC MIN LMAX
TP
INMAX
+

_
,

1
]
1
1
1
2 2
1
2
2
%

(10)
x
REV. 1.0 10/25/2000
6
Appl i cat i on Not e 32
Where: P
L
is the maximum lamp power (if more than one
lamp is used then P
L
is the total consumption of all the
lamps). The above equation is set up to give the worst
case value for L
B
. Choosing % ripple to be 66% minimizes
the LI
2
rating for the inductor.
Example:
V
IN MAX
= 12 Volts, P
L
= 2 Watts
f
OSC MIN
= 55 kHz, V
TP
= 7.2 Volts
L
V
kHz W
COS
V
V
H
B

( )

+

_
,

1
]
1

7 2
0 66 2 2 55 2
1 2
7 2
12
109
2
.
.
.

(11)
In this case the calculated inductor value is 109H. A
standard 100H inductor was used in the application
circuit. If core loss is a problem, increasing the inductance
of L
B
will help.
I NVERTER TRANSFORMER (T1)
The inverter transformer T1 also has a dual role. Besides
stepping up the low voltage to a higher value suitable for
the operation of the lamp(s), it is also part of the resonant
circuit. The magnetizing inductance of this transformer is
the resonating inductor. This transformer is an off the shelf
part available from different coil manufacturers. The
inverter transformer used in the example circuit is capable
of driving one 2W lamp with a start voltage of 1.5KV.
RESONATI NG CAPACI TOR
(C6 FOR ML4874, C12 FOR ML4876)
Typically, the value of this capacitor falls between 0.047F
to 0.22F, depending on the frequency and power level. It
should be a low tolerance (t5% typical) low loss type
component. A polypropylene or equivalent type capacitor
should perform quite well. Some polyester film types may
also be suitable for this application.
When used with the above-mentioned inverter
transformer with the two lamps at full brightness, a 0.1F
capacitor yields an approximate operating frequency of
48kHz.
CURRENT LI MI T CI RCUI T OF THE BUCK CONVERTER
The buck regulator current control circuit utilizes peak
current sense for shutting down the FET instantaneously
under over current conditions. The sense resistor is
comprised of several resistors in parallel to obtain the
desired value.
DI MMI NG OF THE CCFL LAMPS
Dimming is accomplished by summing a DC current to
the inverting input of the error amplifier (pin 7). When a
voltage is available instead of current then a resistor can
be used.
Figure 8 shows such an arrangement. The 1.6M resistor
connected to pin 7 that goes to brightness adjust control
serves this purpose. There are several ways of generating
the Brightness Adjust voltage. The simplest method is by
using a potentiometer as shown in Figure 9.
100K
TO BRI GHTNESS ADJUST
VDD (5V)
Fi gur e 9. Di mmi ng Vol t age Gener at i on.
In the event that the control signal is a PWM modulated
digital signal, the circuit shown below may be used.
PW M
C
PW M
TO BRI GHTNESS ADJUST
RPW M
T
Fi gur e 10. Di mmi ng Vol t age Gener at i on
usi ng a PWM Si gnal .
If the PWM signal frequency is high compared to the
bandwidth of the control loop, then it is possible to
use the circuit of Figure 10 without the added R
PWM
and C
PWM
.
For proper operation, however, the following criterion
must be met:
C
T
R
PWM
PWM

3
(12)
Another method that can be used for dimming is by using
a digital up down counter. In this method two push button
type switches are used to selectively route the clock pulse
either to UP count port or the DOWN count port. On
initial turn-on the circuit requests full brightness. This can
be changed by tying pins 12, 13, 19 and 20 of the counter
chip to ground. In this condition the circuit will request a
full dim condition. Resistors R
A
, R
B
, R
C
and R
D
are chosen
to provide the required current to the brightness control
input. These resistors are chosen to have the 8:4:2:1 ratio
for approximately 16 levels of brightness control. For a
higher control resolution, an eight bit counter can be used.
REV. 1.0 10/25/2000
7
Appl i cat i on Not e 32
Fi gur e 13. Posi t i ve Cont r ast Vol t age Gener at or
Ci r cui t f or ML4876 onl y.
Fi gur e 12. Negat i ve Cont r ast Vol t age Gener at or
Ci r cui t f or ML4876 onl y.
CO NTRAST
ADJUST
0.1F
R2
130K
R1
1.6M
20V
O UT
CO NTRAST
5.0 TO 18V
I N
100H
22
100H
0.47nF
10F
5V
I N
R3
200K
47pF
C
T
M
L
4
8
7
6

VDD
F GATE
F I LI M
FEA 0
FEA
FEA +
VREF
0.5
+
0.1
200K
13
12
20
1
2
3
5
9
CO NTRAST
ADJUST
R2
200K
R1
1.6M
20V
O UT
CO NTRAST
5.0 TO 18V
I N
100H
22
100H
0.47nF
10F
5V
I N
R3
200K
47pF
CT
M
L
4
8
7
6

VDD
F GATE
F I LI M
FEA 0
FEA
FEA +
VREF
200K
0.1F
0.5
+
Fi gur e 11. Di mmi ng Vol t age Gener at i on usi ng a Di gi t al UP/ DOWN Count er.
1 3 19
9 13
HC193
UP/ DOWN
COUNTER
P RESET
(INVERT FOR ACTIVELOW)
RD
VDD
TO BRIGHTNESS
ADJUST
CLOCK
DIM
BRIGHT
VDD
R
C
RA
RB
REV. 1.0 10/25/2000
8
Appl i cat i on Not e 32
CONTRAST VOLTAGE GENERATOR SECTI ON
(ML4876 ONLY)
The ML4876 contains the necessary control circuitry to
implement a positive or negative voltage for the LCD
contrast control function. This controller is synchronized
to the master clock of the circuit.
To generate a negative voltage the regulator can be
configured as a flyback regulator. Figure 12, shows the
negative contrast voltage control regulator configuration.
The output voltage of the regulator can be calculated by
the following formula:
V V
R
R
R
R
V
OUT REF
+ +

_
,

1
2
1
2
1
(13)
Where: V
REF
= 2.5V, V
OUT
is the negative contrast output
voltage and V

is the voltage at the inverting pin of the

error amplifier (pin 6).
When V

= 0V the output voltage can be calculated:

V V
R
R
OUT REF

1
2
(14a)
Example: R
1
= 1.6M, R
2
= 200K
V
M
k
V
OUT
2 5
1 6
200
20 .
.
(14b)
To generate a positive contrast control voltage the
regulator can be configured as shown in Figure 13.
The output voltage of the regulator can be calculated by
the following formula:
V V
R
R
OUT REF
+

_
,

1
1
2
(15)
SELECTI ON OF THE FLYBACK TRANSFORMER
The flyback transformer used in this application is an off
the shelf item manufactured by various manufacturers.
Depending on the output current other parts can be
selected for optimum efficiency.
If the range of contrast control voltage is not very wide,
the positive contrast voltage can be obtained from the
boost configuration directly, thus eliminating one of the
windings from Figure 13. If the contrast control voltage is
required to adjust to zero, then the additional winding
must be used.
LAMP OUT DETECT
When there is no lamp in the socket, the output voltage
will tend to rise to a high level anticipating the start of an
actual lamp. This condition is detected by a resistor (R
6
for
ML4874, R
8
for ML4876) which is connected to L RTD
(pin 10). When the voltage rises above 16 volts at pin 10,
the controller will shut down.
To accommodate different lamp types, sometimes it is
desirable to have a voltage higher than 16 volts at the
center-tap of the transformer. In this event, another resistor
(R17, not shown) can be added between pin 10 and
ground to form a voltage divider. The resultant voltage at
pin 10 (L RTD) will be:
V V
R
R R
PIN CENTER TAP 10
17
17 8

+
(16)
For applications that do not favor the shutting down of the
controller, the output voltage can be limited by installing
the following circuit, with terminal 1 connected to the
center-tap of the transformer and terminal 2 connected to
the junction of R
6
and R
7
(see Figure 14): ML4876 only.
1 2
100K V
Z
When the voltage exceeds the designed value, the zener
will breakdown and provide an additional feedback signal
to lower the gain of the controller, thus limiting the output
voltage.
REV. 1.0 10/25/2000
9
Appl i cat i on Not e 32
Fi gur e 14. Appl i cat i on Schemat i c f or t he ML4876.
R3
100K
C11
0.1F
R2
1.6M
D1
T3
I NPUT +5 t o +18V
R12
+
C1
22F
25V
CO NTRAST
VO LTAGE
20V M AX.
(ADJUSTABLE)
C2
22F
25V
C3
1.0F
Q 1
Q 2
R1
750K
5V REF
+
+
C4
10F
16V
C9
0.1F
D2
1N4148
U2-A
U2-B
C8
0.1F
Q 3
M L4876
20 19 18 17 16 15 14 13 12 11
10 9 8 7 6 5 4 3 2 1
R4
200K
C5
0.47F
R5
200K
CO NTRAST
ADJUST
LO N O N/ O FF
C7
47pF
C6
47F
BRI GHTNESS
ADJUST
R7
1.6M
R6
200K
R8
4.3K
R16
Q 4 Q 5
L
A
M
P

C10
39pF
1KV
C12
0.1F
T1
L1
NO TE 1
R1, D3, Q 2 ARE O PTI O NAL AND ALLO W S A BATTERY
VO LTAGE RANGE FRO M +7 TO +28V. REM O VI NG THESE
CO M PO NENTS AND CO NNECTI NG DI RECTLY TO THE
I NPUT VO LTAGE ALLO W S +5.0 TO +18V.
D3
10V
T2
NO TE 1
REV. 1.0 10/25/2000
10
Appl i cat i on Not e 32
PARTS LI ST OF A TYPI CAL ML4874
BACKLI GHT CI RCUI T
All parts are SMD unless otherwise noted.
QTY. DESCRI PTI ON VENDOR/ REV./
PARTS I SSUE
Resi st or s (All resistors are 1/4 watt)
2 1.6M 5% 1206 R1, R4
1 82K 5% 1206 R2
1 100K Ohm 5% 1206 R3
2 1.0 Ohm 5%, 2 in parallel 1206 R5 (X2)
1 4.3K 5% 1206 R6
Capaci t or s
1 33F 6.3VDC Tantalum Nichicon C1
(F930J3366MC)
1 22F 25VDC Tantalum Nichicon C7
(F931D226MN)
5 0.1F 50VDC 1206 C2, C3,
C8, C9
1 47pF 50VDC 0603 C5
1 0.1F 63VDC Polyester WIMA MKS-2 C6
(or equal)
leaded
1 0.047F 50VDC 0805 C4
1 39pF 1KV leaded C11
1 1F/50V 1206 C10
QTY. DESCRI PTI ON VENDOR/ REV./
PARTS I SSUE
Semi conduct or s
1 1N4148 RLS4148-LL34 D1
2 2N7002 SOT-23 Q1, Q2
1 MMFD2N02E SO 08 U2
Dual FET
1 MMFT3055ELT1 MOSFET Q3, Q4
SOT-223
Magnet i cs
1 EPS136 #6345-020 Sumida T1
or CTX210655-1 Coiltronics
1 CP-4LBM 5201-JPS-021 Sumida T2
1 CTX100-4 Coiltronics L1
or CDR105 Sumida
Lamp
1 LFOM2476 Sharp
Har dwar e
6 Header pins 0.025 sq. posts
REV. 1.0 10/25/2000
11
Appl i cat i on Not e 32
PARTS LI ST OF A TYPI CAL ML4876
BACKLI GHT CI RCUI T
All parts are SMD unless otherwise noted.
QTY. DESCRI PTI ON VENDOR/ REV./
PARTS I SSUE
Resi st or s (All resistors are 1206 unless otherwise noted)
2 1.6M R1, R2
1 200K R3
2 200K R4, R5
1 4.3K R8
6 1.0 Ohm (resistors in parallel) R9, R10,
R11, R12
R13, R14,
(R15, R16
Optional)
1 200K 0805 R6
1 1.6M 0805 R7
The following are on the break-off board
2 10K Carbon, 10%, Leaded R/PU (X2)
1 User selectable, Leaded R Load
2 20K (Bourns 3352 Series, R-POT (X2)
or similar)
Capaci t or s
2 22F/25VDC Tantalum Nichicon C1, C2
(F91E226MN)
1 1.0F/50VDC 1206 C3
1 10F/16VDC Tantalum Nichicon C4
(F931C106MB)
2 0.047F/50VDC 0805 C5, C6
1 47pF/50VDC 0603 C7
3 0.1F/50VDC 1206 C8, C9,
C11
1 39pF/1KV Ceramic Disk Leaded C10
1 0.1F/63VDC Leaded C12
(WIMA MKS2)
QTY. DESCRI PTI ON VENDOR/ REV./
PARTS I SSUE
Di odes
2 1N4148 RLS4148- D1, D2
LL34
1 Zener 10V LL34 D3
Tr ansi st or s
2 2N7002 SOT-23 Q2, Q3
3 MMFT3055ELT1 MOSFET Q1, Q4
SOT-223 Q5
1 MMFD2N02E Dual FET U2
S008
Magnet i cs
2 CTX100-1 Coiltronics L1, T3
or CDR105 Sumida
1 EPS136 #6345-020 Sumida T1
or CTX210655-1 Coiltronics
1 CP-4LBM 5201-JPS-021 Sumida T2
or Ferrite Bead 1Turn:2 Turns
REV. 1.0 10/25/2000

LIFE SUPPORT POLICY

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

2000 Fairchild Semiconductor Corporation