EE353Chap4-1 0

Chapter 4 : Instruction Set for 8086
By Dr. Ridha Jemal

Electrical Engineering Department College of Engineering King Saud University 4.1. Data Transfer Instructions 4.2. Arithmetic Instructions 4.3. Logic Instructions 4.4. Comparison Instruction 4.5. Jump Instructions
Dr. Ridha Jemal
EE353: Introduction to Microprocessor
Data Transfer Instruction

Mov Instruction: This instruction is well studied Push and Pop Instructions: The data is transferred according tot the LIFO (Last In First out) The Push instruction transfers two bytes to the top of the stack.
Ex: PUSH CX
; [ss:SP-1] CH
; [ss:SP-1] CL ; SP SP-2
PUSH reg16 PUSH seg PUSH mem PUSHA PUSHF
PUSH BX PUSH DS PUSH [DI+2] PUSHA PUSHF
16-bit register Segment register memory Save all 16-bit registers Save flags
PUSHA instruction pushes all the internal registers onto the stack in the following order: AX, CX, DX, BX, SP, BP, SI, DI. The value of the SP is that before the PUSHA instruction. The PUSHF (push flag) instruction copies the contents of the flag register to the stack.
Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432 2

Push Instruction:
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EE353: Introduction to Microprocessor 1431-1432

The operation of PUSHA instruction showing the locations and stack data (push flag) instruction copies the contents of the flag register to the stack.
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PoP Instruction:
It performs the reversion operation of the PUSH instruction.
Ex1: POP BX
BL [ss:SP] BH [ss:SP+1] SP SP+2 Ex2:MOV AX, 7C3DH PUSH AX POP BX Int 3
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XCHG Instruction:
It performs a register-to-register or register-to-memory swap. operation of the PUSH instruction.
Ex: XCHG AX,BX

XCHG AL,AH
; AX BX ; AL AH
XCHG [SI],DX ;[DS:SI] DX
LAHF and SAHF Instruction:

LAHF LAHF ; AH Flags Low ; Flags Low AH
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Ex: XMOVCHG AX,BX; AX BX
XCHG AL,AH ; AL AH XCHG [SI],DX ;[DS:SI] DX
LAHF and SAHF Instruction:

LAHF LAHF ; AH Flags Low ; Flags Low AH
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LDS and LES Instruction:
LDS: Load memory double word into word register and DS. LES: Load memory double word into word register and ES. LDS and LES load a 16-bit register with offset address retrieved from a memory location then load either DS or ES with a segment address retrieved from memory. LDS BX,word ptr [SI] BL [SI], BH [SI+1] DS [SI+3:SI+2] in the data segment LES BX,word ptr [SI] BL [SI], BH [SI+1] ES [SI+3:SI+2] in the extra segment
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This instruction transfers the 32-bit number, addressed by DI in the data segment, into the BX and DS registers. LDS and LES instructions obtain a new far address from memory. offset address appears first, followed by the segment address This format is used for storing all 32-bit memory addresses. A far address can be stored in memory by the assembler.
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STRING DATA TRANSFERS
o o o o Instructions for moving large blocks of data or strings. Five string data transfer instructions: LODS, STOS, MOVS, INS, and OUTS. Each allows data transfers as a single byte, word, or double word. Before the string instructions are presented, the operation of the D flagbit (direction), DI, and SI must be understood as they apply to the string instructions.
The Direction Flag

o The direction flag (D, located in the flag register) selects the autoincrement or the auto-decrement operation for the DI and SI registers during string operations. It is used only with the string instructions o The CLD instruction clears the D flag and the STD instruction sets it . CLD instruction selects the auto-increment mode and STD selects the autodecrement mode .

DI and SI During execution of string instruction, memory accesses occur through DI and SI registers. DI offset address accesses data in the extra segment for all string instructions that use it SI offset address accesses data by default in the data segment Setting the Direction Flag
Two instructions used:
STD: set direction flag so that the pointers are auto decremented.
CLD: clear direction flag so that the pointers are auto incremented.
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STOS Instruction:
Stores AL or AX at the extra segment memory location addressed by the DI register; if DF = 0, increment DI, else decrement DI. STOSB ES:[DI] AL IF DF=0, DI DI+1 IF DF=1, DI DI-1
STOSW ES:[DI] AL ES:[DI+1] AH IF DF=0, DI DI+2 IF DF=1, DI DI-2
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Repeat Prefix Preceding the string instructions STOS or MOVS with REP causes these instructions to be repeated a number of times equal to the contents of CX register. REP STOSB ; STOSB ; CX CX-1 (repeat until CX = 0)
EXAMPLE For STOSB Instruction

ORG 100 LEA DI, Table1 ; Point to the offset of Table1 MOV AL,12h ; Put 12H in the AL MOV CX,5 ; number of values to be stored in Table 1 REP STOSB RET Table 1 db 6 dup (?) After the execution, Table1 contains 5 values of 12H 12h 12h 12h 12h 12h 00
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LODS Instruction:
Loads AL or AX with the data stored at the data segment memory location addressed by the SI register; if DF = 0, increment SI, else decrement SI LODSB AL DS:[SI] IF DF=0, SI SI+1 IF DF=1, SI SI-1
LODSW AL DS:[SI] AH DS:[SI+1] IF DF=0, SI SI+2 IF DF=1, SI SI-2
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EXAMPLE For LODSB Instruction
ORG 100 LEA SI, Table2 ; Point to the offset of Table2 MOV CX,5 ; number of values to be loaded from Table 2 REP LODSB RET Table2 db 1,2,3,4,5,6,7 After the execution, Table1 contains AL contains 35h which is the ASCII code of 5
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MOVS Instruction:
Transfers data from a memory location to another. This is the only memory-tomemory transfer allowed. The MOVS instruction transfer a byte or a word from the data segment location addressed by the SI to the extra segment location addressed by the DI. The pointers then increment or decrement according to DF. MOVSB ES:[DI] DS:[SI] IF DF=0, SI SI+1 DI DI+1 IF DF=1, SI SI-1 DI DI-1 MOVSW ES:[DI] DS:[SI] ES:[DI+1] DS:[SI+1] IF DF=0, SI SI+2 DI DI+2 IF DF=1, SI SI-2 DI DI+2
EE353: Introduction to Microprocessor 1431-1432 20
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XLAT Translate Instruction Operation: AL AL+BX+DS*16 Affected Flags : None
o Converts the contents of the AL register into a number stored in a memory table. o Performs the direct table lookup technique often used to convert one code to another .
An XLAT instruction first adds the contents of AL to BX to form a memory address within the data segment.
o Copies the contents of this address into AL. o Only instruction adding an 8-bit to a 16-bit number.
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Example for XLAT Instruction
Assume DS=0300H, BX=0100h and AL=0DH ODH represents the ASCII code of the character CR. The execution of XLAT replaces the contents of AL by the content of the memory location with the physical address:
PA
= DS*16+BX +AL = 03000+0100+0DH=0310DH
Thus AL [0310DH]. Assuming this memory locations contains 52H (EBCDIC code for CR) this value is placed in AL. Thus = 52H Performs the direct table lookup technique often used to convert one code to another .
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The operation of the XLAT instruction at the point just before 6DH is loaded into AL
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INS OUTS Instructions Assume that one needs a table for the values of x2, where x is between 0 and 9. First the table is generated and stored in memory: square DB 0,1,4,9,16,25,36,49,64,81
MOV BX,OFFSET square MOV AL,05 XLAT
; Load the offset address ; AL=05 will retrieve 6th element ; Pull out of table the element ; Put in AL
After execution of this program, the AL register will have 25 (19H)
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INS OUTS Instructions An IN instruction transfers data from an external I/O device to AL or AX. An OUT instruction transfers data from AL or AX to an external I/O device. The I/O device address is called port address. In direct addressing mode the address is a single byte. In indirect addressing mode the address is two bytes in DX Ex: IN AL,2EH IN AX,26H IN AL,DX IN AX,DX ; ; ; ; ; ; AL AL AH AL AL AH port port port port port port 2EH 26H 27H DX DX DX+1
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INS OUTS Instructions An IN instruction transfers data from an external I/O device to AL or AX. An OUT instruction transfers data from AL or AX to an external I/O device. The I/O device address is called port address. In direct addressing mode the address is a single byte. In indirect addressing mode the address is two bytes in DX
Ex: OUT 2EH,AL ; Port 2EH AL

OUT 2EH,AX ; Port 2EH AL ; Port 2EH AH OUT DX,AL ; Port DX AL
OUT DX,AX ; Port DX AL ; Port DX+1 AH
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Arithmetic Instructions : Basic Instructions (+, -, *, /)

ADD Instruction:
Ex: MOV MOV ADD ADD AX,32FAh BX,1F02h AL,BL AL,5
ADD Dest, Source
Dest S o u r c e + D e s t; F l a g b i t s a r e a f f ected
INC (Increment by 1) Instruction:

Ex: MOV AX,67f2h INC AL INC AH
INC Dest
Increment instruction (INC) adds 1 to a register or a memory location. The INC can add 1 to any register or memory location, except a segment register. With indirect memory increments, the size of the data must be described by using the BYTE PTR or WORD PTR directives. The reason is that the assembler program cannot determine if, for example, the INC [DI] instruction is a byte-, or word -sized increment.
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Arithmetic Instructions : Basic Instructions (+, -, *, /)

Increment instructions affect the flag bits except the carry flag bit. Carry doesn't change because we often use increments in programs that depend upon the contents of the carry flag. Note that increment is used to point to the next memory element in a byte-sized array of data only. If word-sized data are addressed. it is better to use an ADD DI,2 instruction to modify the DI pointer in place of two INC DI instructions.
ADC (ADD with carry) Instruction:

Ex: MOV MOV ADD ADC ADD AX,32C5h CX,1CA2h AL,2 AH,AL AX,CX
ADC Dest, Source
An addition-with-carry instruction (ADC) adds the bit in the carry flag (C) to the operand data. This instruction mainly appears in software that adds numbers that are wider than 16 bits in the 8086.
Arithmetic Instructions (contd.)

SUB Instruction: SUB Dest, Source
o Dest Source - Dest; Flag bits is affected Ex: MOV AL,A7h MOV BL,3Fh SUB AL,BL SUB AL,5
Many forms of subtraction (SUB) appear in the instruction set. The only types of subtraction not allowed are memory-to-memory and segment register subtractions. Like other arithmetic instructions, the subtract instruction affects the flag bits.
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DEC (decrement by 1) Instruction:
Ex: SUB AX,AX DEC AX DEC BYTE PTR [1000h] Or DEC BYTE PTR [1000h]
DEC Dest
DEC instruction subtracts a 1 from a register or the con-tents of a memory location. The decrement indirect memory data instructions require BYTE PTR, or WORD PTR.
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Arithmetic Instructions
SBB Instruction (Subtract with borrow):
o SBB Dest, Source
o Dest Source - Dest; o Flag bits is affected Ex: MOV AL,A7h MOV BL,3Fh SUB AL,BL SUB AL,5 A subtraction-with-borrow (SBB) instruction functions as a regular sbtraction, except that the carry flag (C), which holds the borrow, also subtracts from the difference. The most common use for this instruction is for subtractions that are wider than 16 bits in the 8086. Wide subtractions require that borrows propagate through the subtraction, just as wide additions propagate the carry. Like the SUB instruction, SBB affects the flags. Notice that the immediate subtract from memory instruction in this table requires a BYTE PTR , or WORD PTR directive.
MUL Instruction (Multiplication of unsigned number ):
o MUL Data AX AL*Data or DXAX AX*Data
o The source operand can be a memory location or a register. o When we multiply an n-bit number with an m-bit number, the product will be at most (n+m) bits. Ex: MOV AL,05h MOV BL,04h MUL BL ; ALAL*BL = 14h
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IMUL Instruction (Multiplication of signed number ):
o IMUL Data AX AL*Data or
DXAX AX*Data
o When we multiply an n-bit number with an m-bit number, the product will be at most (n+m) bits. Ex: MOV AL,-1 ; MOV AL,FFh MOV BL,3 IMUL BL ; AX = FFFDh
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Examples
An 8-bit unsigned integer, X, is present in the data segment at offset 2200h. Write an assembly code to calculate R=X4+1. We assume That R can be stored in 32 bits and should be stored in the data segment starting at offset 7000H. MOV MUL MUL ADD ADC MOV MOV AL,[2200h] AL AX AX,1 DX,0 [7000h],AX [7002h],DX ; AL=X ; AX=X2 ; DXAX=X4 ; DXAX= X3+1
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Examples
Suppose an 8-bit register unsigned number, X, is present in the data segment of memory at offset 1200h. Write a program to calculate: R=X3+1 . We assume That R can needs 32 bits at most and should be stored in the data segment starting at offset 2000H. MOV AL,[1200h] ; AL=X MOV BL,AL ; BL=X MUL AL ; AX=X2 MOV BH,0 ; BL=X MUL BX ; DXAX=X3 ADD AX,1 ADC DX,0 ; DXAX= X3+1 MOV [2000h],AX MOV [2002h],DX
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DIV Instruction (Multiplication of unsigned number ):
o DIV Data Quotient in AL ; Reminder in AH
Ex: MOV AL,19 MOV CL,3 DIV CL ; AL 6 (quotient); AH 1 (reminder)
IDIV Instruction (Multiplication of signed number ):

o DIV Data Quotient in AL ; Reminder in AH
Ex: MOV MOV IDIV Example: Write an MOV MOV CBW IDIV
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AX,16 ; AL = 10h BL,-3 ; BL = FDh (2S comp. of 3) BL Suppose an 8-bit number X is present in AL. assembly code to calculate AL,X BL,4 BL ; Convert Byte to word BH is filled with zeros BL
Logic Instructions
Logical Operation : AND, OR, NOT, XOR
AND Instruction : Affected Flag: OF, SF, ZF, PF, CF
AND D e s t, S o u r c e ; D e s t ( D e s t Source) Some flag bits change (S, Z and P. C = 0) Uses any addressing mode except memory to memory and segm e n t r e g i s t e rs a d d r e s s i n g. Ex: MOV MOV AND AND AX,3FCAh CX,CC09h AL,CL AL,F1h
;AL = 08 ;AL = 0
The AND operation is used for masking. We can set a particular bit in a register to 0 without changing other bits.
x.0 = 0 x.1 = x x x x x 1 1 1 1 x x x x x x x x 1 1 0 0 x x 0 0
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Logic Instructions
OR Instruction : O R D e s t , S o u r c e;
Affected Flag: OF, SF, ZF, PF, CF Dest ( D e s t S o u r c e ) Some f l a g b i t s c h a n g e ( S , Z a n d P . C = 0 ) Uses any addressing mode except memory to memory and segm e n t r e g i s t e rs a d d r e s s i n g. Ex: MOV AL,13h MOV BL,30h OR AL,BL
;AL = 33h
OR instruction is used to set a particular bit in a register to 1 (Bit Setting).

x+1 = 1 x+0 = x
Ex: OR OR OR OR
x x x x 0 0 0 0 x x x x
AL,BH SI,DI BX,[SI] Data[SI+20h],AL
0 x x 0 1 0 0 1 1 x x 1
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Logic Instructions
XOR Instruction : XOR Dest, Source;
Dest ( D e s t S o u r c e ) XOR used Complementing). 0 0 = 0 0 1 = 1 1 1 = 0 x 1 = x x 0 = x Ex: XOR OR AND XOR
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Affected Flag: OF, SF, ZF, PF, CF
is
to
complement
particular
bits
(Bit
AL,AL CX,600h CX,FFFCh CX,1000h
;
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Logic Instructions
NOT Instruction : N O T D e s t;
Affected Flag: None NOT i s a l o g i c a l i n v e r s i o n Ex: NOT CL ;CH is ones complement NOT TEMP NOT BYTE PTR [1000h] ;1s complement of the byte
in 1000h
NEG Instruction : NEG D e s t;

NEG i s a n a r i t h m e t i c i n v e r s i o n ( 2 c o m plement) s Ex: NEG DL ;DL is 2s complement NEG BX
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Logic Instructions
Shift Instruction
PF, SF and ZF flags are affected by shift instructions but left unchanged by the rotate instructions.
SHL Shift Logical Left Instruction : S H L

o o SHL Target, 1; SHL Target, CL;
Target, Count;
SHL multiplies the number signed o r unsigned by 2 on each s h i f t The t a r g e t c a n b e a r e g i s t e r o r a m e m o r y

Carry SHL Target
Ex: MOV SHL MOV SHL

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BL,10110101B BL,1 CL,3 BL,CL ;

Logic Instructions
Shift Instruction
Ex: MOV SHL SHL MOV SHL SHL
AL,00000011B AL,1 AL,-1 AL,-1 AL,1 AL,1
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Logic Instructions
Shift Instruction SHR Shift Logical Right Instruction : SHR Target, Count ;
o o SHR Target, 1; SHR Target, CL;
SHL divides the number signed o r unsigned by 2 on each shif t The t a r g e t c a n b e a r e g i s t e r o r a m e m o r y

SHR 0 Target Carry
Ex: MOV SHR MOV MOV SHR

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AL,8 AL,1 BL,16 CL,3 BL,CL
;
Logic Instructions
Shift Instruction SAL Shift Arithmetic left Instruction :
o o SAL Target, 1 ; SAL Target, CL ;
SAL divides a signed number by 2 on each shift The target can be a register or a memory
Carry SAL 0
Ex: MOV SAL MOV MOV SAL
AL,8 AL,1 BL,16 CL,3 BL,CL
Target
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Logic Instructions
Shift Instruction SAR Shift Arithmetic Right Instruction :
o o SAR Target, 1; SAR Target, CL;
SAL divides a signed number b y 2 o n each shift(The MSB rema i n s t h e s a m e ) The t a r g e t c a n b e a r e g i s t e r o r a m e m o r y

SAR Carry
Ex: MOV SAR MOV MOV SAR

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AL,6 AL,1 BL,-16 CL,3 BL,CL
Target
;
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Logic Instructions
Example
Shifting Example
An 16-bit unsigned number X is present in AX register. Write a program to compute 10.X, assuming that final result can be filled in 16 bits.
Solution #1 using MUL (Delay consuming solution) Ex: MOV BX,10 ; 2 clock cycles MUL BX ; DXAX=10X -> 120 clock cycles Solution #2 using SHIFT an ADD Ex: MOV AX,1 ; AX=2X -> 2 clock cycles MOV BX,AX ; BX=2X -> 2 clock cycles SHL AX,1 ; AX=4X -> 2 clock cycles SHL AX,1 ; AX=8X -> 2 clock cycles ADD AX,BX ; AX=10X -> 4 clock cycles -> 12 clock cycles
Logic Instructions
Rotate Instruction ROL/ROR Rotate Left (Right) Instruction :
o o ROL/ROR Target, 1; ROL/ROR Target, CL;
All except immediate and segment registers.

Carry Carry
ROL
Target
ROR
Target
Ex:
MOV ROL ROL ROR ROR
AL,BCh AL,1 AL,1 AL,1 AL,1
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Logic Instructions
Rotate Instruction RCL/RCR Rotate Through Carry Left (Right) Instruction :
o o RCL/RCR Target, 1; RCL/RCR Target, CL;
All except immediate and segment registers.

Carry
Carry
RCL
Target
RCR
Target
Ex: Consider a 64-bit number X=X63X62X0 located in DXCXBXAX registers. Write an assembly code to shift X one position left.
Sol1:
SHL SHL SHL SHL
AX,1 BX,1 CX,1 CX,1
Sol2:
SHL RCL RCL RCL
AX,1 BX,1 CX,1 CX,1
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Logic Instructions
Rotate Instruction RCL Shift Arithmetic Right Instruction :
o o SAR Target, 1; SAR Target, CL;
All except immediate and segment registers. Count must be 1 or CL Ex: MOV SAR MOV MOV SAR AL,6 AL,1 BL,-16 CL,3 BL,CL
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Comparison Instruction
CMP (Compare)Instruction :
CMP So u r c e 1 S o ur c e2 ; U p d a t e f l a g s The comparison instruction (CMP) is a subtraction that changes only the flag bits; the destination operand never changes. A comparison is useful for checking the entire contents of a register or a memory location against another value. A CMP is normally followed by a conditional jump instruction, which tests the condition of the flag bits. The only disallowed forms of compare are memory-tomemory and segment register compares. Ex1: CMP CL,BL CMP AX,SP CMP AX,SP CMP AX,2000h CMP [DI],CH CMP CL,[BP] Ex2: CMP AL,10h ;compare AL with 10h JAE label ;if 10h or obove Dr.Ridha Jemal EE353: Introduction to Microprocessor 1431-1432 50
Jump Instructions
Short Jump (relative jump): is a two-byte instruction where the target address within -128 to +127 of the IP value
JMP Instruction : JMP Disp.
o Unconditional jump (without testing any condition) o Conditional jump where condition is tested through one of the following flag bits : Z, C, P, O, S Ex: XOR BX,BX ; BX= 0 Start: MOV AX,1 ; AX= 1 ADD AX,BX ; BX= 0 JMP SHORT Next ; or JMP Next (Opcode=EB) Next: MOV BX,AX JMP Start
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Jump Instructions
Near Jump : Direct: this is a 3-bytes instruction. the first byte is the code and the next two are the signed number displacement value. Register indirect jump JMP DI ; IP DI o Any non-segment register can be used. Memory indirect jump: JMP WORD PTR [BX]
Far Jump: Target address is outside the present code segment. A far jump instruction replaces the contents of both CS and IP with the four bytes following the opcode Direct far JMP Memory indirect far jump JMP DWORD PTR [BX]
Jump Instructions
Opcode Short Jump EB Disp.
Near Jump
E9
Disp. Low
Disp. High
Far Jump
EA
IP Low
IP High
CS Low
CS High
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Jump Instructions
Unconditional Jump
Example: Add two numbers in ax and bx
Comments
Labels can be defined in separated lines. Example: calc andstop Labels can be defined in the same line Example: back
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Jump Instructions
Conditional Jump Checking only one flag Instruction JZ , JE Description
Condition inverse
Instruction
Jump if Zero (Equal). Jump if Carry (Below, Not Above JC , JB, JNAE Equal) JS Jump if Sign. JO Jump if Overflow. JPE, JP Jump if Parity Even. JNZ , JNE Jump if Not Zero (Not Equal). JNC , JNB, Jump if Not Carry (Not Below, Above JAE Equal) JNS Jump if Not Sign. JNO Jump if Not Overflow. JPO, JNP Jump if Parity Odd (No Parity).
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ZF = 1 CF = 1
JNZ, JNE JNC, JNB, JAE
SF = 1 OF = 1 PF = 1 ZF = 0 CF = 0
SF = 0 OF = 0 PF = 0
JNS JNO JPO JZ, JE JC, JB, JNAE

JS JO JPE, JP
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Jump Instructions
Conditional Jump Checking only one flag
Instruction JZ label JNZ label JE label JNE label JC label JNC label JS label Name Jump if Zero Jump if Not Zero Jump if Equal Jump if Not Equal Jump if Carry Jump if Not Carry Jump if Sign condition Jump if ZF=1 Jump if ZF=0 Jump if ZF=1 Jump if ZF=0 Jump if CF=1 Jump if CF=0 Jump if SF=1
JNS label JO label JNO label JP label

JNP label
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Jump if Not Sign Jump if Overflow Jump if Not Overflow Jump if Parity
Jump if Not Parity
Jump if SF=0 Jump if OF=1 Jump if OF=0 Jump if PF=1

Jump if PF=0
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Jump Instructions
Conditional Jump Checking on Signed numbers
Instruction JE , JZ JNE , JNZ JG , JNLE JL , JNGE JGE , JNL JLE , JNG Description Jump if Equal (=). Jump if Zero. Jump if Not Equal (<>). Jump if Not Zero. Condition ZF = 1 ZF = 0 ZF = 0 et SF = OF SF <> OF SF = OF Instruction inverse JNE, JNZ JE, JZ JNG, JLE JNL, JGE JNGE, JL
Jump if Greater (>). Jump if Not Less or Equal (not <=).

Jump if Less (<). Jump if Not Greater or Equal (not >=). Jump if Greater or Equal (>=). Jump if Not Less (not <). Jump if Less or Equal (<=). Jump if Not Greater (not >).
ZF = 1 ou SF <> OF JNLE, JG
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Jump Instructions
Conditional Jump Checking on Unsigned numbers
Instruction JE , JZ JNE , JNZ JA , JNBE Description Jump if Equal (=). Jump if Zero. Jump if Not Equal (<>). Jump if Not Zero. Condition ZF = 1 ZF = 0 Inst.inverse JNE, JNZ JE, JZ
Jump if Above (>). CF = 0 and ZF = 0 JNA, JBE Jump if Not Below or Equal (not <=).
JB , JNAE, JC
Jump if Below (<). Jump if Not Above or Equal (not >=). Jump if Carry.
Jump if Above or Equal (>=). Jump if Not Below (not <). Jump if Not Carry. Jump if Below or Equal (<=). Jump if Not Above (not >).
CF = 1
JNB, JAE, JNC
JAE , JNB, JNC
CF = 0
JNAE, JB
JBE , JNA
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CF = 1 ou ZF = 1 JNBE, JA
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Example
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Example
We need to add two signed numbers N1 and N2 se located at offsets
1100H and 1101H.

The result is stored at the offset 1103H if it is negative and at the offset 1102H if tit is positive and at the offset 1104H if it is null.
1.
Write the corresponding assembly code
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Example
Start
Ex:
N1+N2
Result <0 No Result =0 No Store Result in 1102h End
Yes
MOV AL,[1100h] ; Al=N1 ADD AL,[1101h] ; Al=N1+N2 JS Negative JZ AL,Null MOV[1102h],AL ;Positive result JMP End Negative: MOV[1103h],AL ;Negative result JMP End Null: MOV[1104h],AL ;Null result End: HLT
Yes
Store Result in 1103h
Store Result in 1104h
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Control Transfer Instructions

Call and Jump Instructions
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data segment SrcBuff DB 1,2,3,4,5,6,7,8,9,10 DesBuff DW 10 dup (0) Ends code segment PI proc near mov al,cl mul cl add ax,2 ; x2 +2 ret PI endp start: mov ax, data mov ds, ax mov bx, 10 mov si,offset SrcBuff mov di,offset DesBuff x1: mov cl, [si] call PI mov [di],ax inc si add di,2 dec bx jnz x1 ; These 2 instructions can be replaced by loop
Suppose two arrays X and Y containing 10 elements located in the data segment X is defined within 8 bits (byte) where Y is defined using 16 bits (word)
mov ax, 4c00h ; exit to operating system. int 21h Ends end start ; set entry point and stop the assembler.
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Call and Loop Instructions
data segment SrcBuff DB 1,2,3,4,5,6,7,8,9,10 DesBuff DW 10 dup (0) Ends code segment PI proc near mov al,bl mul bl add ax,2 ; x2 +2 ret PI endp start: mov ax, data mov ds, ax mov cx, 10 mov si,offset SrcBuff mov di,offset DesBuff x1: mov bl, [si] push cx call PI pop cx mov [di],ax inc si add di,2 lopp x1 mov ax, 4c00h ; exit to operating system. int 21h Ends end start ; set entry point and stop the assembler.
Suppose two arrays X and Y containing 10 elements located in the data segment X is defined within 8 bits (byte) where Y is defined using 16 bits (word)
Dr. Ridha Jemal
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data segment ends code segment start: PI proc near mov al,cl mul cl add ax,2 ; x2 +2 ret PI endp mov bx, 100 mov si,1000h mov di,3000h x1: mov cl, [si] call PI mov [di],ax in si add di,2 dec bx jnz x1 mov ax, 4c00h ; exit to operating system. int 21h Dr. Ridha Jemal EE353: Introduction to Microprocessor 1431-1432 ends
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; multi-segment executable file template. data segment MSG1 DB 30h,31h,32h,0Dh,0Ah,'aaa',0dh,0Ah,0 MSG2 DB 'This is a sample line.',0 ends
code segment
string proc near lodsb cmp al,0 je stop mov dl,al mov ah,2 int 21h jmp string stop: ret
start: ; set segment registers: mov ax, data mov ds, ax ; add your code here cld mov si, offset MSG1 call string mov si, offset MSG2 call string mov ax, 4c00h ; exit to operating system. int 21h ends end start ; set entry point and stop the assembler.
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Chapter 4 : Instruction Set for 8086

By Dr. Ridha Jemal

Dr. Ridha Jemal

EE353: Introduction to Microprocessor

Data Transfer Instruction

PUSH reg16 PUSH seg PUSH mem PUSHA PUSHF

PUSH BX PUSH DS PUSH [DI+2] PUSHA PUSHF

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

Ex: XCHG AX,BX

XCHG [SI],DX ;[DS:SI] DX

LAHF and SAHF Instruction:

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

LAHF and SAHF Instruction:

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

The Direction Flag

Data Transfer Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

STOSW ES:[DI] AL ES:[DI+1] AH IF DF=0, DI DI+2 IF DF=1, DI DI-2

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

EXAMPLE For STOSB Instruction

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction

LODSW AL DS:[SI] AH DS:[SI+1] IF DF=0, SI SI+2 IF DF=1, SI SI-2

Dr. Ridha Jemal

EE353: Introduction to Microprocessor 1431-1432

Data Transfer Instruction