x86 BIOS Overview

nexite R&D Center S/W 2008. 12.16

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Agenda
BIOS Definition BIOS Role BIOS Flow BIOS Features POST Card BIOS ROM BIOS Development Stage The Customized x86 BIOS example for Embedded System Q&A

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1. What BIOS Stands for?

1) Definition
-Basic -Input -Output -System

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Keyboard Mouse Scanner

Input System

Output

Video Printer Speaker

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2) BIOS Vendor List

http://www.ami.com

-Bought Award Software International in 1998 -Bought General Software in 2008

http://www.phoenix.com

http://www.insydesw.com

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2. BIOS Role
Application/ OS System Software Hardware
<Basic System Structure>

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2. BIOS Role (Contd)

App./OS App./OS
Provide info Basic IO INT Provide I/F
DOS Linux Windows

System Software (Firmware) System Software (Firmware)

Initialization Function Test Configuration Resource Allocation

Hardware Hardware

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2. BIOS Role (Contd)

BIOS DATA AREA BIOS DATA AREA

MOTHERBOARD MOTHERBOARD KEYBOARD KEYBOARD CONTROLLER CONTROLLER (8042) (8042)

INT 9 INT 9 HANDLER HANDLER

INT 16 INT 16 HANDLER HANDLER

OPERATING OPERATING SYSTEM SYSTEM AND AND APPICATIONS APPICATIONS

ex) Keyboard Operation

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KEYBOARD CONTROLLER PORT DECODE 60/64 8042 SYSTEM CONTROL AND INFORMATION ENABLE A20 SYSTEM RESET

CPU IOR IOW Q KEY (Pressed) DATA BUS 8 SERIAL LINK Kscan code (15h) 1 clock data stop data Odd parity

0 10 1 0 10 0 00 1 INTERRUPT CONTROLLER start

IRQ1

ex) Keyboard Operation

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3. BIOS Flow
Boot Block Boot Block POST POST Boot-Strap Loader Boot-Strap Loader

OS OS

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3. BIOS Flow (contd)

Boot Block Boot Block
Memory Auto Detection By using SPD Go to Recovery Mode If requested, If BIOS Checksum is failed

POST POST

Boot-Strap Loader Boot-Strap Loader

Initialize & Configure chip Timer, Interrupt, DMA Power On Self Test System Resource Allocation PCI/ PnP Device PCI IRQ Routing Save System Info. Memory Size System Equipment Configure APM/ACPI Prepare INT SVC Routine Configure SMBIOS Provide system Info.

Configure Bootable Devices HDD, CD, USB, Network Load Boot Devices HDD, CD, USB, Network

OS OS

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3. BIOS Flow (contd)

1) Boot Block Mode
What The Boot Block is a mini scale BIOS. Contains system initialization code. Why Recover faulty BIOS (without physically removing the ROM ) BIOS upgrade. When BIOS checksum fails. User Force, Specific Key

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2) POST
Power On Self Test A diagnostic testing sequence run by the BIOS as the computers power is initially turned on. Tests all system components Configures and initializes configurable components Prepares PC to boot OS Bootstrap : Loads the operating system ( O/S). If it cant do that, it will ask for an alternate source for an O/S such as a diskette.

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3) Runtime Code
Runtime is the BIOS code that runs after POST. Legacy Interrupt Services for low level I/O. IDE, Floppy, Keyboard, Screen, Serial, Parallel, SMI/SCI service for Power Management. PnP/PCI services

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4) ROM Information

(, AMI BIOS )

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3. BIOS Flow (contd)

Bootblock Bootblock POST POST Boot-Strap Loader Boot-Strap Loader

OS OS

BIOS Setup

reset

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3. BIOS Flow (contd)

[ BIOS(CMOS) Setup ] Where is CMOS?
In South-Bridge, SIO, etc

What to do?
Set/Change
Date/Time info. Chipset Register (NB, SB, SIO) Booting Sequence (FDD, CDROM, HDD, Network, USB) Password (Supervisor, User)

Show Info.
BIOS Version Date/Time Current configuration H/W Monitor (FAN/Voltage/ Thermal)

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3. BIOS Flow (contd)

[ BIOS(CMOS) Setup ]

(, AMI BIOS )

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4. BIOS Features
1) DRAM Auto Detection
Fully support every possible DRAM combination DRAM Auto Detection by SPD SPD (Serial Presence Detect) information # of Row Addresses on this assembly # of Col Addresses on this assembly DIMM configuration type (parity, ECC) DRAM type (EDO, SDRAM, DDR) Manufacturer information Timing Values,
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2) CPU Auto Detection

Support Intel, AMD, VIA Auto detect CPU ID and display string on screen Auto detect running speed Automatically program timing related chipset parameters when different CPU running with different clock speed Automatically apply appropriate power management code for different CPU

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3) DMI
Desktop Management Interface Database of computing system Types, capabilities, operational status, installation date, and other information about the system components. Example : System Information (Type 1)

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4) Plug and Play

Focus on easy-of-use for the end-user Dynamic resources assignment (DMA, IRQ, I/O, Memory) Preserve resources for legacy usage ISA PnP Card PCI Card PnP service routine Dynamically report device node to OS Enable/Disable onboard device via setup Reassign resources for all M/B devices

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5) Power Management
APM Advanced Power Management Power Management by BIOS SMI (System Management Interrupt) ACPI Advanced Configuration and power Interface Current Revision 3.0b Power Management by OS and BIOS SMI/SCI (System Control Interrupt)

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5. POST Card
Shows the value of IO PORT 80H Shows the progress status of BIOS POST Interface: ISA/PCI/Mini-PCI/PCI-E(1x) Type

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5. POST Card (Contd)

Concept Like bookmark to show where you are

Write Value#1 to POST Card Write Value#1 to POST Card

DO BIOS POST #1 DO BIOS POST #1

Write value#2 to POST Card Write value#2 to POST Card

If system is hanged and POST code value is say #2?

DO BIOS POST #2 DO BIOS POST #2

Write value#3 to POST Card Write value#3 to POST Card

How should we understand the POST Code?

DO BIOS POST #3 DO BIOS POST #3

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1) BIOS Post Code (Boot Block)

Before D1 D1

Early chipset initialization is done. Early super I/O initialization is done including RTC and keyboard controller. NMI is disabled. Perform keyboard controller BAT test. Check if waking up from power management suspend state. Save poweron CPUID value in scratch CMOS. Go to flat mode with 4GB limit and GA20 enabled. Verify the bootblock checksum. Disable CACHE before memory detection. Execute full memory sizing module. Verify that flat mode is enabled. Bootblock code is copied from ROM to lower system memory and control is given to it. BIOS now executes out of RAM. Both key sequence and OEM specific method is checked to determine if BIOS recovery is forced. Main BIOS checksum is tested. If BIOS recovery is necessary, control flows to checkpoint E0. Restore CPUID value back into register. The Bootblock-Runtime interface module is moved to system memory and control is given to it. Determine whether to execute serial flash. The Runtime module is uncompressed into memory. CPUID information is stored in memory Store the Uncompressed pointer for future use in PMM. Copying Main BIOS into memory. Restore CPUID value back into register. Give control to BIOS POST.

D2 D4 D5 D6

D7

D8 D9 DA

(, AMI BIOS )

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2) BIOS Post Code (POST 1)

03 04 Disable NMI, Parity, video for EGA, and DMA controllers. Initialize BIOS, POST, Runtime data area. Also initialize BIO S modules on POST entry and GPNV area. Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is OK. Verify CMOS checksum manually by reading storage area. If the CMOS checksum is bad, update CMOS with power-on default values and cle ar passwords. Initialize status register A. Initializes data variables that are based on CMOS setup questions. Initialize s both the 8259 compatible PICs in the system Initializes the interrupt controlling hardware (generally PIC) and interrupt vector table. Initializes 8254 timer. Install the POSTINT1Ch handler. Enable IRQ-0 in PIC for system timer interrupt. Initializes the CPU. The BAT test is being done on KBC. Program the keyboard controller command byte is being done after Auto detection of KB/MS using AMI KB-5. Initializes the 8042 compatible Key Board Controller. Detects the presence of PS/2 mouse. Detects the presence of Keyboard in KBC port. Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Early POST initialization of chipset registers. Uncompress and initialize any platform specific BIOS modules. Initializes different devices through DIM. Detects and initializes the video adapter installed in the system that have optional ROMs.

05 06 08 0A 0B 0C 0E 13 20 2A 2C

(, AMI BIOS )

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3) BIOS Post Code (POST 2)

31 33 37 38 39 3A 3B 3C 40 52 60 75 85 87 Allocate memory for ADM module and uncompress it. Give control to ADM module for initialization. Initialize language and font modules for ADM. Activate ADM module. Initializes the silent boot module. Set the window for displaying text information. Displaying sign-on message, CPU information, setup key message, and any OEM specific information. Initializes different devices through DIM. Initializes DMAC-1 & DMAC-2. Initialize RTC date/time. Test for total memory installed in the system. Also, Check for DEL or ESC keys to limit memory test. Display total memory in the system. Mid POST initialization of chipset registers. Detect different devices (Parallel ports, serial ports, and coprocessor in CPU, etc.) successfully installed in the system and update the BDA, EBDAetc. Updates CMOS memory size from memory found in memory test. Allocates memory for Extended BIOS Data Area from base memory. Initializes NUM-LOCK status and programs the KBD typematic rate. Initialize Int-13 and prepare for IPL detection. Display errors to the user and gets the user response for error. Execute BIOS setup if needed / requested. (, AMI BIOS )

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4) BIOS Post Code (POST 3)

8C 8D 8E 90 A0 A2 A4 A7 A9 AA AB AC B1 00 Late POST initialization of chipset registers. Build ACPI tables (if ACPI is supported) Program the peripheral parameters. Enable/Disable NMI as selected Late POST initialization of system management interrupt. Check boot password if installed. Takes care of runtime image preparation for different BIOS modules. Fill the free area in F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares the runtime language module. Initialize runtime language module. Displays the system configuration screen if enabled. Wait for user input at configuration display if needed. Uninstall POST INT1Ch vector and INT09h vector. De-initialize the ADM module. Prepare BBS for INT 19 boot. End of POST initialization of chipset registers. Save system context for ACPI. Passes control to OS Loader (typically INT19h).

(, AMI BIOS )

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6. Where is the BIOS?

BIOS I/F: ISA

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SPI

7. BIOS Development Stage

1. Review Stage 1. Review Stage

2. Alpha Stage 2. Alpha Stage

3. Beta Stage 3. Beta Stage

4. Final Stage 4. Final Stage

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1) Review Stage
Summary of GPIO Usage

Schematic Review Schematic Review

Summary of Device Usage Summary of PCI IRQ Routing Summary of OEM Spec. and Implementation (BIOS Implementation Spec.) NB (North-Bridge) Type

BIOS Source Request BIOS Source Request

SB (South-Bridge) Type SIO (Super I/O) Type CPU Type Features to be supported CPU Review

Datasheet Review Datasheet Review

NB/SB Review SIO Review Other chipset Review

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2) Alpha BIOS Development Stage

Initial Stage that Video can be displayed and POST is completed Initial Stage that H/W Engineer can check basic hardware signal

3) Beta BIOS Development Stage

Meets BIOS Implement Spec. Can use Onboard Device Can use a device through PCI Slot/ PCI-E/ USB I/F Can go on DVT Function Test DVT Function Test is completed and RC TEST is ready

4) Final BIOS Development Stage

All R&C Errors are fixed

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8. The Customized x86 BIOS example for Embedded System

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Q&A .

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