2N5060 Series Sensitive Gate Silicon Controlled Rectifiers

Reverse Blocking Thyristors

Annular PNPN devices designed for high volume consumer applications such as relay and lamp drivers, small motor controls, gate drivers for larger thyristors, and sensing and detection circuits. Supplied in an inexpensive plastic TO-226AA (TO-92) package which is readily adaptable for use in automatic insertion equipment. Sensitive Gate Trigger Current 200 A Maximum Low Reverse and Forward Blocking Current 50 A Maximum, TC = 110C Low Holding Current 5 mA Maximum Passivated Surface for Reliability and Uniformity Device Marking: Device Type, e.g., 2N5060, Date Code
MAXIMUM RATINGS (TJ = 25C unless otherwise noted)
Rating Peak Repetitive OffState Voltage(1) (TJ = 40 to 110C, Sine Wave, 50 to 60 Hz, Gate Open) 2N5060 2N5061 2N5062 2N5064 Symbol VDRM, VRRM 30 60 100 200 IT(RMS) IT(AV) 0.51 0.255 ITSM 10 Amps 0.8 Amp Amp TO92 (TO226AA) CASE 029 STYLE 10 1 2 Value Unit Volts
Preferred Device

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SCRs 0.8 AMPERES RMS 30 thru 200 VOLTS

G A K

On-State Current RMS (180 Conduction Angles; TC = 80C) *Average On-State Current (180 Conduction Angles) (TC = 67C) (TC = 102C) *Peak Non-repetitive Surge Current, TA = 25C (1/2 cycle, Sine Wave, 60 Hz) Circuit Fusing Considerations (t = 8.3 ms) *Forward Peak Gate Power (Pulse Width 1.0 sec; TA = 25C)

PIN ASSIGNMENT
1 I2t PGM PG(AV) IGM VRGM TJ Tstg 0.4 0.1 0.01 1.0 5.0 40 to +110 40 to +150 A2s Watt Watt 2 3 Cathode Gate Anode

v v v

*Forward Average Gate Power (TA = 25C, t = 8.3 ms) *Forward Peak Gate Current (Pulse Width 1.0 sec; TA = 25C) *Reverse Peak Gate Voltage (Pulse Width 1.0 sec; TA = 25C) *Operating Junction Temperature Range *Storage Temperature Range *Indicates JEDEC Registered Data.

ORDERING INFORMATION
Amp Volts
Preferred devices are recommended choices for future use and best overall value. See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.

C C

(1) VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded.

Semiconductor Components Industries, LLC, 2000

May, 2000 Rev. 4

Publication Order Number: 2N5060/D

2N5060 Series
THERMAL CHARACTERISTICS
Characteristic *Thermal Resistance, Junction to Case(1) Thermal Resistance, Junction to Ambient *Lead Solder Temperature (Lead Length 1/16 from case, 10 s Max) Symbol RJC RJA Max 75 200 +230* Unit C/W C/W C

ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS
*Peak Repetitive Forward or Reverse Blocking Current(2) (VAK = Rated VDRM or VRRM) TC = 25C TC = 110C IDRM, IRRM 10 50 A A

ON CHARACTERISTICS
*Peak Forward OnState Voltage(3) (ITM = 1.2 A peak @ TA = 25C) Gate Trigger Current (Continuous dc)(4) *(VAK = 7 Vdc, RL = 100 Ohms) Gate Trigger Voltage (Continuous dc)(4) *(VAK = 7 Vdc, RL = 100 Ohms) *Gate NonTrigger Voltage (VAK = Rated VDRM, RL = 100 Ohms) Holding Current (4) *(VAK = 7 Vdc, initiating current = 20 mA) Turn-On Time Delay Time Rise Time (IGT = 1 mA, VD = Rated VDRM, Forward Current = 1 A, di/dt = 6 A/s Turn-Off Time (Forward Current = 1 A pulse, Pulse Width = 50 s, 0.1% Duty Cycle, di/dt = 6 A/s, dv/dt = 20 V/s, IGT = 1 mA) TC = 25C TC = 40C TC = 25C TC = 40C TC = 110C TC = 25C TC = 40C IH VGT VGD 0.1 3.0 0.2 5.0 10 mA s td tr VTM IGT 200 350 0.8 1.2 Volts Volts 1.7 Volts A

tq

2N5060, 2N5061 2N5062, 2N5064

10 30

DYNAMIC CHARACTERISTICS
Critical Rate of Rise of OffState Voltage (Rated VDRM, Exponential) *Indicates JEDEC Registered Data. (1) This measurement is made with the case mounted flat side down on a heat sink and held in position by means of a metal clamp over the curved surface. (2) RGK = 1000 is included in measurement. (3) Forward current applied for 1 ms maximum duration, duty cycle 1%. (4) RGK current is not included in measurement. dv/dt 30 V/s

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2N5060 Series
Voltage Current Characteristic of SCR
+ Current Anode + VTM on state IRRM at VRRM IH

Symbol
VDRM IDRM VRRM IRRM VTM IH

Parameter
Peak Repetitive Off State Forward Voltage Peak Forward Blocking Current Peak Repetitive Off State Reverse Voltage Peak Reverse Blocking Current Peak on State Voltage Holding Current Reverse Blocking Region (off state) Reverse Avalanche Region Anode

+ Voltage IDRM at VDRM Forward Blocking Region (off state)

CURRENT DERATING
TC , MAXIMUM ALLOWABLE CASE TEMPERATURE (C)

130 120 110 100 dc 90 80 70 60 50 0 0.1 0.2 0.3 0.4 = 30 120 = CONDUCTION ANGLE

a TA , MAXIMUM ALLOWABLE AMBIENT TEMPERATURE ( C)

130 = CONDUCTION ANGLE 110 TYPICAL PRINTED CIRCUIT BOARD MOUNTING

CASE MEASUREMENT POINT CENTER OF FLAT PORTION

90

70

60

90

180

dc

50 = 30 30 0 0.1 60 0.2 90 120 0.3 180 0.4

0.5

IT(AV), AVERAGE ON-STATE CURRENT (AMP)

IT(AV), AVERAGE ON-STATE CURRENT (AMP)

Figure 1. Maximum Case Temperature

Figure 2. Maximum Ambient Temperature

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2N5060 Series
CURRENT DERATING

5.0 ITSM , PEAK SURGE CURRENT (AMP)

10 7.0 5.0

3.0 2.0 TJ = 110C 25C 1.0 0.7 0.5

3.0 2.0

i T , INSTANTANEOUS ON-STATE CURRENT (AMP)

1.0 1.0 0.3 0.2

2.0

3.0

5.0 7.0

10

20

30

50 70

100

NUMBER OF CYCLES

Figure 4. Maximum NonRepetitive Surge Current

0.8 P(AV), MAXIMUM AVERAGE POWER DISSIPATION (WATTS) 0.1 0.07 0.05 120 0.6 a = CONDUCTION ANGLE = 30 60 90

180

0.03 0.02

0.4 dc 0.2

0.01 0 0.5 1.0 1.5 2.0 2.5 vT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS)

0 0 0.1 0.2 0.3 0.4 0.5 IT(AV), AVERAGE ON-STATE CURRENT (AMP)

Figure 3. Typical Forward Voltage

r(t), TRANSIENT THERMAL RESISTANCE NORMALIZED

Figure 5. Power Dissipation

1.0 0.5

0.2 0.1 0.05

0.02 0.01 0.002

0.005

0.01

0.02

0.05

0.1

0.2

0.5

1.0

2.0

5.0

10

20

t, TIME (SECONDS)

Figure 6. Thermal Response

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2N5060 Series
TYPICAL CHARACTERISTICS

0.8 VG , GATE TRIGGER VOLTAGE (VOLTS) VAK = 7.0 V RL = 100 RGK = 1.0 k

I GT , GATE TRIGGER CURRENT (NORMALIZED)

200 100 50 2N5062-64 20 10 5.0 2N5060-61 2.0 1.0 0.5 0.2 75 50 25 0 25 50 75 100 110 TJ, JUNCTION TEMPERATURE (C) VAK = 7.0 V RL = 100

0.7

0.6

0.5

0.4 0.3 75

50

25

25

50

75

100 110

TJ, JUNCTION TEMPERATURE (C)

Figure 7. Typical Gate Trigger Voltage

Figure 8. Typical Gate Trigger Current

4.0 I H , HOLDING CURRENT (NORMALIZED) 3.0 2.0 VAK = 7.0 V RL = 100 RGK = 1.0 k

1.0 0.8

2N5060,61 2N5062-64

0.6 0.4 75

50

25

25

50

75

100 110

TJ, JUNCTION TEMPERATURE (C)

Figure 9. Typical Holding Current

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2N5060 Series TO92 EIA RADIAL TAPE IN FAN FOLD BOX OR ON REEL
H2A H2A H2B H2B

H W2 H4 H5 L1 L F1 F2 P2 P1 P P2 D H1 W1 W T T2 T1

Figure 10. Device Positioning on Tape

Specification Inches Symbol
D D2 F1, F2 H H1 H2A H2B H4 H5 L L1 P P1 P2 T T1 T2 W W1 W2

Millimeter Max Min

3.8 0.38 2.4 1.5 8.5 0 0 18 15.5 8.5 2.5 12.5 5.95 3.55 0.15 0.35 17.5 5.5 .15

Item Tape Feedhole Diameter Component Lead Thickness Dimension Component Lead Pitch Bottom of Component to Seating Plane Feedhole Location Deflection Left or Right Deflection Front or Rear Feedhole to Bottom of Component Feedhole to Seating Plane Defective Unit Clipped Dimension Lead Wire Enclosure Feedhole Pitch Feedhole Center to Center Lead First Lead Spacing Dimension Adhesive Tape Thickness Overall Taped Package Thickness Carrier Strip Thickness Carrier Strip Width Adhesive Tape Width Adhesive Tape Position

Min
0.1496 0.015 0.0945 .059 0.3346 0 0 0.7086 0.610 0.3346 0.09842 0.4921 0.2342 0.1397 0.06 0.014 0.6889 0.2165 .0059

Max
4.2 0.51 2.8 4.0 9.5 1.0 1.0 19.5 16.5 11 12.9 6.75 3.95 0.20 1.44 0.65 19 6.3 0.5

0.1653 0.020 0.110 .156 0.3741 0.039 0.051 0.768 0.649 0.433 0.5079 0.2658 0.1556 0.08 0.0567 0.027 0.7481 0.2841 0.01968

NOTES: 1. Maximum alignment deviation between leads not to be greater than 0.2 mm. 2. Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm. 3. Component lead to tape adhesion must meet the pull test requirements. 4. Maximum noncumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches. 5. Holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive. 6. No more than 1 consecutive missing component is permitted. 7. A tape trailer and leader, having at least three feed holes is required before the first and after the last component. 8. Splices will not interfere with the sprocket feed holes.

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2N5060 Series
ORDERING & SHIPPING INFORMATION: 2N5060 Series packaging options, Device Suffix
U.S. 2N5060,61,62,64 2N5060,61,62,64RLRA 2N5060,64RLRM Europe Equivalent Shipping Bulk in Box (5K/Box) Radial Tape and Reel (2K/Reel) Radial Tape and Fan Fold Box (2K/Box) Description of TO92 Tape Orientation N/A, Bulk Round side of TO92 and adhesive tape visible Flat side of TO92 and adhesive tape visible

2N5060RL1

PACKAGE DIMENSIONS

TO92 (TO226AA) CASE 02911 ISSUE AJ

A R P L
SEATING PLANE

NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 0.250 0.080 0.105 0.100 0.115 0.135 MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 6.35 2.04 2.66 2.54 2.93 3.43

X X G H V
1

D J C SECTION XX N N

DIM A B C D G H J K L N P R V

STYLE 10: PIN 1. CATHODE 2. GATE 3. ANODE

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2N5060 Series

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.

PUBLICATION ORDERING INFORMATION

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For additional information, please contact your local Sales Representative.

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2N5060/D