Altium Designer Winter 09 Technical Review

Altium Designer Winter 09
Technical Review
A guide to the major technical differences between the releases of Altium Designer Winter 09 and Altium Designer 6
Software, hardware, documentation and related materials: Copyright 2009 Altium Limited. All Rights Reserved. The material provided with this notice is subject to various forms of national and international intellectual property protection, including but not limited to copyright protection. You have been granted a non-exclusive license to use such material for the purposes stated in the end-user license agreement governing its use. In no event shall you reverse engineer, decompile, duplicate, distribute, create derivative works from or in any way exploit the material licensed to you except as expressly permitted by the governing agreement. Failure to abide by such restrictions may result in severe civil and criminal penalties, including but not limited to fines and imprisonment. Provided, however, that you are permitted to make one archival copy of said materials for back up purposes only, which archival copy may be accessed and used only in the event that the original copy of the materials is inoperable. Altium, Altium Designer, Board Insight, DXP, Innovation Station, LiveDesign, NanoBoard, NanoTalk, OpenBus, PCAD, SimCode, Situs, TASKING, and Topological Autorouting and their respective logos are trademarks or registered trademarks of Altium Limited or its subsidiaries. All other registered or unregistered trademarks referenced herein are the property of their respective owners and no trademark rights to the same are claimed. v8.0 31/3/08
Altium Designer Winter 09 Technical Review
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Contents
Contents............................................................................................................................................3 Foreword - Winter 09 ............................................................................................................................5 A More Productive Environment for Complex Board Design ...............................................................6 High Performance DirectX Graphics Engine ........................................................................................7 Improved performance ......................................................................................................................7 Smaller Memory Footprint.................................................................................................................8 Certified and Rated Video Cards ......................................................................................................8 Real-time 3D Visualization .................................................................................................................10 Cylindrical and Spherical 3D bodies ...............................................................................................10 3D Models Visualization control......................................................................................................10 Real-time Electronic and Mechanical Co-Design ...............................................................................11 Direct linking to external STEP models...........................................................................................11 3D Interference / Clearance Checking............................................................................................11 Create Board Outline from STEP model.........................................................................................12 More realistic PCB rendering and accurate object geometry.............................................................13 3D Texture mapping support ..........................................................................................................13 3D Orthographic projection .............................................................................................................13 Routing Technologies Extended for Intelligent, Faster Physical Design............................................14 Push and Shove..............................................................................................................................14 Walkaround .....................................................................................................................................14 Hugging...........................................................................................................................................15 Auto-Complete ................................................................................................................................15 Integrated Pin Swapping.................................................................................................................16 Obstacle Avoidance During Drag Operations.................................................................................17 Internal Plane Representation ............................................................................................................18 Higher Trace Density Support for Manufacturing Technology ...........................................................19 Full Stack-Up Definition for Vias .....................................................................................................19 Offset Holes in Pads .......................................................................................................................20 Real-Time Manufacturing Rule Checking before Fabrication ............................................................20 Hole to Hole Clearance ...................................................................................................................20 Minimum Solder Mask Sliver ..........................................................................................................20 Net Antennae ..................................................................................................................................20 Silk Over Component Pads.............................................................................................................20 Silk to Silk Clearance ......................................................................................................................21 Minimum Copper Width ..................................................................................................................21 Acute Angle.....................................................................................................................................21 Broken-Net ......................................................................................................................................22 Easier Design and Project Navigation with Design Insight ................................................................23
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Project Insight .................................................................................................................................24 Document Insight ............................................................................................................................25 Connectivity Insight .........................................................................................................................25 New - Cadence Allegro and Zuken CADSTAR Importers ..................................................................26 Cadence Allegro PCB Importer ....................................................................................................26 Zuken CADSTAR Importer..........................................................................................................27 Design to Manufacture Improvements to the Output Job Editor .....................................................28 Multiple Output Publishing ..............................................................................................................28 Support for Bill of Materials .............................................................................................................28 Additional Report Generation ERC and DRC Reports ................................................................29 Script Execution Output Generator .................................................................................................29 New Output Media - Publish to the Web.........................................................................................29 Version Control Improvements ...........................................................................................................30 Version Control Revision Number...................................................................................................30 Storage Manager Improvements ....................................................................................................30 Live Linking to Supplier Data..............................................................................................................31 Library Search Improvements ............................................................................................................31 Enterprise-Style Management of Design Data for Production and Release ......................................32 Custom Instruments for FPGA-based Design ....................................................................................33 A more Intuitive Logic Analyzer ..........................................................................................................35 Greater Control over Digital Waveform Display .................................................................................35 FPGA Tool Feedback .........................................................................................................................37 Custom FPGA Logic Development in C .............................................................................................37 Custom Wishbone Interface Component ...........................................................................................39 Field Dashboard for FGPA-based instruments ..................................................................................40 How it Works ...................................................................................................................................40 How Instruments are Displayed ......................................................................................................40 Supported instruments ....................................................................................................................41 Plug-n-Play Software Platform Builder ...............................................................................................42 Getting Help ....................................................................................................................................43 Enhanced Devices View .....................................................................................................................44 Signal Harnesses in FPGA and Core Projects...................................................................................45 Configurable Generic Library..............................................................................................................46 Global Knowledge Repository ............................................................................................................47 Altium Designer Deployment Options.................................................................................................48 Altium Solutions ..............................................................................................................................48 Upgrade with Confidence................................................................................................................48 Licensing Options............................................................................................................................49 Installation Options..........................................................................................................................49 More Technical Information ............................................................................................................49
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Foreword Winter 09
The Winter 09 release of Altium Designer brings significant new and enhanced features to unify the design process, helping you create a real return on your innovation. There is a range of new and powerful Interactive Routing Features, performance and efficiency upgrades to the PCB graphics system and real time Manufacturing Rule Checking to improve the user experience and productivity in design. To seamlessly move your design to manufacturing, the Winter 09 release of Altium Designer includes the first formal modeling of the Design Release Management concept. Managing the process of releasing a design for prototype or production is a key aspect of the product development process and an important part of the overall enterprise data management function. Also included is live linking to Suppliers' data through web services. The integration of the available live data within the design process at the library design level, during the design, and at design release time is now possible. This feature allows you to search a suppliers database within Altium Designer and link parts to matching supplier items. Using this link, the supplier data can be retrieved at any time during the design process or at design release time, from the Bill of Materials. Software-savvy board-level designers can take advantage of the Plug-n-Play Software Platform Builder to quickly develop sophisticated software applications on a hardware platform. It allows applications to exploit the hardware through a standardized set of services, such as storage services and network services. Low level driver code has been written for you and you can quickly assemble all of the software required to get your platform up and running with a few clicks of the mouse. Then interface to the low level hardware resources through an API tailored to your application. FPGA-based soft instruments are a powerful way of embedding debug tools inside FPGAs. To coincide with the Winter 09 release of Altium Designer, we are extending this even further with the Altium Instrument Dashboard. The dashboard provides a customized, standalone application, specifically designed to allow viewing of custom controls. Altium Designer helps you keep pace with the speed of todays development. Were excited about the new features and technologies developed for this release and the reaction they are receiving and were sure that youll be excited too. Read on for more information about the enhancements made to the Winter 09 release of Altium Designer.
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A More Productive Environment for Complex Board Design

Good board design is not a trivial task it takes great skill, patience, and a design environment that works with you. The Winter 09 release of Altium Designer incorporates a large number of enhancements that help you throughout the board design process. Altium Designer Winter 09 contains the entire infrastructure and data management capabilities a designer needs to successfully go from concept to fabrication of any electronics product. The PCB Layout environment has been optimized to tackle dense, high-speed PCB designs. Some of the highlights in this area include a much faster 2D / 3D graphics engine with or without transparent layers, much faster dimming, masking, highlighting & 3D rotation, enhanced interactive router including differential pairs & multi-trace routing, integrated pin swapping & obstacle avoidance during drag operations, support for via stacks & pads with offset holes, support for new manufacturing rules including net antennae, minimum soldermask sliver, silkscreen text to silkscreen clearance & more. Having said that, lets review more of its technical merits.
Figure 1. 3D graphics and processing power are significantly increased in the Winter 09 release of Altium Designer. It uses less memory and runs up to seven times faster than before.
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High Performance DirectX Graphics Engine^

The DirectX graphics engine used in the PCB Layout environment has been re-engineered resulting in significant performance improvements, more responsive 2D & 3D graphical views & a smaller memory footprint. The DirectX engine provides substantial increases in drawing speed for both 2D & 3D graphical views compared with the previous releases of Altium Designer (see the section Certified and Rated video cards later in this document).
Improved performance
The architectural changes to the graphics engine will increase performance & responsiveness in critical areas of the PCB Layout environment including: Switching in or out of, or changing layers while in, Single Layer Mode Masking, Dimming & Highlighting operations Using Transparent Layers in 2D Improved drawing speed compared with the GDI engine Removes the impact of polygons on drawing speed. Provides smooth panning and scrolling, at all zoom levels Maintains drawing and panning performance for the largest of boards. Has been tested and benchmarked on a wide variety of graphics cards (detailed below).
Figure 2. As well as speed improvements, the graphics engine also delivers cleaner and clearer display of all objects. Here you can clearly see that there are overlaid component body objects in the large component in the left side image.
^ Feature introduced in Summer 08 release of Altium Designer
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Smaller Memory Footprint

The new DirectX graphics engine uses less system memory because most of the DirectX primitives are now stored directly in the GPU memory (Video Card memory). This will in turn reduce the memory footprint of Altium Designer.
Certified and Rated Video Cards

Video cards are a critical hardware element that can have a large impact on both the performance and stability of your system when using the DirectX graphics engine. The benchmarks below will help you choose the right hardware requirements necessary to achieve stunning results, make the whole system more responsive and 'feel' better, and remove distractions to design caused by lags in the GUI. The test environment used for benchmarking was as follows: Test Board NanoBoard Daughter Board (DB37) - 10 layers, 254 components, 2432 pads, 12 polygons
Test System
Intel Core 2 Quad @ 2.4GHz - 4GB DDR2 800Mhz PCIe x16 2560x1920 no panels 8.0.0.15895
Build Number
The following benchmarking table lists cards tested by Altium and their performance rating in Altium Designer Winter 09 release versus Altium Designer 6.9. In this table the higher the performance index the better the cards performance.
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Video Card Performance Comparison for Winter 09 Release of Altium Designer Card Memory 2D 2D Transparent Insight Modes 5.0 4.6 4.4 4.4 4.3 4.3 3.0 3.6 3.9 4.0 3.6 2.0 1.7 3D Overall Improvement Over Altium Designer 6.9 6.63X 6.14X 5.55X 5.46X 5.49X 5.68X 5.00X 6.15X 6.76X 5.13X 5.67X 5.07X 2.85X
Radeon HD 4870 Radeon HD 3870X2 GeForce GTX260 GeForce 9800 GTX Quadro FX3700 GeForce 8600GTS Radeon X1950 Pro GeForce 7900GS GeForce 8500GT Quadro FX570 GeForce 6800* Radeon X1650 Radeon HD2400 Pro GeForce 7200GS*
512MB GDDR5 1GB GDDR3 896MB GDDR3 512MB GDDR3 512MB DDR3 256MB DDR3 256MB GDDR3 256MB DDR3 256MB DDR2 256MB DDR2 256MB DDR 256MB DDR2 256MB DDR2 128MB DDR2
5.0 4.8 4.8 4.3 4.3 3.7 2.7 2.8 1.7 1.7 1.8 1.1 0.8
5.0 4.7 4.7 4.3 4.1 3.3 2.4 2.3 1.4 1.4 1.6 0.9 0.7
5.0 3.8 3.5 3.5 2.7 1.7 1.2 0.7 0.7 0.6 0.4 0.6 0.4
5.0 4.5 4.3 4.2 3.9 3.3 2.4 2.1 1.8 1.8 1.4 1.2 0.9
0.3
0.3
0.8
0.1
0.3
4.98X
* The GeForce 6800 and 7200GS tests ran at 2048x1536 as 2560x1920 wasn't available on those cards. Their scores are slightly improved as a result.
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Real-time 3D Visualization
Cylindrical and Spherical 3D bodies^
The 3D Body object now supports 2 new extra 3D shapes, cylinder and sphere, apart from the existing extruded & generic STEP model. These shapes can be positioned and rotated similar to the existing 3D bodies. In this way, you can now create a host of objects not available through extruded modelling reducing or eliminating the time spent in other 3rd party tools generating complex 3D shapes.
Figure 4. Here a STEP model is loaded into a transparent 3D body.
There is also the ability to assign an external STEP model to a 3D body object. The model can be embedded into the PCB document or it can be linked to it. Linked models will always remain up-to-date in Altium Designer even if the source files change. You can even import STEP models such as housings and enclosures to visualize complete assemblies in the 3D workspace.
3D Models Visualization control^

The new 3D Models view in the PCB Panel allows batch changes to the opacity (transparency) of your 3D models. Presentations of modeled boards can be manipulated to ease navigation and visual checking of dense modeling. There are also added benefits of adding transparent enclosures to visualize your board in its final implementation environment. Using the tree list controls in this panel users can change the opacity of all 3D bodies, selected 3D bodies, or individual 3D bodies.
Figure 3. Separate and concise displays of multiboard assemblies in the PCB panel.
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Real-time Electronic and Mechanical Co-Design

3D visualization is only the first step towards significantly increasing your design productivity. In the latest release of Altium Designer, mechanical CAD data has been married with the process of PCB design, eliminating the need for negotiating design data between these domains and saving design time. Its now possible to link components directly with external STEP models. Make changes to those models in your mechanical CAD package and you can see those changes reflected in the PCB editor in real time.
Direct linking to external STEP models

Altium Designers 3D capabilities have been enhanced to support direct linking to external STEP models. This ground breaking technology promises to reduce the design iterations necessary to close the ECAD-MCAD loop. This means that electronics designers can bring mechanical assemblies or case designs done in MCAD software into Altium Designer. You can then work directly with the case design as it is being done, ensuring that the PCB will fit into the final enclosure. Interactively adjust the board layout, perform full interference/clearance checking between design objects and the case that surrounds them real-time linking between the electronic and the mechanical domains. Getting your designs to fit in the case is no longer a matter of luck or carefully counting grid points.
3D Interference / Clearance Checking

Real-time interference and clearance checking can be done as you work in 3D, giving immediate feedback while placing 3D bodies. Conflicts between models or assemblies can be seen and resolved before your board leaves the virtual world, saving valuable time. Clearance checking between 3D bodies is now incorporated into Altium Designers Component Clearance rules. Import your STEP models into Altium Designer and check for clearances and interferences using STEP data. You can also check your component for interferences against noncomponent objects like
Figure 5. Determine physical constraints on your board layout based on feedback from the models clearance.
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stand-offs or the edge of the case.
Create Board Outline from STEP model^

The new Create board outline from STEP model command adds a powerful way to define the PCB outline using a 3D model originating from an MCAD application and saves you the time spent manually translating your mechanical requirements into the PCB domain. Launched from the Design menu, this feature prompts the user to select a planar face within the 3D model which is used to create the board outline. Holes in the face are imported as either holes or board cutouts.
Figure 6. Once you have brought in a STEP model, you can pick a surface and create a board shape based on the model. Any holes are created automatically.
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More Realistic PCB Rendering and Accurate Object Geometry

On any board there will be a mix of dimensionally critical components, such as connectors, displays and switches that need to interface to the product case. There will also be components that can be represented by an approximate model, such as ICs. Since third dimensional mechanical models may not be readily available for all components, it is important that you have workable alternatives. The winter 09 release of Altium Designer delivers stronger support for modeling the components on your board and provides you with more options.
3D Texture Mapping Support^

The realism of 3D visualization has been improved in the Winter 09 release of Altium Designer to allow images to be texture mapped onto the top of existing 3D models. This allows you to apply more realistic looking textures, even images, to the surface of 3D bodies. Applying texture mapping is done consistently through the same interface controls and after an image file is added from the 3D bodys properties dialog, textures can be resized and positioned graphically.
3D Orthographic Projection
More precise object geometry can now be achieved through new PCB 3D Orthographic Projection. Exact positioning of components and details that might otherwise have been hidden from view is now possible with more realistic views of the board that enhance your ability to edit design data.
Figure 7. Note the three blue capacitor cylinders on the right. From this older view in Altium Designer 6, their exact position is unclear and their designators couldnt be seen from the camera position.
Figure 8. Here we see that the exact area of the board that is covered by the three capacitors is clear and no designators are obscured in the Winter 09 release of Altium Designer.
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Routing Technologies Extended for Intelligent, Faster Physical Design

When design speed is important, routing is a major factor in custom board design. Board densities are on the increase, as are layer stacks and the prevalence of dense packaging technologies, making the job of routing even trickier. The biggest improvements in routing come from new interactive routing technologies that support rather than direct the routing process. The interactive routing tools in the Winter 09 release of Altium Designer have been redesigned for more power, ease of use and speed. Basic operating modes include fast and robust Push and Shove of traces and vias, guided routing for rapid trace placement, Hugging of existing traces when routing, and improved Auto-Completion routing. These capabilities can be used independently or in combination to provide excellent control in all routing situations. Available from the Place menu, the new interactive routing supersedes and extends functionality from previous versions while still feeling familiar. Easy to use interactive routing shortcuts are found by hitting the tilde (~) shortcut key when routing. During routing, you can control the ability to route dynamically, guiding the routing path with the mouse, adding segments and rolling back unwanted segments. As with previous versions, left-click anchors the path up to the cursor position and you are still able to switch between modes on-the-fly, giving you complete control over the current route. Expanded support for the routing of differential pair signals and buses has also been introduced. These new routing modes include all of the capabilities of the new routing engine, including automatic walk around of existing objects, trace hugging, push and shove (including vias) and intelligent autocompletion of traces. These new modes inherit the speed, sophistication and smoothness of the new routing engine, extending this to multiple traces.
Push and Shove^

Powerful and fast Push and Shove technology allows you to plough through existing objects with ease, and under full rules-based control. It can push and shove traces and vias, and can even shove objects with a via hanging off of the trace end. This is a real time-saving feature when youre routing through high-density and complex board areas. Blocked routing paths are indicated by a halo on the end of the last legal trace position.
Figure 9. The new push obstacles routing can jump traces over obstacles as well as push vias and pads, automatically adjusting and maintaining traces connected to obstacles.
Walkaround^
Walkaround routing attempts to follow your cursor and find a routing path around existing obstacles. It also includes the ability to Hug existing objects such as traces. You can also use a combination of
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Walkaround and Push functionality that will trace around obstacles and Push fixed obstacles as required. Guided routing makes short work of even the most complicated routing designs. A new powerful pathfinding engine efficiently gets a trace from Point A to Point B by following your cursor path. You can still decide to continue on in the traditional fashion simply by clicking and continuing on as per previous behavior. If you change your mind on the current path, move the cursor back over the route and the trace automatically unwinds. Guided routing can be combined with Auto-Complete for maximum routing efficiency.
Figure 10. Simply move your mouse along the path you want to take and the trace intelligently follows the movement of the cursor to create a perfect, rules-constrained route.
Hugging^
Trace hugging can be configured to automatically follow the contour of adjacent objects while routing so you dont have to manually do it. Hugging assists with refining the routed path by smoothing corners as you are working. You can also swap to opposite route point and switch leader trace to give you control over where to start or continue routing from. Just guide the cursor and youll have perfect parallel trace groupings every time.
Auto-Complete^
Auto-Complete can save quite a bit of time and repetitive actions by completing traces and routing an entire connection automatically with a simple CTRL + Click at any time during routing. Especially helpful for finishing off complex multi-trace routing tasks; this intelligent feature is available in any routing mode provided that the router can find a suitable path and that a couple of basic requirements are met: the start point and target path must be on the same layer and the route can only be completed in accordance with design rules.
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Interactive Differential Pair and Multi-trace (Bus) Routing^

The new interactive routing tools can also handle differential pair routing & multi-trace (bus) routing with ease. Conflict resolution modes such as Push, Hug and Push, and Walkaround are all supported. There is also a mode that disables all of these constraints. Layer changing is supported in the same way as the Interactive Route Tool for the following:
Next Layer Previous Layer Switch Layer for Current Trace Add Fanout Via and suspend Add Via (No Layer Change).
Favorite Widths and Via Sizes can be chosen and changed interactively. Routing corner styles of 45 and 90 degrees are supported. Via patterns can be toggled interactively between perpendiculars to the route and staggered. The Interactive Differential Pair Router also supports the Min/Preferred/Max gap rules.
Integrated Pin Swapping

Designers can now intelligently swap subnet pins on-the-fly for both differential pair and single-ended signals during interactive routing. This is particularly useful with FPGA devices, which often allow a particular signal to be brought out on a range of pins. The integrated routing command uses pin swapping information available within the project.
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For example, when routing towards a FPGA IO pin that can be swapped with other IO pins in the same bank, the router will highlight the swappable options. And if the new route is terminated on one of the swap options the pin swap is automatically performed.
Obstacle Avoidance During Drag Operations

Interactive routing has been improved to better utilize the Ignore, Walk-around, and Push and Hug commands during drag operations. The dragging command has been improved to leverage the power of the interactive router. Dragged tracks and vias are able to push as well as hug obstacles.
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Internal Plane Representation^

Internal plane support in Altium Designer has been significantly upgraded and enhanced. Previously, internal planes did not accurately model the interaction of primitives (primarily pads and vias) within the plane, occasionally leading to unexpected discrepancies in CAM output and resulting in significantly lower standards of analysis for internal planes compared with signal layers. Internal planes are now modeled and displayed in 2D and 3D with 100% accuracy in the PCB editor. DRC includes live connectivity checking of planes that will detect net breaks caused by inadvertent plane splits, isolated pads and vias and starved thermal relief connections.
Matched representation of the plane in both PCB and CAM is now ensured so that you can confidently model internal planes without worrying about the CAM output. The Design Rules Checking (DRC) has been improved in order to detect breaks in a net on the plane layer caused by plane regions split into multiple unconnected regions, isolated pads or vias and starved thermal relief connections. 3D Visualization has been further improved in this release to support improved internal plane representation. Plane connections, relief or direct, can be seen on the individual plane layers when viewing the PCB in 3D.
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Higher Trace Density Support for Manufacturing Technology

As manufacturing technology improves and allows higher trace density, its becoming increasingly important to allow via sizes to be set independently for each signal layer and there is an increasing demand for complex pad geometries including pads with offset holes.
Full Stack-Up Definition for Vias

Its now possible in the Winter 09 release of Altium Designer to define via stack-ups that have varying sizes of round shapes on any of the signal layers.
Figure 11. Updated via dialog showing the new stack-up modes (very similar with the pad dialog)
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Offset Holes in Pads

Its possible in the latest release to offset the pad land patterns from the hole. The option allows the user to offset the pad land pattern from the pad hole and uses the center of the pad as the origin. The offset is useful for testpads and can lower the drill hole/via count requirement needed for testpoints. The new offset option allows the user to create offset pad holes in a simple, intuitive fashion without having to create additional copper areas or the need to combine additional through hole pads.
Real-Time Manufacturing Rule Checking before Fabrication

In past releases, last-minute checking of potentially release-stopping fabrication issues had to be done. In the latest release of Altium Designer, new manufacturing DRC checks have been added in order to avoid these subtle but nerve-wracking problems. Additionally, two rules have been updated to stay up to date with the changing nature of todays manufacturing technology. This range of checking, available right through the PCB editor can be done in real-time during the design process and before the fabrication files are generated, helping you avoid unnecessary design re-spins. As part of a complete design environment, the path from design to manufacture is now substantially streamlined, increasing design productivity and helping get to market faster.
Hole to Hole Clearance

Designed to prevent double drill hits and overlapping holes making it through to CAM tools, the new rule also ensures manufacturing compatibility of stacked microvias. When enabled, it will flag any multiple vias / pads at the same location or overlapping pad / via holes. There is also a flag to allow stacking of microvias.
Minimum Solder Mask Sliver

This new rule is designed to identify narrow sections of solder mask that may cause manufacturing problems later. Ensuring that there is a minimum width of solder mask across the board, it checks the distance between any two solder mask openings that are equal to or greater than the user-specified value. This includes the pad, vias and any primitives that reside on solder mask layers. It checks Top and Bottom sides independently.
Net Antennae
In the past releases of Altium Designer, net antennae could only be checked in the CAM editor. Now in this release, new checks can be made on tracks/arcs on signal layers for unterminated ends (ends that do not finish with another track/arc/pad/via). This rule operates at a net level in the design to flag any track or arc end that is not connected to any other primitive and thus forms an antenna. The specified value is the set tolerance of how long a stub must be before the rule will flag an error.
Silk Over Component Pads

This new rule ensures correct clearance between silk screen and copper in component pads that is exposed through openings in the solder mask. This check ensures that the distance is greater or equal to the value specified by the user.
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Silk to Silk Clearance

The legibility of silk layers will be ensured with this new rule added to the Manufacturing Rule set. Silk to Silk Clearance checks the clearance between any silkscreen text and other silkscreen primitives. The check ensures that the distance is equal to or greater than the user-specified value.
Minimum Copper Width

Previously, the existing minimum width rule operated only at the individual primitive level which occasionally resulted in missed and false errors. This rule now fully analyzes the physical copper that should exist in the manufactured board. When enabled, this rule ensures that the minimum width of all of the primitives in one net will be greater or equal with the user specified Min Width constraint. Only the following electrical objects will be checked: track, arc, fill, pad, via (the polygon regions are already checked for narrow necks when a polygon is re-poured).
Acute Angle^
The acute angle rule has been significantly improved. Previous versions of this rule performed only a simple analysis of track pairs resulting in many false violations being reported while also missing common cases caused by non-track primitives. With the exception of regions the new rule analyzes the actual copper that will be formed by primitives looking for problem areas. In addition, the visual indicators for this rule have been updated providing clear indication of the problem area.
Figure 12. Acute angles between SMD pads and existing tracks can now be checked in the winter 09 release.
^ Feature introduced in the Summer 08 release of Altium Designer
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Broken-Net^
Prior to the winter 09 release of Altium Designer the Broken Net rule created one violation per broken net and listed all connected subnet information often making identification of the break a laborious task. The newly improved rule now creates one violation per break (multiple violations per net are possible) and identifies its physical location in a manner similar to the net analyzer. Combined with greatly improved drawing this makes identification of these breaks simple and easy. Violations will be identified and drawn in one of two styles depending on the nature of the break. Extremely short (or zero length like missing vias) breaks are identified with a circle at the location whilst longer breaks are identified with a line.
Figure 13. A blind via that doesn't extend through to the bottom layer track is clearly identified
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Figure 14. Longer breaks are identified with a line between the closest points on each subnet
Easier Design and Project Navigation with Design Insight

Design projects have quickly become complicated, involving a large number of varied design documents each with potentially massive amounts of data. Faster, easier and more intuitive project navigation is available with Design Insight. Design Insight provides a number of exciting features to help you navigate at the project, document and even connectivity level, allowing automatic preview without having to physically open multiple sheets.
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Project Insight^
Figure 15. Hover over your project icon in the Projects panel to see your project preview.
Project Insight provides you with a preview of all of the documents within your project. Clicking a document in the preview will make that document the active document. Project Insight is provided for schematic, PCB and text documents.
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Document Insight^
Figure 16. Hover over your document icon in the Projects panel or Document Bar to see your document preview.
Document Insight provides you with a preview of your selected document from both the Projects Panel and the Documents Bar. Clicking the Document Preview from either of these locations will make that document the active document. Document Insight is provided for schematic, PCB and text documents.
Connectivity Insight^
Connectivity Insight provides you with a list and preview of all documents in your project that are connected to the selected net object. A list of documents is displayed with the current document highlighted and in preview mode, with the selected net highlighted. Hover over the other documents in the list to see the selected net highlighted. Your selected net will remain highlighted on alternate sheets for ease of navigation.
Figure 17. Click on a document in the hierarchy tree to navigate to that document.
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New - Cadence Allegro^ and Zuken CADSTAR Importers

Cadence Allegro PCB Importer
Allegro ASCII PCB (*.alg) designs can be imported into Altium Designer using the Import Wizard (File Import Wizard). Options for layer mapping and configuring a report log are also available. Files are converted to Altium Designer PCB document format (*.PCBDoc) and are added to a PCB project (*.PrjPcb). To translate your binary PCB designs (*.brd), you need to have Version 15.2 or 16 Allegro installed on the same machine as Altium Designer. Alternatively, you can use the Batch File included in your installation to translate binary designs (*.brd) to ASCII format (*.alg) on any machine, which can then be translated in Altium Designer. In this way, you only need one version of Allegro installed to convert all of your files to ASCII.
Figure 18. Tailored for Allegro users, you can easily drag and drop your designs from project folders directly from Windows Explorer into the Projects Panel.
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Zuken CADSTAR Importer

Zuken CADSTAR designs can be imported into Altium Designer using the Import Wizard (File Import Wizard). The importer does not support binary CADSTAR files. Files must first be converted to a CADSTAR archive file (*.cpa or *.csa.) before importing into Altium Designer. The following CADSTAR file types can be imported into Altium Designer: PCB Design Schematic Design PCB Component Library Part Library and Schematic Symbol Library.
The following table describes the types of CADSTAR files the importer supports with the description of how to convert the CADSTAR binary file format to an archive file format and the equivalent Altium Designer output. CADSTAR File Type Export to CADSTAR Archive Altium Designer Output
PCB Design (.pcb)
Use CADSTAR, File Export to convert the binary pcb design (.pcb) to CADSTAR PCB archive (.cpa) Use CADSTAR, File Export to convert the binary sch design (.sch) to CADSTAR PCB archive (.csa)
Altium Designer PCB document (.pcbdoc)
Schematic Design (.sch)
Altium Designer Schematic document (.schdoc)
PCB Library (.lib)
Use the archive tool in CADSTAR, Libraries PCB Components to convert the binary pcb library (.lib) to CADSTAR PCB archive (.cpa) The part library (.lib) file is already in ASCII file format. You do not need to do any conversion on the part library. Use the archive tool in CADSTAR, Libraries>Schematic Symbols to convert the binary symbol library (.lib) to CADSTAR schematic archive (.csa)
Altium Designer PCB Library (.pcblib)
Part Library (.lib) and Schematic Symbol Library (*.lib)
The importer uses both the parts.lib and the symbol schematic archive (.csa) to output an Altium Designer Schematic library (.schlib)
The importer supports files from CADSTAR versions 9 or 10
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Design to Manufacture Improvements to the Output Job Editor

Multiple Output Publishing^
The OutputJob Editor is a central location for you to configure and save your publication outputs. Increased flexibility for the generation of different outputs provides better data management and design collaboration for your projects. The OutputJob Editor has also been enhanced to include a new Output Media column. The Output Media view allows different sets of outputs to be created and configured independently. This can include configuring a number of Print, PDF and File Generation outputs. Once configured in your OutJob, these outputs are ready for re-use and are updated every time you update your project.
Figure 19. The improved Output Job Editor showing the Output Media column
Support for Bill of Materials in Output Jobs & PDF Files

The Bill of Materials can now be either printed directly or published to PDF file using the OutputJob Editor or Smart PDF. This makes it possible to consolidate all of the outputs into a single source document that can be shared throughout an organization. Bill of Materials outputs are available from the Report Outputs section of your OutJob and can be created either for a single document or for your whole project.
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Additional Report Generation ERC and DRC Reports

Additional output generators allow you to further streamline and automate the design release process. In particular, the inclusion of ERC and DRC Report Output Generators which constitute a powerful enhancement to the OutputJob Editor. The ERC Report can now be easily added to your final documentation, demonstrating that the design has been verified to be free of any violations. The ERC Report Output Generator is versatile in that it can be output to any of the listed output media, Print, PDF, Web, or Generated Files. You can configure separate Electrical Rules Check Setup for your Reporting purposes. These settings are similar in nature to the project settings, but are stored locally in the OutJob. The DRC Report can also now be easily added to your final documentation. The DRC Report Output Generator runs a PCB DRC based on the PCB settings and publishes the results in either Print, PDF, Web or the traditional file formats. The report output is similar in format to that created through the PCB Editor and uses those settings specified in the Design Rules Check dialog.
Script Execution Output Generator

The Script Execution Output Generator makes use of custom scripts to perform tasks through the Output Job Editor. In order to use a custom script, the script file must first be added to the project. Once your script has been added to your project, the Script Output will become active in the Report Outputs section of your OutJob. The addition of the Script Outputter to the OutputJob file means you can configure and automate more of your special tasks in your project.
New Output Media Publish to the Web

The new Publish to Web output medium enhances collaboration by making web publication of design outputs easy and configurable. Outputs can be published on the following web hosted media: FTP, S3, WebDav as well as locally. Publishing project documents such as Schematic diagrams, PCB layouts, Bill of Materials reports and Electrical Rules Checks allows the electronics designer to communicate via the web to a wider audience.
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Version Control Improvements^

Revision management of design data using third-party version control systems is a foundation of Altium Designer's support for design team collaboration.
Version Control Revision Number

The schematic documents themselves can display the revision number as extracted from the VCS database. Place the special string =VersionControl_RevNumber, to display the document revision number. Additionally, if this special string is placed in a schematic component, the version number of the library can also be displayed in the schematic document.
Storage Manager Improvements

The Storage Manager panel has been simplified by combining both the local history view and the VCS Revision History view into one single file history time line. To switch between the classic view and the combined view, right click on the bottom pane and choose either Switch to Classic View or Switch to Combined View depending on your current view. The combined view also shows details for Releases.
^ Feature introduced in Summer 08 release of Winter 09
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Live Linking to Supplier Data

In the latest release of Altium Designer, component information was only as accurate as the last update of the company database. Now, supplier information is available through live linking at design time. This live linking feature falls within the broader design release management concept and allows designers to consider important information such as cost and availability when choosing components. Live data is available at the library level, during design, and at release time. Suppliers databases can be searched from within Altium Designer (with Digi-Key being the first supplier), and library parts can be matched to supplier items. Linked parts can be updated at any time during the design process or at release time, say for a Bill of Materials, ensuring you always have up to date information that is 100% accurate with the most up to date vendor and pricing information available.
Figure 20. Supplier Search provides access to the most up to date supplier data via the web
You can speed up your search by suggesting Keywords such as Comment, Description or Name. Set these options and others in your Supplier Preferences.
Library Search Improvements

The Library Search interface has been simplified to allow for quicker and more efficient queries. The new interface allows you to build simple queries using auto-populated fields and values based on your selected library. You can use the Simple Search to search both Available Libraries and Libraries on Path, including Database Libraries.
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Enterprise-Style Management of Design Data for Production and Release

Managing the process of releasing a design for prototype or production is a key aspect of the product development process and an important part of the overall enterprise data management function. The Release Manager provides a clear vision of the project's history, as well as the dependencies throughout the release. Designers can identify the moment in time at which the design was released, and go back to this point, retrieve, modify and re-release the design with updated or corrected dependencies.
Using your Preferences, you can define your Release Repository and even decide if your releases are to be read-only. In addition, you can choose whether or not to create your Output Media at the time of release and if you do create it, whether or not you want your Output Media distributed (only applicable for Publish to Web media). Combined with the enhanced Output Job Editor, the Version Control Revision Number special string and the ability to link to Supplier Data the Release Manager is a powerful new tool, enabling you to streamline the development process.
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Custom Instruments for FPGA-based Design^

Virtual instrumentation rises to a new level of control with the Custom Instrument a fully customizable instrument that allows you to monitor and control signals within your FPGA design. Moving hardware functionality inside devices such as FPGAs means that traditional circuit test methods using physical connections to signals traveling between components are no longer viable. In traditional FPGA design flows simulation has been seen as a replacement for direct testing. But simulation is extremely difficult and time consuming when applied at the system level. This can be overcome with virtual instrumentation.
Figure 21. Monitor and control signals in your design with your own, fully customized instrument.
Similar in look and feel to the existing DIGITAL_IO instrument, the interface is also quite intuitive. As part of the instrument's configuration you are able to create your own GUI this interface is seen once the design is programmed into the target device and the instrument is accessed. A palette of standard components and instrument controls enable you to quickly whip up a useable panel. Use the various properties associated with a control to customize it further, even the title of the instrument.
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Figure 22. Define the look, feel and operation of the instrument exactly how you want it.
Defined IO signals can be hooked up directly to the various controls in your custom GUI. However, for the passionate scripter writing your own DelphiScript code to interface to signals in your design is also available. Scripts are fired whenever the instrument polls or execution can be tied to specific events.
Figure 23. Use scripting to provide even greater control when processing signal IO.
At the click of a button you can switch to editing your code within the more familiar scripting editor, complete with its syntax highlighting and code-related display benefits. The configuration information itself is stored within a separate file (*.Instrument), allowing for portability of customized instruments between projects and installations why use someone else's instrument, when you can take your favorite with you? When an FPGA design is processed and a custom instrument is detected on the Soft Devices JTAG chain, Altium Designer retrieves the instruments configuration information. There are two methods from which it does this, selectable by the user as part of the configuration:
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From the project the configuration information is retrieved from the corresponding .Instrument file for the instrument, which resides alongside the project file. The project must be open in order to show the instrument from the Devices view. From the FPGA device the configuration information is downloaded with the design to the physical device, and stored in Block RAM. It is retrieved directly from here and the project need not be open. The level of flexibility and customization enabled by the new custom instrument opens a new range of possibilities to designers working with soft device intelligence programmed into a target platform.
A more Intuitive Logic Analyzer^

A number of improvements now make the configurable Logic Analyzer instrument more intuitive and easier to use during debugging sessions. Configuration and ease of use improvements for the instrument include automatic selection of capture width, indication of memory required, ease of external memory selection and indication of used widths for a signal set, just to name a few.
Figure 24. A new-look configuration dialog allows you to assign styles to signals as well as keeping the instrument armed indefinitely.
Greater Control over Digital Waveform Display^

More control over how captured signal information is presented in the Digital Waveform Viewer is now possible with this release. Support is enhanced for Wave Styles the viewer will display signals using the applicable styles assigned to them as part of the Logic Analyzer's configuration. Styles are defined on the Wave General page of the Preferences dialog (DXP Preferences).
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Figure 25. Assignable signal styles putting you in the driver's seat for captured digital waveform display!
When defining a style, you can determine the color used for waveform display at both the individual signal (Color) and bussed signal (Group Color) level. You can also define the Extend Type (application of dotted extension lines) as Positive Edge, Negative Edge, Both or None. Two default styles are provided: Clock and Default. The latter will be used for all signals unless you expressly assign a custom style during configuration of the LAX. These two styles, although editable in their graphical attributes, cannot be removed or renamed.
Signal Highlighting right-click on a signal and use the new Highlight command to make the signal text bold and its corresponding waveform thicker. Bus Order Reversal - right-click on a group (bussed) signal and use the new Reverse Bus Order command to reverse the bit order accordingly. Optional Grid Lines both vertical and horizontal grid lines can now be toggled ON or OFF. Controls are available from the Wave General page of the Preferences dialog.
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FPGA Tool Feedback^

Feedback messaging from the Build stage of the Process Flow has been streamlined and made easier to interrogate and analyze. Build (vendor tool) related messages are kept to a minimum in the Messages panel, with the ability to cross-probe from errors and warnings to the corresponding message in the Output panel. The latter becomes the focal point for more detailed build information. The detail contained within the Output panel can be very extensive. To aid in finding the information you need in a fast efficient manner, search functionality has been added to the panel hit Ctrl+F and away you go!
Figure 26. Cross-probe from errors and warnings in the Messages panel to corresponding entries in the Output panel.
Custom FPGA Logic Development in C^

Altium Designer comes standard with a large selection of custom FPGA-based functionality available as royalty-free FPGA-based components. Components range from basic logic blocks to sophisticated peripherals and processor cores. These components can be used to rapidly construct FPGA-hosted systems. Extending this supplied functionality; Altium Designer supports the design of custom logic blocks. Previously this involved using the FPGA library components to create custom logic functions at the schematic level, or defining custom logic using either Verilog or VHDL Hardware Description Languages or a combination of all three. But now a new type of sheet symbol a C code symbol has been added to the system to allow blocks of C code to be added within the schematic design hierarchy.
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Simply write the functionality required in Altium's C code editor and then sit back as the C-to-hardware compiler converts the code into VHDL or Verilog (depending on your defined netlisting preference). From the schematic sheet, the underlying C source file is referenced in much the same way as a schematic or HDL file. Instead of a sheet symbol however, the new C code symbol primitive is used. Each C code symbol represents one top-level exported function, resident in the referenced C source file. Access to the parameters of the function is made using C code entries placed on the symbol and functionally similar to sheet entries on a sheet symbol. These entries can be wired to other components on the schematic, allowing for transfer of data. The top-level function may call other C functions, which themselves may be distributed among several source files.
Figure 27. Use a C code symbol to interface to your C-coded custom FPGA logic.
Depending on your preferred method of working, there are two ways to create the interface to your custom logic:
Place a C code symbol and add the required parameters either by manually placing C code entries or by defining the parameters directly in the properties dialog for the symbol. Once done you can then use a command to generate a shell C source file for addition to your project. Write your C code first and then use a command to generate the C code symbol and related C code entries automatically. If your source file contains multiple functions, you will be able to choose which function you wish to export.
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Custom Wishbone Interface Component^

In order to provide an easy, modular way to rapidly build FPGA-based system designs, Altium uses a non-proprietary Wishbone bus interface to connect together the various FPGA-based peripheral component blocks available for system construction. Previously designers have not been able to easily create or import their own custom peripheral components to connect to a Wishbone-based system. But now designers can easily extend the functionality that is supplied with Altium Designer and create or import custom functionality through the new Custom Wishbone Interface component (WB_INTERFACE). The Custom Wishbone Interface component enables you to build a custom Wishbone peripheral in a design, extending your 32-bit FPGA systems through the creation of custom FPGA logic and, what's more, you can build custom Wishbone peripherals without needing to know any details of the Wishbone bus. The end result is that this greatly increases the scope of applications that can be developed in Altium Designer and opens up the system for designers to build their own custom peripheral libraries, or to develop custom peripherals that can be used by others. The Custom Wishbone Interface component has a fully configurable interface for transferring data to/from connected logic, and a Wishbone bus to interface with a host processor. The individual units of this configurable interface are referred to as items. The interface can include a combination of one or more of the following items:
Internal Registers allow values to be read from, and/or written to, connected logic. Command Sets allow operations to be enabled on connected logic. External Address Ranges allow access to blocks of addresses on connected logic.
Customization is performed through configuration dialogs associated with the component, after placement on the OpenBus System or schematic document.
Figure 28. Configure the Wishbone Interface to communicate with your custom logic as required and extend the capabilities of your design.
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In addition to making the task of building custom Wishbone peripherals far easier, the Custom Wishbone Interface component provides the ability to generate C code based on the items specified in the interface simplifying interaction with the component from the embedded code running on the host processor.
Field Dashboard for FPGA-based instruments

Getting visibility on circuitry inside a programmable chip is one of the challenges of moving functionality into a soft domain. Once functionality is moved inside a programmable chip such as an FPGA, traditional test instruments often dont give designers a clear picture of what's going on with the design. And its not possible to attach physical probes to bits of the circuit inside the chip. Altium pioneered the concept of LiveDesign and embedding virtual instruments inside an FPGA along with the circuit to solve this problem. Virtual instruments communicate with Altium Designer and let designers stimulate and probe a design live in the chip. With Altium Designer's Custom Instrument component, fully customizable instrumentation can be created and programmed into FPGAs for any purpose. For an Application Engineer, or Service Engineer out in the field, access to the GUI of a Custom Instrument embedded within an FPGA design needs to be fast, straightforward, and not limited to the use of a PC with Altium Designer or the Viewer Edition of Altium Designer installed. To this end, Altium has created a standalone application to do just that the Altium Instrument Dashboard. The Altium Instrument Dashboard is a free, downloadable application, that can be installed on any PC. Out in the field, a trusty laptop computer loaded with the Dashboard is all that is needed to access and interact with custom instrument controls. Accessible from the Windows System Tray, simply connect your laptop to the target in which the design is currently running and launch the Dashboard. Even easier, there's an option to have the Dashboard open when Windows starts up! Altium's Instrument Dashboard frees designers from having to spend significant time and energy simulating the FPGA-hosted circuitry being developed.
How it Works
Similar to Altium Designer's Devices view, the Altium Instrument Dashboard is enabled by ensuring its Live option is enabled right-click on the system tray icon for the Dashboard to access the menu containing this and other commands. Once live, it essentially 'scans' the Soft Devices JTAG chain for any virtual instruments that it supports and displays them accordingly on the desktop.
How Instruments are Displayed

When creating and configuring a custom instrument in Altium Designer, options are available relating to display of the instrument when accessed using the Altium Instrument Dashboard. These options allow the instrument to be displayed either in a standard Dashboard Instrument Rack panel, or as a custom, standalone panel. You can specify whether or not a Custom Instrument should be visible when the Dashboard is first enabled and can even open the GUI of one Custom Instrument from within the GUI of another!
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Figure 29. Example instruments detected and displayed on the desktop using the Altium Instrument Dashboard.
Supported instruments
The Altium Instrument Dashboard has primarily been built to access embedded Custom Instruments, but the following virtual instruments are also supported:
Frequency Generator (CLKGEN) Frequency Counter (FRQCNT2) Terminal Console (TERMINAL) Legacy Digital IO Modules (IOB_x)
Note: To access and display Custom Instruments using the Altium Instrument Dashboard, the Configuration Retrieval option, specified when configuring the instrument, must be set to From FPGA.
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Plug-n-Play Software Platform Builder

The latest release of Altium Designer introduces a new feature suite: the Software Platform Builder. This intuitive editor allows you to easily assemble a Software Platform for your hardware. It's the electronics design equivalent of software development in the commercial software world, where designers drag and drop pre-formed blocks of code (sometimes developed for earlier projects) to create software applications. The Software Platform is a software framework to facilitate writing software to access peripheral devices on the NanoBoard that are part of your FPGA design. It also facilitates the implementation of software protocols and it provides extra functionality that you can use in your application, such as multithreading. In essence it is a collection of software modules, delivered as source code. You can add these modules to your embedded project to take care of various low level routines that are required to control or access peripherals. The modules also provide an interface to the application, offering specific functionality (for example, set_baudrate(), a function to dynamically change the baud rate). The Software Platform Builder is the graphical user interface that you use to configure and add modules to your project. To create a Software Platform, specific for your project, you use the Software Platform Builder. The Software Platform Builder becomes available when you add a special document to your embedded project: a Software Platform file with extension .SwPlatform. This document both represents the Software Platform for your project and provides you with a graphical interface to select and configure the modules you need. What you need, of course, depends on the peripheral devices on your FPGA design that you wish to access in your application.
Figure 30. Quickly build your software platform using the feature-rich and intuitive Software Platform Builder.
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The Software Platform Builder can read your FPGA design and import the appropriate low-level modules for the peripherals on your FPGA design. You can use this import as a starting point and add more (higher-level) modules to the Software Platform file. The assembled software platform provides functionality to your application code through APIs. Altium Designer comes supplied with drivers for all of hardware devices available on the NanoBoard, as well as many high level services. These services include: Storage Services for accessing files and folders on SD cards, IDE drives, Compact Flash cards and flash memory Networking Services to provide access to ethernet networking Kernel Services providing POSIX compliant multithreading capabilities GUI Services allowing the quick construction of modern graphical interfaces Multimedia Services for audio and video functionality
The Software Platform can even be extended by adding your own Software Platform components!
Getting Help
You can get detailed information on using components and services from within the Software Platform Builder itself. To get help specifically about the API of a service, simply select a service in the Software Services region and click the API Reference button or press F1. The information will be presented in the Knowledge Center panel. To inspect the public header file(s) of a component, simply right-click on a component in the Device Stacks region and choose Header Files name.h.
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Enhanced Devices View

The functionality of the Devices view (View Devices Views) has been greatly enhanced for the latest release of Altium Designer. You can now control exactly what you see, and how you see it. When developing your embedded intelligence, any combination of hardware connected to your PC could exist. For example:
A single NanoBoard Two or more daisy-chained NanoBoards A NanoBoard and a third party development board One or more NanoBoards and a custom board.
The Devices view is no longer constrained to showing only hardware that is connected to the PC over a single port (USB or Parallel). It can now be configured to display the hardware that is connected to the PC over multiple ports. What's more, multiple ports can be displayed in the same view or, should you prefer, multiple views.
Figure 31. Display the hardware development platforms connected to the PC using multiple ports, all from within the same Devices view.
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Signal Harnesses in FPGA and Core Projects

In the latest release of Altium Designer, the use of signal harnesses has been extended to FPGA and Core projects. The OpenBus System has taken advantage of this in order to reduce the complexity of the interface exported from OpenBus System documents. OpenBus components can now export a signal harness interface to higher level sheets.
Figure 32. Use of signal harnesses when exporting the interfaces of OpenBus components enhances the readability of the toplevel schematic sheet.
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Configurable Generic Library

Altium Designer Winter 09 heralds the arrival of a new integrated library of configurable generic FPGA logic components FPGA Configurable Generic.IntLib. The aim of this library is to provide many of the logic components found in the existing FPGA Generic.IntLib, but delivered as single configurable components, enabling you to design in a far more efficient and streamlined manner. The FPGA Configurable Generic integrated library can be found in the \Library\Fpga folder of your Altium Designer installation, and is included as part of the default installed libraries for your convenience.
Figure 33. Streamline designs using configurable generic logic components.
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Global Knowledge Repository

One way to make electronic design easier is to help engineers share their knowledge, experiences and expertise, and the Altium WIKI is a great place to do this. The Altium WIKI is globally available and includes all things Altium from online help, frequently asked questions, information about Altium People and more. The Altium WIKI also includes Release Notes for each release, information for Beta Users, Whats New in Altium Designer, links to videos and other handy hints. Based on your privileges, you can add comments to pages or even edit the WIKI content.
With the Altium WIKI, documentation is no longer limited to the release cycle.
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Altium Designer Deployment Options

Altium Designer is different from any other available solution because it unifies hardware, software and programmable hardware development and allows all aspects of an electronic product to be designed and managed within a single system. This unlocks new ways to create and bring the next generation of electronic products to market. Altiums solutions allow engineers to take a design from concept to manufacture in a single application. This eliminates the need to purchase and integrate numerous add-ons at extra cost in order to increase functionality or make up a complete solution a substantial value for todays business climate. Whether youre an engineer, the manager of a design team, an executive of a larger enterprise, or an educator, Altium provides flexible licensing options that will put the right capabilities on every desktop to match your business needs. Altiums solutions are complete and include everything in the box so engineers can take their design from concept to manufacture in a single application. This completely eliminates the need to purchase and integrate numerous add-ons at extra cost in order to increase functionality or make up a complete solution.
Altium Solutions
Altium Designer Core Feature Set
Altium Designers core feature set allows engineers to exploit the potential offered by todays largecapacity reprogrammable devices. This includes complete front-end engineering design system for both PCB board-level and programmable logic design. For more information visit http://www.altium.com/products/altium-designer/en/features--licensing.cfm
Altium Designer Extended Feature Set

The Altium Designer core feature set extended to include full custom board design and manufacturing capabilities. This includes complete front-end engineering design system for both board-level and programmable logic design, and full 3D PCB design and editing capabilities. For more information visit http://www.altium.com/products/altium-designer/en/features--licensing.cfm
Innovation Station
The Innovation Station includes an Altium Designer core feature set time-based stand-alone 12-month license (see below for license and installation details), and also includes the Desktop NanoBoard which is owned outright. For more information visit http://www.altium.com/altiuminnovationstation/
Upgrade with Confidence

Altium Software Assurance automatically covers users for all version upgrades and updates during the 12 month agreement term. Altium Software Assurance helps manage costs with regular predicable annual payments and provides access to the latest technologies including the 6 monthly major version releases. Software Assurance can be purchased with Altium Designer perpetual licenses to ensure automatic version upgrades and updates during the agreement term. Altium Software Assurance is included with any time-based license option as standard.
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Licensing Options
Time-Based license
An Altium Designer time-based license gives you 12 months full access to Altium Designer, and requires renewal 12 months after the date of activation. A time-based license includes Altium Software Assurance as standard so all upgrades and updates can be received as soon as they become available.
Perpetual License
An Altium Designer perpetual license provides full access to the current version at the time of purchase, as well as any service packs that maybe released for that version. Perpetual licenses include a 30-day upgrade warranty, however for added protection. Altium Software Assurance can be combined with perpetual licenses for automatic access to all version upgrades and updates during the agreement term.
Installation Options
Standalone License
A standalone license allows the user to install and use Altium Designer on a single computer.
Floating License
A floating site license allows the simultaneous use of Altium Designer on as many machines as needed and use of the software is automatically controlled by a central licensing server. Pay for the number of users you want to provide access to each floating license.
Upgrading your Altium License

Our commitment to continuous product development means that every release pushes the boundaries of whats possible in electronics design, and the Winter 09 release of Altium Designer is no exception. For more information on this release and how to upgrade your license visit: http://www.altium.com/products/altium-designer/en/upgrade.cfm .
More Technical Information

For the Altium WIKI which includes more technical information on this release, visit: https://wiki.altium.com/display/ADOH/New+Features+in+the+Winter+09+release+of+Altium+Designer
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Altium Designer Winter 09 Technical Review

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