0 hardware Manual
Rev. 1.0
Release: 2008-10-28
Contact information
For additional information, please visit: http://www.embedinfo.com
SBC2410-III V2.0 User Guide Rev. 1.0 28 October 2008 Embest Info&Tech Co., LTD 2 of 13
Table of Contents
SBC2410-III V2.0 HARDWARE MANUAL.................................................................................................... 1 CHAPTER 1 OVERVIEW ..................................................................................................................................... 5 1.1 Photo of the product ............................................................................................................................... 5 1.2 Structure block diagram ......................................................................................................................... 5 1.3 Characteristics ....................................................................................................................................... 6 1.4Physical memory distribution chart.................................................................................................... 7 CHAPTER 2 INSTRUCTIONS OF MAIN BOARD ..................................................................................................... 8 2.1Circuit interface diagram ..................................................................................................................... 8 2.2 Description of CPU ............................................................................................................................. 8 2.3 Description of SDRAM ....................................................................................................................... 9 2.4 Description of FLASH......................................................................................................................... 9 2.5 Power supply interface (power_in) ................................................................................................... 9 2.6 Serial port 0 (COM0RS232COM0TTLCOM0) ........................................................................ 9 2.7 Serial port 1 (COM1RS232COM1TTLCOM1) ...................................................................... 10 2.8 serial port2 (TTLCOM2) ................................................................................................................... 10 2.9 Description of network interface (RJ45) .........................................................................................11 2.10 USB Host interface (J2) ..................................................................................................................11 2.11 USB Device interface (J1) ..............................................................................................................11 2.12 ADC interface (AIN).........................................................................................................................11 2.13 JTAG interface (JTAG) ....................................................................................................................11 2.14 Description of SD card interface (SD) ......................................................................................... 12 2.15Description of selecting booting mode (LCDVDD)...................................................................... 12 2.16Description of AUDIO interface (PHONEAUDIO_OUTMIC_IN) ....................................... 12 2.17 Description of LCD interface (LCD) ............................................................................................. 13
Preface
SBC2410-III V2.0 is a highly-integrated industrial control single-board computer. CPU It employs Samsungs S3C2410AL-20 controller (ARM920T ARM Thumb Processor, 16-KByte Data Cache, 16-KByte Instruction Cache). It provides multiple storage modes, e.g. 64MB SDRAM, NANDFLASH, SD card (a card storage device) interface. USB interface provides multiple communication interface modes, 10/100M Ethernet, 2.5 inch IDE hard disk, Audio,3-channel serial port, 1-channel USB Host, 1-channel USB Device. Besides, it provides Real time clock, watchdog, 2-channel ADC and LCD display.
Chapter 1 Overview
This document mainly describes hardware circuit interfaces of SBC2410-III V2.0 and their characteristics, and describes how to use each hardware interface in details.
TFT-LCD Touch ADC Audio out RTC JTAG Port SD card USB host & device port IDE 4 KEY
SDRAM
S3C2410
NandFlash
1.3 Characteristics
64MB SDRAM at 100MHz 64~256MB NandFlash (optional configurations: 64MB, 128MB, 256MB; standard configurations: 64MB) 1 SD/MMC card socket 1-channel USB 1.1 Full Speed host ports(12Mb/s max) 1-channel USB 1.1 Full Speed Device Port(12Mb/s max) LCD display, supports various monochrome/ false color/ true color LCD screen. STN LCD screen, supports 16-level gray screen or 256 color screen, besides, it can be connected with STN screens of various sizes, e.g. 640480, 320240, etc. For 256 color screen, it supports maximum size of 40961024. For TFT LCD screen, it supports 1, 2, 4, 8-bpp color, also supports TFT LCD screen of various size, e.g.: 640480, 320240, etc. For 64 K-color screens, it supports maximum size of 20481024 3 serial interfaces.COM0COM1 provide TTL and RS232 electric interface. COM3 provide TTL electric interface only (up to 115.2 Kbps) 10/100Mbps Ethernet interface A 2.5inch IDE hardware interface A stereo output interface. A microphone input interface 2-channel AD interface JTAG debug interface Board-mount RTC battery Single power supply (+12V)
SBC2410-III V2.0 User Guide Rev. 1.0 28 October 2008 Embest Info&Tech Co., LTD 6 of 13
IDE hard
JTAG
RST
IDE P2 P1
MIC IN
AUDIO OUT
SD
POWER IN RS232 RS232 COM1 TTL COM0 TTL COM1 TTL COM2 COM0
BL
RJ45
J2 (USB A)
The S3C2410A was developed using an ARM920T core, 0.18um CMOS standard cells and a memory complier. Its low-power, simple, elegant and fully static design is particularly suitable for costand power-sensitive applications. It adopts a new bus architecture called Advanced Microcontroller Bus Architecture (AMBA). The S3C2410A offers outstanding features with its CPU core, a 16/32-bit ARM920T RISC processor designed by Advanced RISC Machines, Ltd. The ARM920T implements MMU, AMBA BUS, and Harvard cache architecture with separate 16KB instruction and 16KB data caches, each with an 8-word line length. For details of characters refer to data sheet of S3C2410A.
Table 2-3 signal definitions of RS232COM0 No 1 2 3 Signal Name GND RSTXD0 RSRXD0 I/O Power O I Function Power supply (GND) UART0 transmits data input(RS232) UART0 receives data output(RS232)
TTLCOM0 is also 3-line serial interface, but output TTL electric. See Table 2-4 for details of interface signal definitions of TTLCOM0. Table 2-4signal definitions of TTLCOM0 No 1 2 3 Signal Name GND TXD0 RXD0 I/O Power O I Function Power supply (GND) TXD0 pin on S3C2410AL-20 RXD0 pin on S3C2410AL-20
TTLCOM1 is also 3-line serial interface, but output TTL electric. See Table 2-6 for details of interface signal definitions of TTLCOM1. Table 2-6 signal definitions of TTLCOM1 No 1 2 3 Signal Name GND TXD1 RXD1 I/O Power O I Function Power supply (GND) TXD1 pin on S3C2410AL-20 RXD1 pin on S3C2410AL-20
Table 2-10 signal definitions of JTAG No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Signal Name +3.3V +3.3V nTRST GND TDI GND TMS GND TCK GND RTCK GND TDO GND nRST GND NC GND NC GND Power Power supply (GND) Power Power supply (GND) I/O Power Power I Power I Power I Power I Power I Power O Power I Power Function Power supply (+3.3V) Power supply (+3.3V) JTAG nTRST on S3C2410AL-20 Power supply (GND) JTAG TDI on S3C2410AL-20 Power supply (GND) JTAG TMS on S3C2410AL-20 Power supply (GND) JTAG TCK on S3C2410AL-20 Power supply (GND) JTAG RTCK on S3C2410AL-20 Power supply (GND) JTAG TDO on S3C2410AL-20 Power supply (GND) JTAG NRST on S3C2410AL-20 Power supply (GND)
Table 2-12 signal definitions of AUDIO_OUT No 1 2 3 Signal Name Audio-L GND Audio-R I/O O Power O Function Audio output channel left Power supply (GND) Audio output channel right
MIC_IN is a microphone input interface. See Table 2-13 for details of interface signal definitions of MIC_IN interface. Table 2-13 signal definitions of MIC_IN No 1 2 3 Signal Name mic-L GND mic-R I/O I Power I Function microphone input channel left Power supply (GND) microphone input channel right
VD[8:15] VD[16:23] LCD_EN I2CSDA I2CSCL VM VFRAME VLINE VCLK TSXM TSXP TSYM TSYP
O O O O O O O O O O O O O
Data busgreen Data busblue LCD backlight Enable IIC-bus data IIC-bus clock Data enable signal Vertical synchronous signal Horizontal synchronous signal LCD clock signal Minus X-axis Plus X-axis Minus Y-axis Plus Y-axis