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Outline
Transfer function: biquad cascade MATLAB lter design GmC implementation MATLAB GmC biquad design GmC zeros realization Transistor level lter design: - biquad design - gm control design Filter characterization Second order effects
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The above function has 2 poles and 2 zeros. Standard lters (Butterworth, Bessel, etc.) dont have zeros (than m=n=0) and the transfer function can be rewritten in terms of o and Q:
k G ( s ) = ----------------------------------------2 s s 1 + --------------- + --------o Q o 2
The lter transfer function can be represented as the product of second order structures:
H ( s ) = G1 ( s ) G2 ( s ) Gn ( s )
A MATLAB model is useful to choose the best transfer function and to choose the sequence of the biquad cell in the cascade.
Giacomino Bollati, 12 May 2004 GmC Filters Tutorial Page 4
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Vin
+ gm1 -
+ gm2 -
+ gm3 -
+ gm4 +
Vout C1 C2
Transfer function:
gm1 ---------Vout gm4 ----------- = ------------------------------------------------------------------------------------Vin gm3 C 1 C1 C2 2 1 + s ------------------------- + s ------------------------gm2 gm4 gm2 gm4
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Vin
+ gm1 -
+ gm2 -
+ gm3 -
+ gm4 +
Ik
Vout C1 C2
Transfer function:
s C1 gm1 ---------- Vin Ik ------------------------gm4 gm2 gm4 Vout = ------------------------------------------------------------------------------------gm3 C 1 C1 C2 2 1 + s ------------------------- + s ------------------------gm2 gm4 gm2 gm4 GmC Filters Tutorial Page 14
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Case 2: Ik = s*Ck
2 s C k C 1 gm1 ---------------------------- Vin ---------2 C1 Ck gm1 gm4 gm2 gm4 ---------- 1 s ------------------------- Vin gm4 gm2 gm1 Vout = ------------------------------------------------------------------------------------- = ------------------------------------------------------------------------------------gm3 C 1 gm3 C 1 2 C1 C2 2 C1 C2 1 + s ------------------------- + s ------------------------1 + s ------------------------- + s ------------------------gm2 gm4 gm2 gm4 gm2 gm4 gm2 gm4
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2*Ibias
Linearity of the stage is proportional to the voltage overdrive of the MOS Vod=(VGS-VTH). For a given gm, Ibias is proportional to the voltage overdrive of the MOS. Voltage overdrive should be chosen to be as small as possible but sufcient to achieve the required linearity.
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Wp1/Lp1
Wp1/Lp1
Wp2/Lp1
Wn1/Ln1
Wn1/Ln1
Wn2/Ln1
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Vin
+ gm1 -
+ gm2 -
+ gm3 -
+ gm4 +
Vout C1 C2
Transconductor output nodes need a loop to x the voltage common mode value. Theoretically 4 common mode loops are required (one for each transconductor). In a biquad (gm1, gm4) and (gm2, gm3) have the output nodes connected together, so, only 2 common mode loops are necessary.
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+ VREF
A possible common mode loop can be implemented sensing the output common mode voltage through 2 high value resistor and adjust the PMOS current in order to hold the proper common mode voltage. Common loop bandwidth doesnt need to be very high helping the stability of the loop.
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Iref
gm stage
Vref
to the lter
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Filter characterization
Eldo simulator allows a complete analysis of the lter. Frequency domain analysis: Small-signal frequency response: amplitude, phase, group delay and noise. Time domain analysis Transient simulations -> linearity. Eldo allows the implementation of ideal functions making easy the comparison between the transistor level implementation and the target function. The ideal function can be described in a text le included in the simulation through the following syntax: fnscellname input_node output_node numerator, denominator Numerator and denominator are described with similar syntax of matlab: p(x) = x^3 -2*x - 5 -> -5 -2 0 1 (note that the order of the coefcient is the opposite of MATLAB) Example: fnsbq1 in out1_ideal k1, 1 {1/(Q1*w1*wc)} {1/(w1*wc*w1*wc)} fnsbq2 out1_ideal out2_ideal k2, 1 {1/(Q2*w2*wc)} {1/(w2*wc*w2*wc)}
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Linearity
A single tone input applied to a real lter produces at the output a signal having a dominant tone at a frequency multiple of the input frequency having superimposed tones at frequencies integer multiple of the fundamental. Vin = a*sin(t) Vout = A*sin(t) + B*sin(2t) + C*sin(3t) + D*sin(4t) In differential circuit even harmonics are usually negligible respect to the even ones. A way to quantify mathematically the linearity is to introduce the Total Harmonic Distortion dened as:
THD = 20 log
Hi ------- H 1
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CGDp CGDn
CDBp CDBn
CGSn
CGATE = CGSn + CGDn * ( 1 - Vd / Vg ) + Cmetal CDRAIN = CGDp + CDBp + CDBn + CDGn * ( 1 - Vg / Vd ) + Cmetal The Miller effect makes difcult the estimation of the term due to the nMOS Gate-Drain capacitance. Parasitic capacitances are constituted by junction caps (CDB), oxide caps (CGS, CGD) and metal caps: the main contributors are the oxide capacitances.
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