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FDL100N50F N-Channel MOSFET

FDL100N50F N-Channel MOSFET,FRFET 500V, 100A, 0.055 Ω Features • R D S ( o n
FDL100N50F N-Channel MOSFET,FRFET 500V, 100A, 0.055 Ω Features • R D S ( o n

FDL100N50F

N-Channel MOSFET,FRFET

500V, 100A, 0.055Features

• R DS(on) = 0.043( Typ.)@ V GS = 10V, I D = 50A

• Low gate charge ( Typ. 238nC)

• Low Crss ( Typ. 64pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

• RoHS Compliant

tested • Improved dv/dt capability • RoHS Compliant May 2009 UniFET TM Description These N-Channel enhancement
May 2009 UniFET TM
May 2009
UniFET TM

Description

These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology.

This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction.

G D S
G D
S

TO-264

FDL Series

G

D

active power factor correction. G D S TO-264 FDL Series G D S MOSFET Maximum Ratings

S

MOSFET Maximum Ratings T C = 25 o C unless otherwise noted

 

Symbol

 

Parameter

 

FDL100N50F

Units

 

V DSS

Drain to Source Voltage

500

V

 

V GSS

Gate to Source Voltage

±30

V

I

 

Drain Current

-Continuous (T C = 25 o C)

100

A

D

-Continuous (T C = 100 o C)

60

I

DM

Drain Current

-

Pulsed

(Note 1)

400

A

 

E AS

Single Pulsed Avalanche Energy

(Note 2)

5000

mJ

I

AR

Avalanche Current

(Note 1)

100

 

A

 

E AR

Repetitive Avalanche Energy

(Note 1)

73.5

mJ

 

dv/dt

Peak Diode Recovery dv/dt

(Note 3)

20

V/ns

 

P D

Power Dissipation

(T C = 25 o C)

 

2500

W

-

Derate above 25 o C

20

W/ o C

 

T J , T STG

Operating and Storage Temperature Range

 

-55 to +150

o

C

 

T L

Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds

 

300

o

C

*Drain current limited by maximum junction temperature

Thermal Characteristics

Symbol

Parameter

Min.

Max.

Units

R θJC

Thermal Resistance, Junction to Case

-

0.05

 

R θCS

Thermal Resistance, Case to Sink Typ.

0.1

-

o

C/W

R θJA

Thermal Resistance, Junction to Ambient

-

30

 

©2009 Fairchild Semiconductor Corporation FDL100N50F Rev. A

1

www.fairchildsemi.com

FDL100N50F N-Channel MOSFET

Package Marking and Ordering Information

 

Device Marking

Device

Package

 

Reel Size

Tape Width

   

Quantity

 

FDL100N50F

FDL100N50F

TO-264

-

 

-

 

30

Electrical Characteristics T C = 25 o C unless otherwise noted

 
 

Symbol

 

Parameter

 

Test Conditions

Min.

Typ.

Max.

Units

Off Characteristics

 

BV DSS

Drain to Source Breakdown Voltage

I D = 250µA, V GS = 0V, T C = 25 o C

500

 

-

-

V

BV DSS

Breakdown Voltage Temperature Coefficient

I D = 250µA, Referenced to 25 o C

   

0.5

 

V/ o C

 

T J

-

-

I

 

Zero Gate Voltage Drain Current

V

DS = 500V, V GS = 0V

 

-

 

-

10

µA

DSS

V

DS = 400V, T C = 125 o C

 

-

 

-

100

I

GSS

Gate to Body Leakage Current

 

V

GS = ±30V, V DS = 0V

 

-

 

-

±100

nA

On Characteristics

 

V

GS(th)

Gate Threshold Voltage

 

V

GS = V DS , I D = 250µA

 

3.0

 

-

5.0

V

R

DS(on)

Static Drain to Source On Resistance

V

GS = 10V, I D = 50A

 

-

0.043

0.055

g

FS

Forward Transconductance

 

V

DS = 20V, I D = 50A

(Note 4)

-

 

95

-

S

Dynamic Characteristics

 

C

iss

Input Capacitance

     

-

12000

-

pF

C

 

Output Capacitance

 

V

DS = 25V, V GS = 0V

-

1700

-

pF

oss

f

= 1MHz

C

rss

Reverse Transfer Capacitance

   

-

 

64

-

pF

Q

g(tot)

Total Gate Charge at 10V

     

-

 

238

-

nC

Q

 

Gate to Source Gate Charge

 

V

DD = 400V, I D = 50A

   

74

 

nC

gs

V

GS = 10V

-

-

Q

gd

Gate to Drain “Miller” Charge

 

-

 

95

-

nC

Switching Characteristics

 

t

d(on)

Turn-On Delay Time

   

-

 

63

-

ns

t

r

Turn-On Rise Time

 

V

R

DD = 250V, I D = 50A

G = 4.7

 

-

 

186

-

ns

t

d(off)

Turn-Off Delay Time

 

-

 

202

-

ns

t

f

Turn-Off Fall Time

   

-

 

105

-

ns

Drain-Source Diode Characteristics

 

I

S

Maximum Continuous Drain to Source Diode Forward Current

 

-

 

-

100

A

I

SM

Maximum Pulsed Drain to Source Diode Forward Current

 

-

 

-

400

A

V

SD

Drain to Source Diode Forward Voltage

V

GS = 0V, I SD = 100A

 

-

 

-

1.5

V

t

rr

Reverse Recovery Time

 

V

GS = 0V, I SD = 100A

 

-

 

250

-

ns

Q

rr

Reverse Recovery Charge

 

dI

F /dt = 100A/µs

-

 

1.5

-

nC

Notes:

1. Repetitive Rating: Pulse width limited by maximum junction temperature

2. L = 1mH, I AS = 100A, V DD = 50V, R G = 25, Starting T J = 25°C

3. I SD 100A, di/dt 200A/µs, V DD BV DSS , Starting T J = 25°C

4. Pulse Test: Pulse width 300µs, Duty Cycle 2%

5. Essentially Independent of Operating Temperature Typical Characteristics

FDL100N50F N-Channel MOSFET

Typical Performance Characteristics

Figure 1. On-Region Characteristics

300 V GS = 15.0 V 10.0 V 8.0 V 100 7.0 V 6.5 V
300
V GS = 15.0 V
10.0 V
8.0
V
100
7.0
V
6.5
V
6.0
V
10
*Notes:
1. 250µs Pulse Test
1
2. T C = 25 o C
0.5
0.1
1
10
I D , Drain Current[A]

V DS , Drain-Source Voltage[V]

Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage

0.07 0.06 V GS = 10V 0.05 V GS = 20V 0.04 *Note: T C
0.07
0.06
V GS = 10V
0.05
V GS = 20V
0.04
*Note: T C = 25 o C
0.03
0
50
100
150
200
250
R DS(ON) [Ω ],
Drain-Source On-Resistance

I D , Drain Current [A]

Figure 5. Capacitance Characteristics

30000 C iss = C gs + C gd (C ds = shorted) C oss
30000
C iss = C gs + C gd
(C ds =
shorted)
C oss = C ds + C
gd
25000
C rss = C gd
C
oss
20000
*Note:
1.
V
GS = 0V
2.
f
= 1MHz
15000
C
iss
10000
C
rss
5000
0
10 -1
1
10
30
Capacitances [pF]

V DS , Drain-Source Voltage [V]

Figure 2. Transfer Characteristics

400 100 150 o C 25 o C 10 -55 o C *Notes: 1. V
400
100
150 o C
25 o C
10
-55 o C
*Notes:
1.
V DS = 20V
2.
250µs Pulse Test
1
4
6
8
10
I D , Drain Current[A]

V GS , Gate-Source Voltage[V]

Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature

300 100 150 o C 25 o C 10 *Notes: 1. V GS = 0V
300
100
150 o C
25 o C
10
*Notes:
1. V GS = 0V
2. 250µs Pulse Test
1
0.0
0.5
1.0
1.5
I S , Reverse Drain Current [A]

V SD , Body Diode Forward Voltage [V]

Figure 6. Gate Charge Characteristics

10 V DS = 100V V DS = 250V 8 V DS = 400V 6
10
V DS = 100V
V DS = 250V
8
V DS = 400V
6
4
2
*Note: I D = 50A
0
0
50
100
150
200
250
V GS , Gate-Source Voltage [V]

Q g , Total Gate Charge [nC]

FDL100N50F N-Channel MOSFET

Typical Performance Characteristics (Continued)

Figure 7. Breakdown Voltage Variation vs. Temperature

1.2 1.1 1.0 0.9 *Notes: 1. V GS = 0V 2. I D = 1mA
1.2
1.1
1.0
0.9
*Notes:
1. V GS =
0V
2. I D = 1mA
0.8
-100
-50
0
50
100
150
200
BV DSS , [Normalized]
Drain-Source Breakdown Voltage

T J , Junction Temperature [ o C]

Figure 9. Maximum Safe Operating Area

1000 30µs 100µs 100 1ms 10ms DC 10 Operation in This Area 1 is Limited
1000
30µs
100µs
100
1ms
10ms
DC
10
Operation in This Area
1
is Limited by
R
DS(on)
*Notes:
0.1
1. T C = 25 o C
2. T J = 150 o C
3. Single
Pulse
0.01
1
10
100
1000
I D , Drain Current [A]

V DS , Drain-Source Voltage [V]

Figure 8. On-Resistance Variation vs. Temperature

3.0 2.5 2.0 1.5 1.0 *Notes: 0.5 1. V GS = 10V 2. I D
3.0
2.5
2.0
1.5
1.0
*Notes:
0.5
1. V GS = 10V
2. I D = 50A
0.0
-100
-50
0
50
100
150
200
R DS(on) , [Normalized]
Drain-Source On-Resistance

T J , Junction Temperature [ o C]

Figure 10. Maximum Drain Current vs. Case Temperature

120 100 80 60 40 20 0 25 50 75 100 125 150 I D
120
100
80
60
40
20
0
25
50
75
100
125
150
I D , Drain Current [A]

T C , Case Temperature [ o C]

Figure 11. Transient Thermal Response Curve

0.1 0.5 0.01 0.2 0.1 P DM 0.05 t 1 t 0.02 2 0.001 0.01
0.1
0.5
0.01
0.2
0.1
P DM
0.05
t
1
t
0.02
2
0.001
0.01
*Notes:
Single pulse
1. Z θJC (t)
=
0.05 o C/W Max.
2. Duty Factor, D= t 1 /t 2
3. T JM - T C = P DM * Z θJC (t)
0.0001
10 -5
10 -4
10 -3
10 -2
10 -1
1
Thermal Response [ Z θJC ]

Rectangular Pulse Duration [sec]

FDL100N50F N-Channel MOSFET

Gate Charge Test Circuit & Waveform

Gate Charge Test Circuit & Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching

Resistive Switching Test Circuit & Waveforms

& Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & Waveforms

& Waveform Resistive Switching Test Circuit & Waveforms Unclamped Inductive Switching Test Circuit & Waveforms

FDL100N50F N-Channel MOSFET

( (

Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT DUT + + V V D
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
DUT
+ +
V
V D S
D S
I I
S D
S D
LL L
D D
riv e r
riv e r
R R G
G
S am e
S am e
T ype
T ype
as
as
D U T
D U T
V
V D D
D D
V
V G S
G S
• •
d v /d t
d v /d t
c o n tro lle d
c o n tro lle d
b y
b y
R R G
G
• •
I I S
c o n tro lle d
c o n tro lle d
b y
b y
p u ls e
p u ls e
p e rio d
p e rio d
S D
D
G
G G
a te
a te
a te
P u ls e
P u ls e
P u ls e
W id th
W id th
W id th
V V
D D
D
= = = --------------------------
-------------------------- --------------------------
G G S
S
G G
G
a te
a te
a te
P u ls e
P u ls e
P u ls e
P e rio d
P e rio d
P e rio d
10V 10V
D riv e r
D riv e r
)
)
, ,
B o d y
B o d y
D io d e
D io d e
F o rw a rd
F o rw a rd
C u rre n t
C u rre n t
I I F M
F M
I I
S S D
D
d d
i/d t
i/d t
( (
D D
U T
U T
)
)
I
I R M
R M
B B
o d y
o d y
D io d e
D io d e
R e v e rs e
R e v e rs e
C u rre n t
C u rre n t
V
V D S
D S
( (
D D
U T
U T
)
)
B B
o d y
o d y
D io d e
D io d e
R e c o v e ry
R e c o v e ry
d v /d t
d v /d t
V
V
V S D
S D
V D D
D D
B B
o o
d y
d y
D io d e
D io d e
F F
o rw a rd
o rw a rd
V o lta g e
V o lta g e
D ro p
D ro p

FDL100N50F N-Channel MOSFET

Mechanical Dimensions

Mechanical Dimensions Dimensions in Millimeters

Dimensions in Millimeters

FDL100N50F MOSFET

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Rev. I40