MEL-432

MICROPROCESSOR LAB REPORT SOFTWARE AND HARDWARE EXPERIMENTS

SUBMITTED BY: Mayank Prajapat 2009CH10079

CONTENTS Experiment 1.1. Experiment 1.2. Experiment 1.3. Experiment 1.4. Experiment 1.5. Experiment 1.6. Experiment 1.7. Experiment 1.8. Experiment 1.9. Experiment 1.10. Experiment 1.11. Experiment 1.12. Experiment 1.13. Experiment 1.14. Experiment 1.15. Experiment 1.16. Experiment 1.17 Experiment 1.18 Taking 1's complement of a byte Taking 2's complement of a byte Additive Inverse Test Subtraction using Two's Complement Addition of Two Hexadecimal Numbers Addition of Two BCD Numbers Addition of Two Double bytes Multiple Byte Addition Addition of N bytes neglecting Carry Separation of a Hex Number into two nibbles Combining two nibbles Testing a bit in a byte Comparison of two numbers Multiplication by 2 through shifting Multiplication of two 8-bit numbers 8-bit Division Finding the Square through Look-up Table Delay through a Monitor Subroutine

Experiments on Input /Output on the 8085 Kit

Experiment 2.11 Experiment 2.12 Experiment 2.13 Output contents of Reg D to LED's on Port A, and return to monitor Input switch data from switches connected to Port B and place it in Reg D Display the switch data on switches connected to Port B continuously in a Loop Experiment 2.14 Display LEDs 0,2,4,6 for 0.5 sec and them display LEDs 1,3,5,7 for 0.5 sec and repeat Display binary counting sequence on 8 LEDs connected to Port A To display the contents of a memory location To shift a glowing LED by one place in the LED array connected to Port A

Experiment 2.15 Experiment 2.16 Experiment 2.17

Experiment 1.1

To take 1's complement of 8-bit number stored at memory location P and store result at Q. Objective: i) ii) iii) iv) Inputs : Outputs

Use the EXAMINE MEMORY command to examine and modify the contents of memory locations. Use of GO command to run a program. Use of a RST-5 instruction to go to the WARM START point of the kit. Use of direct memory addressing instructions. P : an 8-bit number stored at location 2000H. : Q : location where 1' complement of P must be stored. Assume Q = 2001H.

Theory : The 1's complement of a number is obtained by complementing all the bits of the number. Method : begin Move P to accumulator; Take 1's complement of accumulator; Copy accumulator to Q; Return to monitor; Program End : LABELMNEM ORG DB DS LDA CMA STA RST END OPERAND 2000H 12H 1 P(2000H) Q(2001H) 5 COMMENTS

ADDR OP CODE 2000 2000 2001 2002 2005 2006 2009 0000

12 3A0020 2F 320120 EF

P: Q: START:

; ; ; ; ; ;

Store P Reserve byte for Q Load P in ACC Complement ACC Store result in Q Return to Monitor.

Procedure: Input the above program using the EXAMINE MEMORY button of the kit. Load the desired value (say 12H) at P (memory location 2000H). Input the program from 2002H. Run the program using the GO command. Examine Q (memory location 2001H) using the EXAMINE MEMORY command and find out if the complemented value of P (i.e. EDH) is present. Results : Found P has EDH hence it is 1s complement

Experiment 1.2 To find the two's complement of a number stored at a memory location P and store it at a mem. location Q. Objective : i) ii) Inputs : Outputs Theory : Familiarity with two's complement representation of binary numbers. Learn the use of the INSERT button. P (Data stored at 2000H). : Q (Value of -P to be stored at 2001H).

Method

Program

The 2's complement, or the additive inverse of a number is obtained by first taking the 1's complement of the number, adding 1 to the 1'complement, and neglecting the carry. : begin Move P to accumulator; Take 1's Complement of Accumulator; Add 1 to Accumulator; Copy Accumulator to Q; Return to monitor; End : LABELMNEM ORG DB DS LDA CMA INR STA RST END OPERAND 2000H 12H ; 1 P(2000H) COMMENTS ; ; ; Start of Program ; ; Add 1 to compl.

ADDR OP CODE 2000 2000 2001 2002 2005 2006 2007 200A 0000

12 3A0020 2F 3C 320120 EF

P: Q: START:

A Q(2001H); 5 ; End of Program

Result: Position 2001 has EEH which is 2s complement.

Experiment 1.3 Additive Inverse Test. Objective: i) Use of memory-indirect addressing by defining a register M in the memory. ii) To demonstrate the concept of 2's complement as representation of a negative number. iii) To examine the various registers using the EXAMINE REGISTERS command. Inputs P: an 8-bit number at location 2000H. Outputs Q: the 2's complement of P stored at location 2001. Theory: Using the HL register pair as a pointer to a memory a register M is defined in memory. This register M (which is actually a memory location) can now be used as any other internal registers of 8085. The register M is defined by loading the address of the memory location in the HL register pair. Method : begin Initialize HL register pair with address of P; Move P indirectly to accumulator; Complement ACC; Add 1 to ACC to get 2's Complement; (* ACC Now contains -P *) Add P to ACC using indirect addressing; Increment HL to point to Q; Move ACC to Q; Return to monitor; End Program : ADDR OP CODE LABEL MNEM OPERAND COMMENTS 2000 ORG 2000H ; 2000 12 P: DB 12H ; 2001 Q: DS 1 ; 2002 210020 START: LXI H,P(2000H) ; Start of Program 2005 7E MOV A,M 2006 2F CMA 2007 3C INR A ; Add 1 to compl 2008 86 ADD M ; Add P to Ps 2 Complement

2009 23 200A 320120 200B EF Program

INX STA RST END

M Q(2001H) 5

; ; End of

Results: 1. The results were checked for P = 12 and P = 23H. For both the memory location 2001 is 00H. Hence additive inverse of P is its two complement. 2. Single Step execution was also checked Experiment 1.4 Subtraction employing Two's Complement Objective: To demonstrate subtraction using 2's complement. Inputs: P { 1st number at 2000H} Q { 2nd number at 2001H}. Outputs R { Result of Q - P at 2002H} Theory: The subtraction of a number P from another number Q can be implemented by adding the 2's complement of P to the number Q. Thus (Q - P) is the same as Q + (2's Complement of P). The result is a signed number. The programmer has to take care of any overflow that may result. There is no flag in 8085 to indicate overflow. Method : begin Initialize HL register-pair to P Move P to ACC; Find 2's complement of P; Increment HL to point to Q; Add Q to 2's complement of P in ACC; Increment HL to point to R; Store result in R; Return to monitor; End Program : ADDR 2000 2000 2001 2002 2003 2006 2007 2008 2009 200A OP CODE 02 25 210020 7E 2F 3C 23 86 LABEL P: Q: R: START: MNEM ORG DB DB DS LXI MOV CMA INR INX ADD OPERAND COMMENTS 2000H ; 02H ; 25H ; 1 H,P(2000H) ; Start of Program A,M A H M ; Add 1 to compl ; Add Q to Ps 2

Complement 200B 23 200C 320220 200F EF 0000

INX STA RST END

H R(2002H) 5

; ; End of Program

Results: 1. R or memory location 2002 has 23H, hence subtraction of two numbers using 2s complement method. 2. If P = 25H and Q = 02H then the result at position R is DDH which is exactly what we get from 2s complement subtraction indicating a negative result. Experiment 1.5 Addition of two hexadecimal numbers Objective: To demonstrate the addition of two hexadecimal numbers Inputs: P { 1st number at 2000H} Q { 2nd number at 2001H}. Outputs: R {result of P + Q at 20002H} Theory: The result of addition to two single byte hexadecimal numbers may be greater than a byte. If this occurs, then the carry flag is set. This flag forms the 0th bit of the flag register and is '1' if carry is generated. Method : begin Initialize HL register-pair with address of P; Move P to ACC; Increment HL to point to Q; Add Q to P using indirect addressing; Increment HL to point to R; Store ACC in R; Return to the monitor; End Program : ADDR 2000 2000 2001 2002 2003 2006 OP CODE 02 25 210020 7E LABEL P: Q: R: START: MNEM ORG DB DB DS LXI MOV OPERAND COMMENTS 2000H ; 02H ; 25H ; 1 H,P(2000H) ; Start of Program A,M ; Move P to ACC

2007 2008 2009 200A 200D

23 86 23 320220 EF

INX ADD INX STA RST END

H M H R(2002H) 5

; Add Q to P ; ; End of Program

Results: 1. The memory location R or 2002H contains 27H which is the addition of 02H and 25H. 2. Single Step execution was also checked. Experiment 1.6 Addition of two BCD numbers Objective: i) To demonstrate the addition of two BCD numbers. Inputs: P { 1st BCD number at 2000H} Q { 2nd BCD number at 2001H}. Outputs: R { BCD result of P + Q at 20002H} Theory: The result of addition of two single byte BCD numbers is obtained by first adding the numbers as if they were binary numbers and then giving the instruction DAA (decimal accumulator adjust) just after the addition. The conversion is carried by first considering the least significant nibbles ( first four bits) of the two numbers and the Auxiliary Carry (the 4th bit of the FLAG register). If the result of the binary addition indicates an auxiliary carry, or the nibble is greater than 9 (between A and F), six is added to the result. Now the most significant nibbles and the carry flag ( 0th bit of FLAG Reg.) is considered. If the result of the addition gives a CARRY or the M.S.Nibble of result is greater than 9, six is added to the M.S. Nibble of the result. Method : begin Initialize HL reg. pair with address of P; Move P to ACC; Increment HL to point to Q; Add Q to P using indirect addressing; Decimal Accumulator Adjust; Increment HL to point to R; Store ACC in R; Return to the monitor; End Program : ADDR OP CODE 2000 LABEL MNEM ORG OPERAND 2000H COMMENTS ;

2000 2001 2002 2003 2006 2007 2008 2009 200A 200B 200C

09 09 210020 7E 23 86 27 23 320220 EF

P: Q: R: START:

DB DB DS LXI MOV INX ADD DAA INX STA RST END

09H 09H 1 H,P A,M H M H R(2002H) 5

; ; ; Start of Program ; Move P to ACC ; Add Q to P

; ; End of Program

Results: The memory location R or 2002H contains 18H which is the result of addition of BCD numbers 09 and 09. Experiment 1.7 Double byte Addition. Objective: Demonstrate the use of double byte add, and move instructions Inputs : P at 2000H (LSB) & 2001H(MSB), two byte number. Q at 2002H (LSB) & 2003H(MSB), two byte number. R at 2004H(LSB) & 2005H(MSB), two byte result. There are very two instruction for double byte moves, namely LHLD and SHLD, which load and store HL Register pair from or to memory, respectively. In the case of LHLD xxxx instruction, the data at xxxx memory location is loaded in L register and the data at xxxx + 1 memory location is loaded in the H register. The reverse happens in SHLD instruction. In case of double add instruction, DAD, the HL register pair acts as a double byte accumulator. Either register pair BC or DE, depending on the register pair specified, is added to HL and the result is put in HL. Only the carry flag is affected, which indicates a carry out of the double byte. : begin Load P to the DE register pair; Load Q to the HL register pair; Double add HL and DE; Move HL to R; Return to monitor; End Program : ADDR OP CODE 2000 LABEL MNEM ORG OPERAND 2000H COMMENTS ;

Outputs : Theory :

Method

2000 1209 2002 2312 2004 2006 2A0020 Program 2009 EB 200A 2A0220 200D 19 200E 220420 2011 EF

P: Q: R: START:

DW DW DS LHLD XCHG LHLD DAD SHLD RST END

0912H 1223H 2 P(2000H)

; Start of

Q(2002H) D R(2004H) 5

; End of Program

Results: The memory location R or 2004H contains 35H and 2005H contains 1BH. Hence the combined result is 1B35H which is the double byte addition result of 0912H and 1223H.

Experiment 1.8 Multi-byte addition (Addition of 2 strings of multi-byte numbers) Objective: i) ii) iii) iv) Inputs :

Demonstrate addition with carry. Implementation of a counter and a loop. Demonstrate the use of Conditional Branching. Demonstrate the Repeat-Until construct. N at 2000H, the number of bytes in string. : P {1st string from 2001H(LSB) to 2003H(MSB)} : Q {2nd string from 2004H(LSB) to 2006H(MSB)} : R in place of P {result from 2001H to 2003H}

Outputs Theory :

In this experiment, the loops have been introduced. It is required to add repetitively 3 times. A counter has been used to count the repetition by decrementing it. On the counter becoming zero, the Z flag (6th bit of FLAG Register) is set. The conditional jump instruction JNZ monitors the Z flag and exits the loop when it is set. The XRA A instruction is one of the logical instructions which clears both the Accumulator as well as all the FLAGS. : begin Load N in Reg. B ; Reg. B acts as a counter Clear the ACC and Flags ; Initialize HL as pointer to P (LSB); Initialize DE as pointer to Q (LSB); repeat begin Get next byte of Q in ACC; Add with carry the corresponding byte of P; Store corresponding result in R which is the same as P; Increment pointer in HL; Increment pointer in DE; Decrement Counter B; end until Reg. B == 0; Return to monitor; End

Method

Program : ADDR 2000 2000 2001 2004 2007 200A 200B 200C 200F 2010 2011 2012 2013 2014 2015 2016 2017 2018 OP CODE LABEL MNEM ORG OPERAND COMMENTS 2000H ; 3 ; 342312H ; 123524H ; H,N(2000) B,M

3 N: DB 122334 P: DB 243512 Q: DB 210020 START: LXI Program 46 MOV AF XRA 110420 LXI address of Q 23 INX 1A LOOP: LDAX accumulator D 8E ADC corresponding byte P 77 MOV 13 INX 23 INX 05 DCR C21020 JNZ 76 HLT EF RST END

; Start of

; ; A stores 00 D,Q(2004) ; Starting ; Starting address of P ; Store in ; Add with carry the ; ; ; ; ; ; ; End of Program

H D M M,A D H B LOOP 5

Results: At position 2001 to 2003 we saw the result is stored. Hence 3 bit addition was perfomed. If the repetitive loops were not used the program would have had the instructions from 2010- 2015 2 more times and hence it would have been 10 more memory spaces in net. The program worked fine for N = 5 also. The only thing to be changed was 2000 had 5 and program did not start from the now starting position as more location had to be left for 5 bytes

Experiment 1.9 Addition of N bytes in series neglecting carry Objective: Inputs : Outputs Theory : Introduce the concept of checksum. N at 2100, the number of bytes to be added. : P at 2101H, the start of N bytes in series. : R the sum to be stored at P, ie, 2100H. In data transfers there are possibilities of error. In order to detect this, a sum of the bytes neglecting carry is also sent along with the data. When the data is received, this checksum sent along with the data is compared with the actual checksum of the received data. Any difference is an indication of transmission error. : begin Initialize pointer in HL to N; Move N to Reg B to be used as Counter; Clear ACC and FLAGS; repeat begin Increment HL; Add next byte; Decrement byte counter; end until Reg. B ==0; Store ACC in R, i.e., P; Return to monitor; end Procedure: Run the above program for different values of N. Check the results with manual calculations. Program : ADDR OP CODE LABEL 2000 2001 210021 START: 2004 46 2005 AF 2006 23 2007 8E

Method

MNEM ORG LXI MOV XRA INX ADD

OPERAND 2000H H, 2100 B, M A H M

COMMENTS ; ; Start of Program ; Counter in B ; A stores 00 ; Starting address of P ; Add P

2008 05 2009 C20620 200A 200B EF 0000

DCR JNZ STA RST END

B 2006 2101 ; 5

; ; ; End of program

Results: The program was run for N = 5 with values as 12, 23, 45, 56 and 01. The result obtained was D1. Hence this is the same as addition of 5 bits without carry from each of the addition to another stage. Experiment 1.10 Separation of Hexadecimal Numbers into 2 nibbles (digits) Objective: i) Decomposition of a byte into nibbles. ii) Concept of Masking. X {byte at 2000H, eg PQ} : : R1 { L.S. Nibble at 2001H, eg 0Q} R2 { M.S. Nibble at 2002H, eg P0}

Inputs : Outputs

Theory :

In many applications in binary arithmetic a number (byte) has to be separated into digits (nibbles). This can easily be done by MASKING. The nibble not required can be masked out by ANDing with bits being '1' for the nibble required and '0' for the bits corresponding to the nibble not required.Thus for masking out the MS Nibble the Mask would be 0000 1111B. For masking out the LS Nibble the Mask would be 1111 0000B : begin Load byte in ACC; Form LS Nibble by masking out MS Nibble; Store it in R1; Load byte again in ACC; Form MS Nibble by masking out LS Nibble; Store it in R2; Return to monitor; End

Method

Program : ADDR OP CODE LABEL 2000 2000 AB 2001 P: 2002 Q: 2003 210020 START: 2006 7E 2007 47 2008 E60F

MNEM ORG DW DS DS LXI MOV MOV ANI

OPERAND 2000H ABH 1 1 H , 2000 A , M B , A 0F

COMMENTS ; ; ; ; ; Start of Program ; ; ; Extracts 0B

200A 200B 200C 200D 200F 2010 2011 0000

23 77 78 E6F0 23 77 EF

INX MOV MOV ANI INX MOV RST END

H M , A , F0 H M , 5

A B

; ; ; ; Extracts 0A ; ; ; End of program

Results: The value given was ABH and the results seen at 2001 and 2002 were 0B and A0 respectively,hence confirming the separation of nibbles. To put P0 in the form of 0P the only thing to be done is to rotate right anticlockwise without the carry and hence after 4 such commands we would get 0P. Experiment 1.11 Combination of hexadecimal nibbles to form a one byte hexadecimal number Objective: i) ii) To combine nibbles to form a byte Study the rotate instructions.

Inputs :

X1 {MS Nibble at 2000H, e.g., 0P} : X2 {LS Nibble at 2001H, e.g., 0Q} : R {byte PQ at 2002H}

Outputs Theory :

In applications of transmission of numbers, the individual digits have to be re-assembled in to bytes. This done by shifting left the MS Nibble by four bits and ORing with the LS Nibble. : begin Load MS Nibble in Accumulator; Shift left four times; OR Accumulator with the LS Nibble; Store result in ACC in R; Return to monitor; End

Method

Procedure: Input the program and run it for various values of X1 and X2. Verify the results manually. Program : ADDR OP CODE LABEL 2000 2000 0P P: 2001 0Q Q: 2002 R: 2003 210020 START:

MNEM ORG DW DW DS LXI

OPERAND 2000H 0PH 0QH 1 H , 2000

COMMENTS ; ; ; ; ; Start of Program

2006 2007 2008 2009 200A 200B 200C 200D 200E 200F 0000

7E 07 07 07 07 23 B6 23 77 EF

MOV RLC RLC RLC RLC INX ORA INX MOV RST END

A ,

H M H M , 5

; ; ; ; ; ; ; ; ; ; End of program

Results: The program was tried with the value 0P = 0A and 0Q = 09 and the result obtained was A9. Hence the two nibbles were converted to the right hexadecimal. The above program would even work for BCD integers. Experiment 1.12 Testing the condition of a bit in a 8 bit (byte) number. Objective: To study methods of testing the condition of a bit, either through masking or by bit rotation Inputs : P {8-bit number at 2000H} Outputs : R {If bit 3==0, the R contains 00, else R contains the number P} Theory : This is a frequently encountered situation where a decision has to be taken on the basis of the value of a particular bit in a byte. This can be done in two ways. a) All bits except the required bit are masked out. The decision can then be taken, on whether the resulting byte is zero or not. b) The byte is rotated till the required bit comes into the carry flag. The carry flag can then be tested. Method 1. : begin Get P in ACC; Rotate byte circular till the required byte comes into the carry; if (No carry) then Store 00 in R; else Store P at R; Return to monitor; End Method 2. : begin Get P in ACC; Mask out all bits except the required bit by ANDing; if (ACC is zero, ie, Z flag is set) then Store 00 in R; else

Store P at R; Return to monitor; End Of these two methods the 2nd method has been described in detail. The other method can be done as an exercise. Procedure: Input the program. Select different bits on which the decision has to be taken. You will have to change the mask each time you change the position of the bit in the byte. If it is the 0th bit the MASK is 01H. If it is the 1st bit the MASK is 02H. Program: ADDR OP CODE LABELMNEM 2000 2000 2001 2002 2005 2006 2008 200B 200C 200D 200E 0000 OPERAND ORG DB DS LXI MOV ANI JZ MOV INX MOV RST END COMMENTS

06 210020 7E E608 CA0C20 7E 23 77 EF

P: R: START:

JUMP1:

2000H 06H 1 H,P A,M 08H JUMP1 A,M H M,A 5

; result ; ; ; ; Load MS Nibble MASK for 3rd bit If Acc is zero reload P

; Store R

Experiment 1.13 Comparison of two numbers for equality Objective: Inputs : To study the use of the compare instruction. P { hex number at 2000H } : Q { hex number at 2001H } : R { R at 2002H contains P if P==Q, else R contains 00 }

Outputs Theory :

The compare instruction does not affect the operands, but the flags are set as if a subtract operation has been performed. If the instruction is CMP B, then the flags are set as if reg A - reg B has been done, but neither A nor B is affected. If A = B then Z FLAG is set. If B > A then the CARRY FLAG is set. Else none of these two flags are set. This is a very useful instruction for making decisions. : begin Get P in the Acc; Compare with Q; if (P=Q) then Store Acc at R; else Store 00 at R; Return to monitor; End

Method

Procedure: Input the program and run it for various values of P and Q. Verify the results.

Program: ADDR OP CODE LABELMNEM 2000 2000 2001 2002 2003 2006 2007 2008 2009 200C OPERAND ORG DB DB DS LXI MOV INX CMP JZ MVI COMMENTS

06 08 210020 7E 23 BE CA0E20 3E00

P: Q: R: START:

2000H 06H 08H 1 H,P A,M H M JUMP1 A,00

; result ; Load P in Acc

; If Acc is zero ; Acc = 0

200E 23 200F 77 2010 EF 0000

JUMP1:

INX MOV RST

H M,A 5

; Store R

END

Experiment 1.14 Multiplication of a number by 2 by bit rotation. Objective: i) To study the multiplication of a number by two by rotating the number left by one bit.

Inputs : Outputs Theory :

P { one byte number at 2000H} : R { at 2001H, R = 2 * P }

One of the faster methods of multiplication is by bit rotation. Just as a decimal number gets multiplied by 10 if a zero is added after it, a binary number is multiplied by 2 if a zero is put after it. This is the same as rotating the number left by one, through the carry after making the carry zero. If it is rotated twice in this way it is multiplied by four and so on. Resetting of the Carry Flag can not be done directly. It has first to be set and then this can be complemented.

Method

: begin Load P in the Acc; Initialize/ Reset CARRY; Rotate Acc left through CARRY; Store result in R; Return to monitor; End

Procedure: Input the program and run it for various values of P and Q. Verify the results. Program: ADDR OP CODE LABELMNEM 2000 2000 2001 2002 2005 2006 2007 2008 200B 0000 OPERAND ORG DB DS LDA STC CMC RAL STA RST END COMMENTS

06 3A0020 37 3F 17 320120 EF

P: R: START:

2000H 06H 1 P

; result ; carry set to 1 ; carry = 0

R 5

Experiment 1.15 Multiplication of two 8-bit numbers by repetitive addition Objective: Multiplication is not available as an instruction in most 8-bit microprocessors. This to demonstrate how this can be done by repetitive addition P { at 2000H} Q { at 2001H} R { at 2002H & 2003H, R = P * Q} Multiplication by repetitive addition is a slow process. In order to make it faster, the number of additions is made smaller by selecting the larger number to be added repetitively and the smaller number is used as a counter. If faster multiplication is required, then bit rotation method, or lookup table method is used. These are more complex methods. : begin Store P in C; Store Q in Acc; if ( P < Q) then Interchange P and Q; Initialize HL to zero; Initialize B to zero; repeat Add BC to HL; Decrement Acc; until ( Acc = 0); Store HL in R; Return to monitor; End

Inputs : : Outputs : Theory :

Method

Procedure: Input the program and run it for various values of P and Q. Verify the results. Program: ADDR OP CODE LABEL MNEM 2000 2000 2001 2002 2004 2007 2009 OPERAND ORG DB DB DS LXI MVI LDA COMMENTS

06 08 210000 0600 3A0020

P: Q: R: START:

2000H 06H 08H 2 ; result H,0000H ; HL = 0000H B,00H ; B = 00H P

200C 200D 2010 2011 2014 2015 2018 2019 201A 201D 2020 0000

4F 3A0120 B9 DA1820 4F 3A0020 3D 09 C21820 220220 EF

LOOP:

MOV LDA CMP JC MOV LDA DCR DAD JNZ SHLD RST END

C,A Q C LOOP C,A P A B LOOP R 5

Experiment 1.16 Division of 2 eight-bit numbers by repetitive subtraction Objective: Inputs : Outputs Theory : i) The use of subroutines. ii) to study the method of division by repetitive subtraction. P { the dividend at 2000H } Q { the divisor at 2001H } : R { the result at 2002H } The division in most of the 8-bit uP has to be done by repetitive subtraction. It is a time consuming operation. The divisor is repeatedly subtracted from the dividend till the dividend becomes less than the divisor. The number of times division has taken place is the result of the division (quotient). Before the actual subtraction a comparison is done to ascertain if the subtraction can take place (there is no borrow). In doing integer division, the rounding off of the result has to be done. The remainder is multiplied by 2. If this is greater than the divisor, then result is increased by one as a result of rounding off. This rounding-off has been implemented as a subroutine. In using subroutines care has to be taken that a stack has been defined through the LXI SP instruction. In most kits a system stack is usually defined by the MONITOR. But if one is making his own system, stack must be defined. Method : subroutine Round_off ( Divisor, Dividend, Result) begin Dividend := 2 * Divisor; if (Dividend > Divisor) then Result = Result + 1; end program begin Dividend := P {Reg A}; Divisor := Q {Reg B}; Result := 0 {Reg C}; while ( Dividend > Divisor ) do begin Dividend := Dividend - Divisor; Result := Result + 1; end Round_off; Display results;

end

Program : ADDR OP CODE ; ; ; ; ; ; 2000 2000 70 2001 03 2002 2003 2006 2009 200A 200B 200C 200E 200F 2012 2013 2014 2017 201A 201B 201C 31FF27 210020 7E 23 46 0E00 B8 DA1720 90 0C C30E20 CD1D20 23 71 EF P: Q: R:

LABELMNEM OPERAND COMMENTS Program for Division of two 8-bit numbers by repetitive subtraction Input P { Dividend at 2000H } Q { Divisor at 2001H } Output R { Result at 2002H } ORG 2000H DB DB DS LXI LXI MOV INX MOV MVI CMP JC SUB INR JMP CALL INX MOV RST 70H 03H 1 ; Dividend ; Divisor ; Result

MNPROG:

LOOP:

LAST:

SP,27FFH; Define Stack H,P ; HL points to P A,M ; Dividend in Acc H B,M ; Divisor in B C,00H ; Result = 00 B ; Compare before subtr. LAST ; if CARRY the exit B ; else subtract C ; result =+ 1 LOOP ; repeat RNDOFF H M,C ; store result 5

201D 201E 201F 2020 2021 2024 2025

37 3F 07 B8 DA2520 0C C9

RNDOFF:

RETRN:

; Subroutine RNDOFF ; Input - Dividend in Reg A ; Divisor in Reg B ; Result in Reg C ; Output- If 2 * Dividend >= 0, then ; Result = Result +1 ; ; Destroys Reg A,C and Flags. STC ; multiply by 2 CMC RLC CMP B ; compare JC RETRN ; less INR C ; greater RET END

Procedure: Input the program and run it for various values of P and Q. Verify the results.

Experiment 1.17 To find the square of a number using a Look-up Table Objective: Inputs Outputs To familiarise with the concept of look-up table : P { at 2100H, input number} Q { at 2101H start of look-up table} :R { at 2100H, same as P contains square of number}

Theory :In many computer applications the concept of look-up tables is used. These tables contain all possible results of calculations, arranged in a particular order. The program has to select the correct result from the table. This selection it does on the basis of the input.For example, given an input, the output is a complicated function of the input. A table of all possible values may be calculated beforehand and placed in the memory. The program then selects the result based on the input. The speed of the program is increased many fold as the computer does not have to perform calculations, but jut select the result. With cheaper memories, this concept is very useful. This method is very helpful in linearization of a non-linear input. It is indispensable where fast calculations have to be made. Method : begin Initialize H Reg to 00; Get P in the L Reg.; Load the address of table in DE reg. pair; Add DE to HL to get the required address where the square of P is stored; Get the square of the number in Acc; Store it at address of P; Return to monitor; End Program ADDR OP CODE LABEL MNEM OPERAND COMMENTS ; Program for finding square of a number using ; table look-up ; ; Input P { at 2100H, input number } ; Q { at 2101H, Start of table } ; Output R { at 2100H, same as P } 2100 ORG 2100H 2100 07 P: DB 07H ;Input Number 2101 01 Q: DB 01H ;Start of Table 2102 04 DB 04H 2103 09 DB 09H 2104 16 DB 16H

2105 2106 2107 2108 2109 2000 2000 2002 2005 2006 2009 200A 200B 200E 0000

25 36 49 64 81 2600 3A0021 6F 110121 19 7E 320021 EF START:

DB DB DB DB DB ORG MVI LDA MOV LXI DAD MOV STA RST END

25H 36H 49H 64H 81H 2000H H,00H P L,A D,Q D A,M P 5

; ; ; ; ; ; ; ;

Reg H = 00 Acc contains P Reg L has P DE has Q HL as pointer result in Acc result in P Return to Monitor

Experiment 1.18 To generate a time delay of known duration using a MONITOR subroutine Objective: i) To realise that each instruction takes a finite amount of time, however small it might be. ii) To utilise the subroutines of Monitor. iii) To study the delay subroutine of the monitor. Inputs : Delay Count N in Register Outputs : Generation of a delay. Theory : The microprocessor takes a finite amount of time to execute an instructions (including the NOP), even if it is microseconds. If the uP executes a fixed loop or loops of instructions, a known number of times, a predetermined amount of delay can be generated. This is the product of time taken for the loop and the number of times the loop is executed. The timing of the instructions are specified in terms of the number system clock cycles it takes to execute it. Therefore the actual time taken depends on the frequency of the system clock. Details of the monitor subroutines are to be found in the Kit Manual. With each such subroutine available to the user the following information is also supplied. i) Name of the Subroutine and it's Address in the Monitor. ii) The INPUTS required to be given to the subroutine before using it. This is to be given in the registers or indicated memory locations. Sometimes the subroutine may require the unmasking of certain interrupts. iii) The OUTPUTS produced by the subroutine iv) The REGISTERS and the FLAGS the subroutine destroys. These may have to be saved before calling the subroutine, if the calling program wishes to preserve the data in them. The details of the DELAY subroutine has been presented below. Name: DELAY Address: 03BCH Inputs: Delay Count N in the DE register pair. Outputs: Delay = ( 24*N + 17) * Basic Machine Cycle. Description: This routine is used to provide delays. It stores the number in register pair DE, counts it down to zero and comes back to the calling routine. Total time delay introduced by the routine is (24*N + 17) x Basic Machine Cycle. Subroutine Details: ADDR OP CODE 03BC 03BD 03BE 03BF 03C2 1B 7A B3 C2BC03 C9 LABEL DELAY: MNEM ORG DCX MOV ORA JNZ RET OPERAND 03BCH D ; A,D ; E ; DELAY ; ; COMMENTS Decrement DE Check if DE is zero, as DCX does not affect Z flag. Return from subroutine

The round about way of checking whether the DE register pair is zero is due to the fact that the Z-Flag is not set by the DCX instruction. By ORing the D and E registers, the flags are set. The OR of two numbers is zero only when both are zero. Instructions Clock Cycles DELAY: DCX MOV ORA JNZ RET D A,D E DELAY 6 4 4 7/10 10

The JNZ instruction takes 10 clocks if it has to loop back and 7 clocks if falls through. The loop time is 6 + 4 + 4 + 10 = 24 clocks The fixed time is 10 + 7 = 17 clocks, where 7 clocks is due to the branch instruction falling through. Method : begin Save registers /flags which are destroyed by the delay subroutine and required by the program; Load Count in DE register pair; Call Delay Subroutine; Return to monitor; End Program :

The program for this experiment is simple and is given below START: LXI CALL RST D,0000H 03BCH 5 ; Load count in DE ; Call Delay ; Return to Monitor

The program is short and the coding can be easily done. The Maximum Delay Count which can be loaded is 0000H and not 0FFFFH. This is because the count is first decremented and then tested. The Delay Count of 0000H gives a delay of approximately . 5 seconds, for a system clock of 3.07 MHz. Procedure: Input the program and run it for different values of Delay Count.

HARDWARE PROGRAMS
Experiment 2.11 Output contents of Reg D to LED's on Port A, and return to monitor Objective: To demonstrate the concepts of: a) Unconditional Output b) Programming of 8255 chip c) OUT instruction d) Examining and modifying registers through the monitor Input: Value X in Reg D Output: X outputted to LED's connected to port A of 8255. Method: begin Initialize Port A of 8255 as output; Move X to the accumulator A; Out X to port A; Return to monitor End Program: ADDR 2000 2000 2002 2004 2005 2007 0000 OP CODE 3E99 D303 7A D301 EF LABEL MNEM ORG MVI OUT MOV OUT RST END OPERAND 2000H A, 99H 03 A, D 01 5 COMMENTS ; ; Initialization ; ; Contents of Reg D to A ; Output to Port A ; End of program

Results: The contents in Reg D were 3E and the LEDs were lighted showing these contents (i.e. LED 2 and LED 3 , 4, 5, 6 were lighted). The program written to output X stored at memory location in the RAM is ADDR 2000 2000 2002 2004 2007 2009 0000 OP CODE 3E99 D303 3A0030 D301 EF LABEL MNEM ORG MVI OUT LDA OUT RST END OPERAND 2000H A,99H 03 3000 01 5 COMMENTS ; ; Initialization ; ; Contents of 3000 memory location to A ; Output to Port A ; End of program

Results: The contents at 3000 were 11 and the LEDs were lighted showing these contents (i.e. LED 3

and LED 7 were lighted while rest were off).

Experiment 2.12 Input switch data from switches connected to Port B and place it in Reg D Objective: To demonstrate the concepts of: a) Unconditional input b) IN instruction. Input: Switch data X at Port B of 8255 Output: Method: begin Initialize 8255 with Port B as input; Input switch data X into the accumulator A; Move X to register D; Return to Monitor End Program: ADDR 2000 2000 2002 2004 2006 2007 0000 Results: The switches had the configuration 00110100 (0 = off state and 1 = on state) i.e. 34H. The same data was found to be stored in reg D after running this program. If the data has to be transferred to memory location instead of reg D ADDR 2000 2000 2002 2004 2006 2009 0000 Results: The switches had the configuration 00110100 (0 = off state and 1 = on state) i.e. 34H. The same OP CODE 3E99 D303 D800 320030 EF LABEL MNEM ORG MVI OUT IN STA RST END OPERAND 2000H A,99H 03 00 3000 5 COMMENTS ; ; Initialization ; ; ; ; End of program OP CODE 3E99 D303 D800 57 EF LABEL MNEM ORG MVI OUT IN MOV RST END OPERAND 2000H A,99H 03 00 D,A 5 COMMENTS ; ; Initialization ; ; ; ; End of program X in register D.

data was found to be stored at memory location 3000 after running this program. Experiment 2.13 Display the switch data on switches connected to Port B continuously in a Loop. Objective: To demonstrate the concepts of: a) Combined Input Output b) Loop forever. c) Real time output corresponding to input d) Break the loop on a particular condition of input ( Exercise). e) Continuous looping to detect change in input. Input: Current switch data X on Port B Output: LEDs on port A lit according to the switch data X. Method: Begin Initialize 8255 with A as output & B,C as input; loop Input switch data X to accumulator; Output X to LEDs forever end Program: ADDR OP CODE 2000 2000 3E99 2002 D303 2004 D800 2006 D301 2008 C30420 200B EF 0000

LABEL MNEM ORG MVI OUT IN OUT JMP RST END

OPERAND 2000H A,99H 03 00 01 2004 5

COMMENTS ; ; Initialization ; ; Input switch data ; Output to LEDs ; Loop forever ; End of program

Results: The LEDs changed on changing the switch configurations and various configurations were tried which gave the right combination of glowing LEDs depicting the switches position. The program to come out of the loop if the input is FF and return to monitor is ADDR 2000 2000 2002 2004 2006 OP CODE 3E99 D303 D800 D301 LABEL MNEM ORG MVI OUT IN OUT OPERAND 2000H A,99H 03 00 01 COMMENTS ; ; Initialization ; ; Input switch data ; Output to LEDs

2008 200A 200D 2010 0000

FEFF CA1020 C30420 EF

CPI JZ JMP RST END

FF 2010 2004 5

; ; ; Loop forever ; End of program

Experiment 2.14 Display LEDs 0,2,4,6 for 0.5 sec and them display LEDs 1,3,5,7 for 0.5 sec and repeat. Objective: To demonstrate the concepts of: a) Use of monitor subroutines b) Making and using subroutine c) Display refreshing. d) Checking for a condition with a loop. e) Use of subroutine may lead to destruction of data in some registers. f) Use of another register to save a register whose value gets destroyed. Inputs: Nil Outputs: Method: begin Initialize stack; {define stack pointer} Initialize 8255 for A as output, B,C as input; loop Output 55H to Port A; Delay of 0.5 sec; Output AAH to Port A; Delay for 0.5 sec forever end Program: ADDR 2000 2000 2002 2004 2006 2008 200B 200E 2010 2011 2012 2015 OP CODE 3E99 D303 3E55 D301 110000 CDBC03 3EAA D301 110000 CDBC03 C30420 LABEL MNEM ORG MVI OUT MVI OUT LXI CALL MVI OUT LXI CALL JMP OPERAND 2000H A,99H 03 A,55 01 D,0000 03BC A,AA 01 D,0000 03BC 2004 COMMENTS ; ; Initialization ; ; Input switch data ; Output to LEDs ; ; ; ; ; ; ; Loop forever LEDs 0,2,4,6 ON for 0.5 sec and then LEDs 1,3,5,7 ON for 0.5 sec and then repeat.

2016 EF 0000

RST END

; End of program

Results: The LEDs were seen to light like 0,2,4,6 for 0.5 sec and rest for rest 0.5 sec. If we changed the delay below a certain value it seems as if all light up at the same time because of persistence of vision. Increasing the delay makes this effect more pronounced. Experiment 2.15 Display binary counting sequence on 8 LEDs connected to Port A {0.5 sec duration each step}. Objective: To demonstrate the concepts of: a) Different methods of saving a register. b) Transparent subroutine c) Conditional output d) Reading of latched output in 8255 Inputs: Nil Outputs: Method: begin Initialize stack; Initialize 8255; Initialize a counter; {say Reg A} loop Output counter; Increment counter; save counter; call delay for 0.5 sec; restore counter forever end Program: ADDR 2000 2000 2002 2004 2005 2007 200A 200D 2010 OP CODE 3E99 D303 AF D301 110000 CDBC03 D801 3C LABEL MNEM ORG MVI OUT XRA OUT LXI CALL IN INR OPERAND 2000H A,99H 03 A 01 D,0000 03BC 01 A COMMENTS ; ; Initialization ; ; ; ; ; ; ; Binary counting sequence on LEDs on Port A with a 0.5 duration between steps.

2015 C30520 2016 EF 0000

JMP RST END

2005 5

; Loop forever ; End of program

Results: This is used to display binary counting such that LEDs first show 1 and then 2 and so on (1 = LED 7 lit 2 = LED 6 lit 3 = LED 7,6 lit and so on). This continues infinitely. Once reaching FF it again starts from 00.

Experiment 2.16 To display the contents of a memory location A on LED's connected to Port A on pressing a switch. Use the microprocessor kit described in Appendix A. Use the I/O card of Appendix B. Objective: To demonstrate the concepts of: Waiting for key depression in a loop and take action on key depression. Input: Depression of key, X in memory location A

Output: X displayed on LEDs. Method: begin Initialize 8255; Make all LEDs off; while key is not pressed do check for key depression; Display X which is in Mem. Loc A on LEDs; Return to monitor End Program: ADDR 2000 2000 2002 2004 2006 2008 200A 200C 200F 2012 2014 0000 OP CODE LABEL MNEM ORG MVI OUT MVI OUT IN ANI JZ LDA OUT RST END OPERAND 2000H A,8BH 03 A,00 00 02 01 2008 3000 00 5 COMMENTS ; ; Initialization ; ; ; All LEDs off ; ; ; ; ; ; End of program

3E8B D303 3E00 D300 D802 E601 CA0820 3A0030 D300 EF

Results: Initially all LEDs are off. However as soon as the key is pressed there will be some display on the LED which will be the same as the contents stored in the memory location here (ie at 3000). For running of the program 3A was tested.

Experiment 2.17 To shift a glowing LED by one place in the LED array connected to Port A on a depression of a key Objective: To demonstrate the concepts of: a) Conditional output b) Debouncing of keys. Input: Depression of key

Output: Shifting of single glowing LED by one place on each depression of key. Method: begin Initialize stack; Initialize 8255; Form data to glow 1st LED; loop Output LED data; while key not pressed do wait for key depression; shift LED data by one position; forever end Program: ADDR 2000 2000 2002 2004 2006 2008 200A 200C 200F 2011 2012 2015 0000 OP CODE 3E8B D303 3E01 D300 D802 E601 CA0820 D800 07 C30620 EF LABEL MNEM ORG MVI OUT MVI OUT IN ANI JZ IN RLC JMP RST END OPERAND 2000H A,8BH 03 A,01 00 02 01 2008 00 2006 5 COMMENTS ; ; Initialization ; ; ; All LEDs off ; ; ; ; ; ; ; End of program

Results: In the above experiment, the objective of shifting the lit LED by one place cannot be obtained, though the solution seems logically correct. This is due to BOUNCING EFFECT of switches. KEY DEBOUNCING To avoid bouncing effect replace while key not pressed do wait for key depression; by a subroutine call,i.e. call Debounce_key This subroutine is given below.

Subroutine Debounce_key begin repeat while key not pressed do check key depression; wait 15ms to by-pass bouncing period; check for key depression; Until key is pressed. repeat while key not released do check key release; wait 15ms to by-pass bouncing period; check for key release; until key is released. end. Program: ADDR 2000 2000 2002 2004 2006 2008 200B 200D 200E 2011 0000 3000 3002 3004 3007 300A 300D 300F 3011 3012 3014 3016 3019 300C 300F 3011 3013 OP CODE 3E8B D303 3E01 D300 CD0030 D800 07 C30620 EF LABEL MNEM ORG MVI OUT MVI OUT CALL IN RLC JMP RST END IN ANI JZ LXI CALL IN ANI JZ IN ANI JNZ LXI CALL IN ANI JNZ OPERAND 2000H A,8BH 03 A,01 00 3000 00 2006 5 COMMENTS ; ; Initialization ; ; ; All LEDs off ; ; ; ; ; End of program

DB02 E601 CA0030 110008 CDBC03 D800 E601 CA0030 DB02 E601 C21230 110008 CDBC03 D800 E601 C21230

02 01 3000 D,0800 03BC 02 01 3000 02 01 3012 D,0800 03BC 02 01 3012

; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ;

3011 EF 0000

RST END

; End of program

Result: On pressing the key the LED which is glowing shifts to the left. Hence a glowing LED shifts one left when the key is pressed.