Lecture 10

MOSFET (III)
MOSFET Equivalent Circuit Models Outline
Low-frequency small-signal equivalent circuit model High-frequency small-signal equivalent circuit model

Reading Assignment:
Howe and Sodini; Chapter 4, Sections 4.5-4.6

Announcements:
1. Quiz#1: March 14, 7:30-9:30PM, Walker Memorial; covers Lectures #1-9; open book; must have calculator No Recitation on Wednesday, March 14: instructors or TAs available in their offices during recitation times
6.012 Spring 2007 Lecture 10 1

Large Signal Model for NMOS Transistor

Regimes of operation:
VDSsat=VGS-VT ID

linear
ID VDS VGS VBS

saturation

VGS

VGS=VT 0 0

Cut-off

cutoff

VDS

ID = 0
Linear / Triode:
ID = W V n Cox VGS DS VT VDS L 2

Saturation

I D = I Dsat =
Effect of back bias

W 2 n Cox [VGS VT ] [1 + VDS ] 2L

VT (VBS ) = VTo +
6.012 Spring 2007

[ 2

VBS 2p
Lecture 10

]
2

Small-signal device modeling

In many applications, we are only interested in the response of the device to a small-signal applied on top of a bias.

ID+id

+ vds + v - bs VBS VDS

VGS

vgs + -

Key Points: Small-signal is small

response of non-linear components becomes linear

Since response is linear, lots of linear circuit techniques such as superposition can be used to determine the circuit response. Notation: iD = ID + id ---Total = DC + Small Signal
Lecture 10 3

6.012 Spring 2007

Mathematically:

i D (VGS , VDS , VBS ; v gs , vds , vbs ) I D (VGS , VDS , VBS ) + id (v gs , v ds , vbs )

With id linear on small-signal drives:

id = gm vgs + go vds + gmb vbs

Define: gm transconductance [S] go output or drain conductance [S] gmb backgate transconductance [S] Approach to computing gm, go, and gmb.
gm go

i D vGS Q i D vDS

g mb

i D vBS

Q [vGS = VGS, vDS = VDS, vBS = VBS]

6.012 Spring 2007 Lecture 10 4

Transconductance
In saturation regime:

W 2 iD = n Cox [vGS VT ] [ + VDS ] 1 2L

Then (neglecting channel length modulation) the transconductance is:
gm =

i D vGS

W n Cox (VGS VT ) L

Rewrite in terms of ID:

gm = 2 W nCox ID L

gm

saturation

0 0 ID
Lecture 10 5

6.012 Spring 2007

Transconductance (contd.)
Equivalent circuit model representation of gm:
id G
+ D

vgs S
-

gmvgs

6.012 Spring 2007

Lecture 10

Output conductance
In saturation regime:

W 2 iD = n Cox [vGS VT ] [ + VDS ] 1 2L

Then:
go = W iD 2 = nCox (VGS VT ) ID v DS Q 2L

Output resistance is the inverse of output conductance:

ro = 1 1 = g o ID

Remember also:

1 L
Hence:

ro L
6.012 Spring 2007 Lecture 10 7

Output conductance (contd.)

Equivalent circuit model representation of go:
id G
+ D

vgs S
-

ro

6.012 Spring 2007

Lecture 10

Backgate transconductance
In saturation regime (neglect channel length modulation):
iD W 2 n Cox [vGS VT ] 2L

Then:
g mb V i D W = = n Cox (VGS VT ) T L v BS Q v BS Q

Since:

VT (vBS ) = VTo +
Then :

[ 2

v BS 2p

VT vBS
Hence:

=
Q

2 2p VBS

g mb =

gm 2 2 p VBS
Lecture 10 9

6.012 Spring 2007

Backgate transconductance (contd.)

Equivalent circuit representation of gmb:
id G
+ D

vgs S
-

gmbvbs

vbs B
+

6.012 Spring 2007

Lecture 10

10

Complete MOSFET small-signal equivalent circuit model for low frequency:

id G
+ D

vgs S
-

gmvgs

gmbvbs

ro

vbs B
+

+ V DS

+ V GS

n+ source

VBS

;;;
metal interconnect to gate n+ polysilicon gate 0 y QN (y) n+ drain x Xd (y) p-type metal interconnect to bulk
Lecture 10 11

;; ;; ; ;; ;;;; ;;;; ;; ; ;; ;; ;;; ;;;; ;;; ;;; ;;; ;;; ;;; ;;; ;;; ;; ;;

6.012 Spring 2007

2. High-frequency small-signal equivalent circuit model

Need to add capacitances. In saturation:
fringe electric field lines source gate

n+ Csb

;;
qN (vGS) overlap LD overlap LD

drain

;; ;;

Cgs channel charge + overlap capacitance, Cov Cgd overlap capacitance, Cov Csb source junction depletion capacitance (+sidewall) Cdb drain junction depletion capacitance (+sidewall)

ONLY Channel Charge Capacitance is intrinsic to device operation. All others are parasitic.

6.012 Spring 2007

;; ;;;

n+

Cdb

depletion region

Lecture 10

12

Inversion layer charge in saturation

qN (vGS ) = W QN (y)dy = W
0 L vGS VT

dy QN (vC ) dvC dvC

Note that qN is total inversion charge in the channel & vC(y) is the channel voltage. But:

dvC iD = dy W nQN (vC )

Then:

W 2 n qN (vGS ) = iD
Remember:

VGS VT

[QN (vC ) ] dvC

2

QN (vC ) = Cox [vGS vC (y) VT ]

vGS VT

Then:

W 2 n q N (v GS ) = iD
6.012 Spring 2007

[vGS vC (y) VT
Lecture 10

dvC

0
13

Inversion layer charge in saturation (contd.)

Do integral, substitute iD in saturation and get:

2 qN (vGS ) = WLCox (v GS VT ) 3
Gate charge:
qG (vGS ) = qN (v GS ) Q B, max

Intrinsic gate-to-source capacitance:

Cgs, i =

dq G 2 = WLCox dv GS 3

Must add overlap capacitance:

2 C gs = WLC ox + WCov 3
Gate-to-drain capacitance only overlap capacitance:

Cgd = WCov

6.012 Spring 2007

Lecture 10

14

Other capacitances
NRS = N (source) PS = 2 Ldiff (source) = W

Ldiff (source)

AS = W Ldiff (source)

Source-to-Bulk capacitance:

C sb = WLdiff C j + 2Ldiff + W C jsw where C j : Bottom Wall at VSB (F / cm 2 ) C jsw : Side Wall at VSB (F / cm)
Drain-to-Bulk capacitance:

; ; ; ;
L
W

NRD = N (drain) PD = 2 Ldiff (drain) = W

Ldiff (drain)

AD = W Ldiff (drain)

C db = WLdiff C j + 2Ldiff + W C jsw where C j : Bottom Wall at VDB (F / cm2 ) C jsw : Side Wall at VDB (F / cm)
Gate-to-Bulk capacitance: Cgb small parasitic capacitance in most cases (ignore)
6.012 Spring 2007 Lecture 10 15

What did we learn today?

Summary of Key Concepts
High-frequency small-signal equivalent circuit model of MOSFET
Cgd G
+

id
D

vgs S
-

Cgs

Cgb

gmvgs

gmbvbs

ro

vbs B
+

Csb

Cdb

In saturation:

W gm ID L L ro ID Cgs WLCox
6.012 Spring 2007 Lecture 10 16