LPC-P2148 development board Users Manual

All boards produced by Olimex are ROHS compliant

Rev.D, November 2009

Copyright(c) 2010, OLIMEX Ltd, All rights reserved

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INTRODUCTION:
LPC-P2148 is prototype board for LPC2148 ARM7TDMI-S microcontroller with USB 2.0 Full-speed device, multiple UARTs, SPI, SSP to I2C-bus and on-chip SRAM up to 40 kB, produced by NXP Semiconductors. With LPC-P2148 you can explore the features of LPC21XX family on budged, the board has everything necessary to build simple applications: reset and oscillator circuits, JTAG port for programming and debugging, USB, RS232, SD/MMC, Buzzer, three status LEDs, potentiometer and two user buttons. There are plenty of GPIOs on extension headers and also a prototype area where you can connect your additional circuits.

BOARD FEATURES:
MCU: LPC2148 16/32 bit ARM7TDMI-S with 512K Bytes Program Flash, 42K Bytes RAM, USB 2.0, RTC, 10 bit ADC 2.44 uS, 2x UARTs, 2x I2C, SPI, 2x 32bit TIMERS, 6x PWM, 8x CCR, 1x DAC, WDT, 5V tolerant I/O, up to 60MHz operation standard JTAG connector with ARM 2x10 pin layout for programming/debugging with ARM-JTAG USB connector, USB link LED Two channel RS232 interface and drivers SD/MMC card connector two buttons trimpot connected to ADC two status LEDs Buzzer UEXT - 10 pin extension connector for Olimex addition peripherals like MP3, RF2.4Ghz, RFID etc. modules 2x SPI connectors I2C connector on board voltage regulator 3.3V with up to 800mA current single power supply: 6V AC or DC required power supply LED power supply filtering capacitor RESET circuit with external control of Philips ISP utility via RS232 RESET button DBG, BSL slide switch JRST jumper for enable/disable external RESET control by RS232 12 Mhz crystal on socket 32768 Hz crystal and RTC backup battery connector

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extension headers for all uC ports PCB: FR-4, 1.5 mm (0,062"), soldermask, white silkscreen component print Dimensions: 110 x 100 mm (4.3 x 3.9 ")

ELECTROSTATIC WARNING:
The LPC-P2148 board is shipped in protective anti-static packaging. The board must not be subject to high electrostatic potentials. General practice for working with static sensitive devices should be applied when working with this board.

BOARD USE REQUIREMENTS:

Cables: The cable you will need depends on the programmer/debugger you use. If you use ARM-USB-OCD, you will need RS232 cable and 1.8 meter USB A-B cable, if you use ARM-USB-TINY, you will need 1.8 meter USB A-B cable and if you use ARM-JTAG, you will need LPT cable. Hardware: Programmer/Debugger one of the Olimex ARM Programmers: ARMUSB-OCD, ARM-USB-TINY, ARM-JTAG. Software: ARM C compiler and JTAG programmer, the possible options are: - open source platform: GNU C compiler + OpenOCD and Eclipse

PROCESSOR FEATURES:
LPC-P2148 board use Single-chip 16-bit/32-bit microcontroller LPC2148 from NXP Semiconductors with these features:

16-bit/32-bit ARM7TDMI-S microcontroller 40 kB of on-chip static RAM and 512 kB of on-chip flash memory. 128-bit wide interface/accelerator enables high-speed 60 MHz operation. In-System Programming/In-Application Programming (ISP/IAP) via on-chip boot loader software. Single flash sector or full chip erase in 400 ms and programming of 256 B in 1 ms. EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip RealMonitor software and high-speed tracing of instruction execution. USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM. In addition, the LPC2146/48 provides 8 kB of on-chip RAM accessible to USB by DMA. Two 10-bit ADCs provide a total of 14 analog inputs, with conversion times as low as 2.44 ms per channel. Single 10-bit DAC provides variable analog output

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Two 32-bit timers/external event counters (with four capture and four compare channels each), PWM unit (six outputs) and watchdog. Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input. Multiple serial interfaces including two UARTs (16C550), two Fast I2C-bus (400 kbit/s), SPI and SSP with buffering and variable data length capabilities. Vectored Interrupt Controller (VIC) with configurable priorities and vector addresses. Up to 45 of 5 V tolerant fast general purpose I/O pins in a tiny LQFP64 package. Up to 21 external interrupt pins available. 60 MHz maximum CPU clock available from programmable on-chip PLL with settling time of 100 ms. On-chip integrated oscillator operates with an external crystal from 1 MHz to 25 MHz. Power saving modes include Idle and Power-down. Individual enable/disable of peripheral functions as well as peripheral clock scaling for additional power optimization. Processor wake-up from Power-down mode via external interrupt or BOD. Single power supply chip with POR and BOD circuits:

CPU operating voltage range of 3.0 V to 3.6 V (3.3 V 10 %) with 5 V tolerant I/O pads.

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Block Diagram:

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MEMORY MAP:

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+5V_USB

D1 D5 C1 6 1 1 00 n
C1+ C1C2+
B1 B2

3.3 V U2 MAX32 32 RS232 _1

2
TX1OUT RX1IN

3.3 V

3.3 V

3.3 V

3.3 V

3.3 V

3.3 V

SMA1 N58 19
3 VRST

V+ 6

PW R_JACK VIN
IN OUT 5 C2BSL

G1 C17 4 10 0n SW -TAKT6 B1
1 2
2 1

1 N41 48 VR1(3.3V) L M11 17 C 19 100 n C18 10 0n D4 1 N41 48 RST B2 R8 10 K R11 22 K R44 10 K R13 10 K R14 10 K
6 7 8 9

1 2 3 4 5

R4 2

AD03

B-DIL 3 VIN
TXD0 TXD1

PW R R2 0 2 40 /1 %
11 10 T1IN T2IN T1OUT T2OUT 14 TX0OUT 7 TX1OUT

ADJ/GND

SCHEMATIC
220 AN_TR 10 K

6VAC 9VDC

ICSP

C7 47 0u F/1 6VDC R7 47 0
+

R21 39 0/1 %
RXD0

C13 47 uF/6.3V
ON

12 9 R1OUT R2OUT R1IN R2IN

13 RX0IN 8 RX1IN

T1 BC84 6
4 3

G ND 3 .3V

1 2 3 4 5 6 7 8 9

T2 BC84 6

1N4148

1N4148

D3

D2

16 VCC

U2 PW R
15 GND

R S2 32 _0 /ICSP R9 2 2K R 12 NA R4 3 2 2K R10 10 K

3 .3V
TXD1

LPC-P2148
C2 0 1 00 n 3 .3V R 17 2K I2C
4 3 2 1

Rev. D

RXD1

RS1/UEXT
3 2 1

CO PYRIG HT(C) 20 09 , O limex Ltd .

h ttp ://ww w.olimex.com/de v R 16 2K

SCL0 SDA0 MISO0 MOSI0 SCK0 SSEL0

UEXT-1 UEXT-2 UEXT-3 UEXT-4 UEXT-5 UEXT-6 UEXT-7 U EXT-8 U EXT-9 UEXT-1 0

P1.[16 ..2 5],RTCK,TDO ,TDI,TCK,TMS,TRST 3 .3V 3 .3 V LED1 SPI0 R26 33 0 R27 33 0 LED2 R32 1 0K U3

BUZZER 3 .3V
3.3V

3.3 V

P1.20

BUZZ1 BUZZ2

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6 5 4 3 2 1
TXD1 RXD1 P1.24 P1.25 RTCK TDO TDI TCK TMS TRST

P1.16 P1.17 P1.18 P1.19 P1.20 P1.21 P1.22 P1.23 P1.24 P1.25

R45 NA

R28 33 0 L1 4 70 nH

R1 10 K

R2 10 K

R3 10 K

R4 10 K

JTAG

P1.16 P1.17 P1.18 P1.19 P1.20 P1.21 P1.22 P1.23

16 12 8 4 48 44 40 36 P1.16/TRACEPKT0 P1.17/TRACEPKT1 P1.18/TRACEPKT2 P1.19/TRACEPKT3 P1.20/TRACESYNC P1.21/PIPESTAT0 P1.22/PIPESTAT1 P1.23/PIPESTAT2 P0.0/TXD0/PWM1 P0.1/RXD0/PWM3/EINT0 P0.2/SCL0/CAP0.0 P0.3/SDA0/MAT0.0/EINT1 P0.4/SCK0/CAP0.1/AD0.6 P0.5/MISO0/MAT0.1/AD0.7 P0.6/MOSI0/CAP0.2/AD1.0 P0.7/SSEL0/PWM2/EINT2
TXD0 RXD0 SCL0 SDA0 SCK0 MISO0 MOSI0 SSEL0

19 21 22 26 27 29 30 31

P1 .1 6 P1.1 7 P1.1 8 P1.1 9 P1.20 P1.21 P1 .22 P1 .23 P1 .24 P1 .2 5

3.3V
BUZZ1 BUZZ2 BSL B1

R38 R3 4 1 0K 3 .3V SCK1 ,MISO ,MO SI,SSEL1 SPI1 3 .3 V C1 4 R1 9 NC

SSEL1 MOSI1

C9 33 K R2 3 2 K

DBG _ E BAT Q2
3 RTCX1 RTCX2 VBAT 5 49
32768/6pF
G ND

TRST TDI TMS TCK RTCK TDO RST

47uF/6.3V

2 1 2 1

1 3 5 7 9 11 13 15 17 19 32 28 24 64 60 56 52 20 P1.24/TRACECLK P1.25/EXTIN0 P1.26/RTCK P1.27/TDO P1.28/TDI P1.29/TCK P1.30/TMS P1.31/TRST P0.8/TXD1/PWM4/AD1.1 P0.9/RXD1/PWM6/EINT3 P0.10/RTS1/CAP1.0/AD1.2 P0.11/CTS1/CAP1.1/SCL1 P0.12/DSR1/MAT1.0/AD1.3 P0.13/DTR1/MAT1.1/AD1.4 P0.14/DCD1/EINT1/SDA1 P0.15/RI1/EINT2/AD1.5 33 34 35 37 38 39 41 45

2 4 6 8 10 12 14 16 18 20

P0.12 P0.13 BSL

SSEL 1

SD/MMC P1.24

10 14

R6 10K D6 BAT54 C 3 .3V C3 1 00 n 1 00 n 1 00 n C2 C1

23 43 51 VDD3-1(I/O) VDD3-2(I/O) VDD3-3(I/O)

R5 10K R18 0

R31
SCK1 MISO1 MOSI1 SSEL1

0
MOSI1

C4 1 0p C5 1 0p
P0.16/EINT0/MAT0.2/CAP0.2 P0.17/CAP1.2/SCK1/MAT1.2 P0.18/CAP1.3/MISO1/MAT1.3 P0.19/MAT1.2/MOSI1/CAP1.2 P0.20/MAT1.3/SSEL1/EINT3 P0.21/PWM5/AD1.6/CAP1.3 P0.22/AD1.7/CAP0.0/MAT0.0 P0.23/VBUS

B2 SCK1 MISO1 MOSI1 SSEL1

WP1 WP2

46 47 53 54 55 1 2 58

P0.21 P0.22 AO UT R35 R24 R25 10 K 33 33

100 n

R36 10 0K +5V_ USB

6 5 4 3 2 1

SCK1

SCK1

USB

MISO1

MISO1

6 18 25 42 50 VSS1 VSS2 VSS3 VSS4 VSS5 VREF VDD3(A) VSSA 63 7 59

P0.25/AD0.4/AOUT USBD+ USBDP0.28/AD0.1/CAP0.2/MAT0.2 P0.29/AD0.2/CAP0.3/MAT0.3 P0.30/AD0.3/EINT3/CAP0.0 P0.31/UP_LED/CONNECT X1 X2 RST

9 10 11 13 14 15 17

AD03 CONNECT

P0.2 8 P0.29 AD03

62 Q 1 61 57

C 12 18p

C 11 18p R 40 10 K R39 12MHz

RST

1 2 3 4

USB
S HIE L D

3 .3 V 3.3 V 3.3V 3.3V C 10 10n R 29 1.5 K C28 3 9p C2 7 3 9p

1 RESET

R15 R41 R37 33 K USB_B R 33 3.3 V 2K U1 MCP13 0T

GND
MISO1

10 K 10 K
P1.25

1 2 3 4 5 6 7 8 9 13 15

CD/DAT3/CS CMD/DI VSS1 VDD CLK/SCLK VSS2 DAT0/DO DAT1/RES DAT2/RES CP1 CP2

VREF 3 .3 V
+

VREF
2 1

R2 2 2K 10 K Q3 BC 807 3.3V
VCC 2

SD-CARD

VR EF-3 .3V C6 C8 1 00 n LPC2 14 X 10u F/6.3 V 3.3V

USB_L INK ye llow

3

R 30 33 0

BOARD LAYOUT

POWER SUPPLY CIRCUIT

LPC-P2148 can take power from three sources:

External power supply 9.0V DC or 6.0V AC. +5V_USB from USB connector Extension pins VIN and GND

RESET CIRCUIT
LPC-P2148 reset circuit includes pin 15 of JTAG connector, U1 (MCP130T), D4 (1N4148), R8 (10k), LPC2148 pin 57 (RST) and RESET button.

CLOCK CIRCUIT
Quartz crystal with name Q1 (12 MHz) is connected to LPC2148 pin 61 (X2) and pin 62 (X1). Quartz crystal with name Q2 (32.768 kHz) is connected to LPC2148 pin 3 (RTCX1) and pin 5 (RTCX2).

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JUMPER DESCRIPTION
DBG_E
When this jumper is shorted selects the microcontroller's debug mode. Default state is closed.

VREF-3.3V
When this jumper is shorted connects LPC2148 pin 63 (VREF) to 3.3V. Default state is closed.

RS1/UEXT
When this jumper is shorted in position RS1 connects LPC2148 pin 34 (RXD1) to U2 (MAX3232) pin 9 (R2OUT); when this jumper is shorted in position UEXT - connects LPC2148 pin 34 (RXD1) to UEXT pin 4. Default state is shorted in position RS1.

SLIDE SWITCH

INPUT/OUTPUT
USB_UP_ LED (yellow) with name USB_LINK connected to LPC2148 pin 17 (P0.31/UP_LED/CONNECT). Status LED1 (red) with name LED1 connected to LPC2148 pin 35 (P0.10/RTS1/CAP1.0/AD1.2). Status LED2 (red) with name LED2 connected to LPC2148 pin 37 (P0.11/CTS1/CAP1.1/SCL1). Power-on LED (red) with name PWR this led shows that +3.3V is applied to the board. User button with name B1 connected to LPC2148 pin 45 (P0.15/RI1/EINT2/AD1.5). User button with name B2 connected to LPC2148 pin 46 (P0.16/EINT0/MAT0.2/CAP0.2). Reset button with name RST connected to LPC2148 pin 57 (RST). Trimpot with name AN_TR connected to LPC2148 pin 15 (P0.30/AD0.3/EINT3/CAP0.0). BUZZER connected to LPC2148 pin 38 (P0.12/DSR1/MAT1.0/AD1.3) and pin 39 (P0.13/DTR1/MAT1.1/AD1.4).

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CONNECTOR DESCRIPTIONS JTAG:

The JTAG connector allows the software debugger to talk via a JTAG (Joint Test Action Group) port directly to the core. Instructions may be inserted and executed by the core thus allowing LPC2148 memory to be programmed with code and executed step by step by the host software. For more details refer to IEEE Standard 1149.1 - 1990 Standard Test Access Port and Boundary Scan Architecture and LPC2148 datasheets and users manual.

Pin # 1 3 5 7 9 11 13 15 17 19 +3.3V TRST TDI TMS TCK RTCK TDO RST NC NC

Signal Name 2 4 6 8 10 12 14 16 18 20

Pin # +3.3V GND GND GND GND GND GND GND GND GND

Signal Name

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RS232_0/ICSP:
Pin # 1 2 3 4 5 6 7 8 9 NC TX0OUT RX0IN Slide Switch pin 3 GND NC Slide Switch pin 4 NC NC Signal Name

RS232_1:
Pin # 1 2 3 4 5 6 7 8 9 NC TX1OUT RX1IN NC GND NC NC NC NC Signal Name

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UEXT:
Pin # 1 2 3 4 5 6 7 8 9 10 3.3V GND TXD1 Via JMP RS1/UEXT to RXD1 SCL0 SDA0 MISO0 MOSI0 SCK0 SSEL0 Signal Name

PWR_JACK:
Pin # 1 2 Signal Name Power Input GND

BAT:
Pin # 1 2 Signal Name to 3.3V GND

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SD/MMC:

Pin # 1 3 5 7 9 11 13 15

Signal Name SSEL1 GND SCK1 MISO1 PULL-UP Via R23 to GND P1.25 PULL-DOWN 2 4 6 8 10 12 14

Pin #

Signal Name MOSI1 +3.3V GND PULL-UP P1.24 Via R22 to GND PULL-DOWN

USB:
Pin # 1 2 3 4 Signal Name +5V_USB USB_DUSB_D+ GND

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EXT:

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I2C
The I2C-bus is bidirectional, for inter-IC control using only two wires: a serial clock line (SCL), and a serial data line (SDA). Each device is recognized by a unique address and can operate as either a receiver-only device. Transmitters and/or receivers can operate in either master or slave mode, depending on whether the chip has to initiate a data transfer or is only addressed. The I2C-bus is a multi-master bus, it can be controlled by more than one bus master connected to it. The I2C-bus implemented in LPC2148 supports bit rates up to 400 kbit/s (Fast I2C-bus).

Features:

Compliant with standard I2C-bus interface. Easy to configure as master, slave, or master/slave. Programmable clocks allow versatile rate control. Bidirectional data transfer between masters and slaves. Multi-master bus (no central master). Arbitration between simultaneously transmitting masters without corruption of serial data on the bus. Serial clock synchronization allows devices with different bit rates to communicate via one serial bus Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer. The I2C-bus can be used for test and diagnostic purposes.

SPI
The SPI is a full duplex serial interface, designed to handle multiple masters and slaves connected to a given bus. Only a single master and a single slave can communicate on the interface during a given data transfer. During a data transfer the master always sends a byte of data to the slave, and the slave always sends a byte of data to the master.

Features:

Compliant with SPI specification. Synchronous, Serial, Full Duplex, Communication. Combined SPI master and slave. Maximum data bit rate of one eighth of the input clock rate.

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MECHANICAL DIMENSIONS

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AVAILABLE DEMO SOFTWARE

USB mouse demo for EW-ARM 5.40 board peripherials demo code for EW-ARM 4.42 RF link with MOD-NRF24LR OpenSource USB stack for LPC BLINK-LED project with GCC+OpenOCD+Eclipse OpenOCD + Eclipse set of projects 1.00 include flash write make file for LPCP2148.

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ORDER CODE LPC-P2148 assembled and tested (no kit, no soldering required)
How to order? You can order to us directly or by any of our distributors. Check our web www.olimex.com/dev for more info.

Revision history: REV. D - create November 2009

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Disclaimer: 2010 Olimex Ltd. All rights reserved. Olimex, logo and combinations thereof, are registered trademarks of Olimex Ltd. Other terms and product names may be trademarks of others. The information in this document is provided in connection with Olimex products. No license, express or implied or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Olimex products. Neither the whole nor any part of the information contained in or the product described in this document may be adapted or reproduced in any material from except with the prior written permission of the copyright holder. The product described in this document is subject to continuous development and improvements. All particulars of the product and its use contained in this document are given by OLIMEX in good faith. However all warranties implied or expressed including but not limited to implied warranties of merchantability or fitness for purpose are excluded. This document is intended only to assist the reader in the use of the product. OLIMEX Ltd. shall not be liable for any loss or damage arising from the use of any information in this document or any error or omission in such information or any incorrect use of the product.

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