Microprocessor Interfacing

Project

Hardwired FIR Filter

Implementation using
Parallel Port

Nart Shawash
Introduction:
The most common I/O transfer technique used in the Intel
microprocessor-based systems is Isolated I/O. The term isolated describes
how the I/O locations are isolated from the memory system in a separate
I/O address space. The addresses for isolated I/O devices, called ports, are
separate from the memory. In the personal computer, isolated I/O ports are
used for controlling peripheral devices.
IN instruction, is used to input data from port addressed by ‘DX’ into ‘AL’.
ex: MOV DX,0378H
IN AL,DX
The contents of the port with address 0378H are moved to ‘AL’.
OUT instruction is used to output data resident in ‘AL’ to a port addressed
by ‘DX’.
ex: MOV DX,0378H
OUT DX,AL
Contents of ‘AL’ are moved to port with address of 0378H.

PC Parallel Port:
Parallel Printer Port (shown below) comprises 4-control lines (bi-directional),
5-status lines (receptive), & 8-data lines. It is found commonly on the back
of PC’s as a D-type 25-pin female connector.

In PC’s utilizing 80486 Intel microprocessor –such as currently being used

in Microprocessor Laboratory-, Data Port (D0-D7, pins 2-9) could be used as
an output-port, that is to send a character to printer, for instance. While 4
lines of the Control Port (C0-C3, pins 1,14,16,17) as IN/OUT. Status Port
(bits S3-S7, pins 15,13,12,10,11) as an input only.
In such a state, the port is said to be functioning in Standard Mode.
Note once again that the Standard Mode Operation does not support input to
D0-D7 function, i.e. it is not allowed.
In Pentium based PC’s, the Printer Parallel Port lines D0-D7 can function as
both IN & OUT ports. In this mode, Parallel Port is refereed to as Extended
Capabilities Port (ECP).
 Pin assignments are shown in the figure below.

A simple test could be conducted using available ‘debug’ facility in ‘DOS’.

That is while in C:\> or D:\>, simple type ‘debug’, then press ENTER.
- ←this dash prompt appears in the extreme left of the last line as long
as you are operating in the debug of DOS. To demonstrate how read D0-
D7 operation is done, type:
o 37a,20 , followed by ENTER strike. (this causes Data Port to be set into
Input Mode). Then type (on the next line)
i 378 , followed by ENTER strike. If nothing is connected to pins 2-9
(D0-D7) of Data Port, then the values D0-D7 will be interpreted as 1’s, i.e.
logic high. That is due to default design settings, custom in all commercial
TTL systems, which will always be high logic when ever trying to read any
floating terminals. To read values other than FFH (floating input D0-D7),
ground those pins (2-9) which are desired to be read as logic zero, through
120Ω resistance & repeat –i 378, with previously –o 37a,20 executed.
Grounding is done by connecting the corresponding pin to one of the pins
18-25 on the parallel port through 120Ω resistor. Never try to ground any
pin by short-circuiting it to pins 18-25. It should be mentioned that pins 18-
25 on the parallel port (corresponding to ground) are internally short
circuited. You can do a continuity test even when PC’s power is off.
To do the write (output to data port, D0-D7, pins 2-9) operation in debug.
First send 00H to port 37aH, to issue the PC that the Data Port is to be set
into Output Mode. Then send any word (8 bits) in hexadecimal to Data Port
address 378.
-o 37a,00
-o 378,CC
After this, you can check the logic values on pins 2-9 corresponding to data
port lines D0-D7 using voltmeter or logic prob. Remember that the
measurement must be with respect to ground, i.e. pins 18-25.
In the same fashion, one can send/receive data to/from Control Port
(address 37a). But unlike the Data Port, some of Control Port lines are active
low, add to that the fact that only bits
C0 (pin 1) Strobe (active low)
C1 (pin14) Autofeed (active low)
C2 (pin16) INIT (active high)
C3 (pin17) SelectIN (active low)
are physically addressable. The following example will demystify the matters:
-o 37a,FF
will result in the following:

Control
Port Bit Pin # Name Logic Why?
# State
0 1 Strobe 0 It’s active low, i.e. inverted
1 14 Autofeed 0 It’s active low, i.e. inverted
2 16 INIT 1 It’s active high, i.e. not inverted
3 17 SelectIn 0 It’s active low, i.e. inverted
4 Doesn’t have 1 It’s active high, i.e. not inverted
corresponding pin IRQ Enable Setting it high, enable IRQ on
Status Port & vice versa
5 Doesn’t have Direction 1 It’s active high, i.e. not inverted
corresponding pin (of data flow on data port) Setting it high makes pins data 2-9
receptive to data & vice versa
6&7 Doesn’t have Reserved Don’t What ever
corresponding pin care

Control bits 6 & 7 are reserved, (what ever that might mean). We as an end
users should care less about them.
As a result we are able to read 4 on the lower 4 bits (physically available to
us) of the control port whenever FFH is outputted to the control port
(address 37aH).

To do the read operation (IN) from the control port, execute:

-i 37a
Note once again that the control bits 0,1,3 –corresponding to pins 1,14,17-
will be read inverted, because they are active low. Control bit 2 –pin 16 on
parallel port- will be read as it is –since it is active high-.

Status Port –address 379H- can do the Input –to µp- only.
How ever it should be noted that while running debug demo, the bit activity
is as follows:
Status bit # Pin # Name Logic Activity
7 11 Busy Active high, i.e. not
inverted
6 10 ACK Active high, i.e. not
inverted
5 12 PE Active high, i.e. not
inverted
4 13 Select Active low, i.e. inverted
3 15 Error Active low, i.e. inverted
2 Has no corresponding pin IRQ Active high, i.e. not
inverted
1&0 Has no corresponding pin Reserved What ever
While running a MASM program, we’ll set the parallel (Data) port to Bi-
directional-Bit mode (to be explained in what follows), the thing that will
cause in different bit activity than that specified above. New bit activity is
listed below:
Status bit # Pin # Name Logic Activity
7 11 Busy Active low, i.e. inverted
6 10 ACK Active high, i.e. not
inverted
5 12 PE Active high, i.e. not
inverted
4 13 Select Active high, i.e. not
inverted
3 15 Error Active high, i.e. not
inverted
2 Has no corresponding pin IRQ Active high, i.e. not
inverted
1&0 Has no corresponding pin Reserved What ever

Bi-directional-Bit Mode:
Without getting into too much detail, Bi-directional Bit Mode is available on
ECP, & enables Data Port lines –pins 2-9, D0-D7- to function as an input
and/or output lines.
Forcing Parallel Port into Bi-directional mode is achieved as follows:
Register called Extended Control Register -which has an address =
Base+402H=378H+402H=077AH- is loaded values of 0,0,1 in it’s bits 7,6,5
respectively. The other bits are treated as don’t care, –let’s agree upon
setting them to zero-, so that 001xxxxx is 00100000Bin, that corresponds to
020H. So, setting the Data Port in Bi-directional Bit mode is simply done as
follows:

MOV DX,077AH
MOV AL,020H
OUT DX,AL

After the execution of those three lines, microprocessor allows the Data Port
(bit’s D0-D7, pins 2-9) to work either as an input or an output. The question
now is, How to specify the direction of data flow, IN or OUT the data port. As
you might have noticed before, that is done by sending 020H to Control port
–address 37a-, so that the data port is receptive (INPUT), or by sending 00H
to the Control port, so that the Data port functions as an OUTPUT port.
020H is expanded in binary to 0010 0000. Note that it is the 5th bit (1 or 0)
of the Control port (not available physically) that is dictating Data port to
work in (INPUT or OUTPUT) mode respectively.

Testing DAC0800:
Assemble the circuit shown in the figure below.
 D/A Test Program objective is to insure that:
1. D/A works fine
2. Obtain correct shape of D/A output waveform, that is by adjusting V+
& V- power supplies until the correct (symmetric shape) output waveform
is observed on oscilloscope.
The test signal would be the periodic ramp (saw-tooth) waveform, obtained
by continuously incrementing the output 8-bit (binary) value feed to D/A.
Program goes as follows:

MOV DX,077AH ; set bi-directional mode, not that necessary

MOV AL,020H
OUT DX,AL
MOV DX,37A ; data port is an output port
MOV AL,00H
OUT DX,AL
MOV AL,00H
MOV DX,0378H
HERE: OUT DX,AL
INC AL
JMP HERE

If the output waveform is not exactly saw-tooth, i.e. some saturation occurs
at the peaks, then adjust V+ & V- slightly until symmetric, with sharp
triangular corners saw-tooth waveform is obtained. If staircase-like (piece-
wise continuos) ramp is obtained, then you’ll have to replace D/A & see the
result. These steps are done priory to wiring the Differential Amplifier, i.e. till
now the output was taken single ended, that is between either pin 4 of D/A
& common ground, or pin 2 of D/A & ground.
Pins 2 & 4 of D/A are now connected to differential amplifier. Though not
much of a gain is required, but the essence of it’s presence is to null any dc
offsets present in the signal & exploit the whole dynamic range (swing) of
D/A output. DC nulling could be better achieved through adding resistance
supplied by +ve voltage at one end & at the other connected to –ve
(summing) terminal of the op-amp.

That was the test connection. In actual or final assembled circuit, D/A
should be disconnected from the data port whenever A/D is passing data to
D0-D7 (pins 2-9). That is done by latching D0-D7 outputs on the so-called
SN54LS373 octal D-type transparent latch witch contain edge triggered flip-
flops. As it is clear from the figure below, that it’s possible to ground pin1
(OC) of 373 permanently, & provide pin11 (C) of 373 with positive going
transients generated on pin 17 of the parallel port (bit 3 of Control port
(Select)) –chosen arbitrary-. Since as far as 373 is considered, when the
positive transition occurs –at pin11 (C) of 373-, the Q-outputs will be set to
the logic states that are setup at the D-inputs.
Following program does the task explained in the previous paragraph,
assuming :1. Bi-directional mode, that is 020H at address 077AH. Though
not that necessary.
2. Desired value to be passed to D/A is currently in memory
location named VAL.

MOV DX,037AH
MOV AL,04H
OUT DX,AL ;that is disable RD & WR of A/D, -more on them
;later-, so that A/D outputs are in high
;impedance state, & at the same time insure that
;373’s pin 11 (C) is high.
MOV DX,0378H ;the desired data (VAL) is at the
MOV AL,VAL ;373 D’s input, but not passed yet to D/A. The
OUT DX,AL ;passing requires positive going at pin 11(C) of
;373.
MOV DX,037AH ;
MOV AL,0CH ;pin 11 (C) of 373 goes low, but VAL is not
OUT DX,AL ;passed yet to the outputs of 373 i.e. input of
;D/A.
MOV AL,O4H ;positive going triggers D’s to appear at Q’s
OUT DX,AL ;i.e. VAL is passed to D/A
C3 C2 C1 C0
SelectIN pin17 INIT pin16 Autofeed pin14 Strobe, Pin1
C7 C6 C5 C4 Inverted Not inverted inverted Inverted
connected to Connected to Not connected Connected to
373’s pin11 (WR) of A/D RD of A/D
↑ ↑ ↑ ↑ ↑ ↑ ↑ ↑
04 @
Control
0 0 0 0 0 1 0 0 port
0C @
Control
0 0 0 0 1 1 0 0 port
↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓
C3 C2 C1 C0
This bit is INIT pin16 Autofeed pin14 Strobe, Pin1
C7 C6 C5 C4 used to Not inverted inverted Inverted
generate +ve Connected to Not connected Connected to
 going for 373’s (WR) of A/D RD of A/D
pin11 WR→disabled RD→disabled

Note: Maximum event occurrence speed at the parallel port output is 2µsec,
i.e. 500kHz = 0.5MHz, which is way below 373’s (50MHz) speed, & 20 times
slower than 0.1µsec conversion time of DAC08. Add to that, the fact that
overall process speed will be dictated by even slower ADC0804 conversion
time –taken by successive approximation-.

Connecting ADC0804:
Figure below shows the pinout of the ADC0804. As you might have already
guessed, pins 11-18 of ADC0804 are connected to pins 9-2 of Data port on
Parallel port respectively. Pins RD (2ADC0804) & WR (3ADC0804), are connected to
Control port pins 1 & 16. Pin INTR (5ADC0804) is connected to Status port pin
(15), to signal the indication of the end of conversion.

There is no specific reason for selecting those particular pins on Control &
Status ports. It’s just the connection suggested by W.A Steer @
http://.ucl.ac.uk/~ucapwas/lptadc.html, & is shown below.
 ADC0804 operation:
Figure below illustrates timing diagram that shows the interaction of the
control signals. As can be seen, conversion is started with WR pulse, then
only after INTR returns to logic zero, pulling RD pin low will transfer the
sampled & quantized analog value -into 8 bits-, to the pins (11-18) of
ADC0804.

It is important to note, that CS must be active (logic zero) during WR & RD

signaling, but CS being low would not be relevant during INTR, for that
reason our connection of CS (pin1 of ADC0804) to ground permanently, is
justified. One thing left to mention is, that while both RD & WR are disabled
(logic high) output pins (11-18) of ADC0804 are at high impedance state, so
that the data could safely passed to DAC08 through 373.
Once again, the operation sequence of ADC0804 goes as follows:
1. Pull WR (pin3) low, while RD (pin2) is high, than bring WR high again.
2. Wait until INTR (pin5) goes low.
3. Pull RD (pin2) low, while WR (pin3) is high, & read the data at pins
11-18 -of ADC0804-, which are connected to D0-D7 of Data port.
4. Put RD (pin2) high once again, as an indication that we are through
with A/D.
• Both RD (pin2) & WR (pin3) must be disabled (logic high) prior to the
beginning of conversion to ensure the correctness of sampling sequence.

ADC0804 Program portion:

MOV DX,037AH ;so that Data port D0-D7 is receptive to data
MOV AL,020H ;from ADC0804
OUT DX,AL ;
MOV DX,037AH ;both RD & WR are high (disabled)
MOV AL,024H ;
OUT DX,AL ;

024H @
0 0 1 0 0 1 0 0 Control
port
SelectIN INIT Strobe
Direction IRQ (pin17), pin16 Autofeed pin1,
→ D0-D7 Enable goes to not pin14, inverted
Reserved Reserved are input ‘not 373’s inverted, inverted. = high,
port used’ pin11 (C) to not to
high disable connected disable
WR RD

MOV AL,020H ;zero at WR pin of ADC0804 (activated)

OUT DX,AL ;
MOV AL,024H ;bring WR high (disable) again & wait until
OUT DX,AL ;conversion is done

MOV DX,0379H ;read Status port 0379H, & check out pin15
X: IN AL,DX ;ERROR, which is not inverted, since INTR of
TEST AL,08H ;ADC0804 is connected to it. When it’s low, the
JNZ X ;conversion is over. The checking is done via
;TESTing with 08H. If the result is not zero
;(yet), then pin15 or INTR of ADC0804 is not
;low yet & we must check it some 2µsec later
;repetitively until it goes low, & that is
;accomplished conditional jump (JNZ). Once
;ERROR is low, proceed.
MOV DX,037AH ;to activate RD, pull it low
MOV AL,025H ;
OUT DX,AL ;

025H @
0 0 1 0 0 1 0 1 Control
port
SelectIN INIT Strobe
Direction IRQ (pin17), pin16 Autofeed pin1,
→ D0-D7 Enable goes to not pin14, inverted
Reserved Reserved are input ‘not 373’s inverted, inverted. = low,
port used’ pin11 (C) to not to
high disable connected enable
WR RD

MOV DX,0378H ;read what is on the Data port

IN AL,DX ;
MOV VAL1,AL ;temporary remove the sampled value from AL to
;memory location VAL1, because we’ll have to
;use AL further
MOV DX,037AH ;disable once again both RD & WR (pull them
MOV AL,024H ;high)
OUT DX,AL ;

Recapitulation:
On the following page, the program that simply reads ADC0804 & then
outputs the value as it is to DAC08 repetitively is shown.
 .MODEL SMALL
.DATA
VAL DB ?
VAL1 DB ?
.CODE
MAIN PROC
MOV AX,@DATA
MOV DS,AX
MOV ES,AX
MOV AL 020H
MOV DX,077AH
OUT DX,AL
BEGINNING: CALL READ_A/D
;probably filtering algorithm goes here
CALL WRITE_to_D/A
JMP BEGINNING
MAIN ENDP
READ_A/D PROC
MOV DX,037AH
MOV AL,020H
OUT DX,AL
MOV DX,037AH
MOV AL,024H
OUT DX,AL
MOV AL,020H
OUT DX,AL
MOV AL,024H
OUT DX,AL
MOV DX,0379H
X: IN AL,DX
TEST AL,08H
JNZ X
MOV DX,037AH
MOV AL,025H
OUT DX,AL
MOV DX,0378H
IN AL,DX
MOV VAL1,AL
MOV DX,037AH
MOV AL,024H
OUT DX,AL
RET
READ_A/D ENDP
WRITE_to_D/A PROC
MOV DX,037AH
MOV AL,04H
OUT DX,AL
MOV DX,0378H
MOV AL,VAL
OUT DX,AL
MOV DX,037AH
MOV AL,0CH
OUT DX,AL
MOV AL,O4H
OUT DX,AL
RET
WRITE_to_D/A ENDP
END MAIN
Final Connection:

more elaborate DAC08 output connection

(for other suggestions refer to DAC08 Data Sheet)

parallel connector
(available from ‫ ﺷﺎرع وﺻﻔﻲ اﻟﺘﻞ @ ﻏﺰال‬, about 3.5JD –1998’s price-)
 Notes and References:
1. Data sheet of ADC0804 is available from:
http://www.national.com/ds/AD/ADC0801.pdf
2. Data sheet of DAC08 is available from:
http://www.national.com/ds/DA/DAC0800.pdf
3. Paper on the ‘Use of a PC Printer Port for Control and Data Acquisition’ is
available from: http://et.nmsu.edu/~etti/fall96/computer/printer/printer.html
4. Suggested connections for the control & status lines are by W. A. Steer
http://www.ucl.ac.uk/~ucapwas/ppadc.html
5. Paper titled ‘Interfacing to the IBM-PC Parallel Printer Port’ from
http://www.doc.ic.ac.uk/~ih/doc/par/
6. Some really informative material available in both http & .pdf formats about
SPP, EPP & ECP, all under title ‘Interfacing the PC’ are available at
http://www.geocities.com/SiliconValley/Bay/8302/ecp.html, & under
http://www.senet.com.au/~cpeacock
7. For the data sheet of 373 check out one of the following:
http://www.national.com/ds/DM/DM54LS373.pdf or
http://www.fairchildsemi.com/ds/DM/DM74LS373.pdf
8. It’s very possible that you might need either or both 244 octal buffer or/and
245 bi-directional transceiver, their data sheets are available from:
http://www.national.com/ds/DM/DM54LS244.pdf
http://www.fairchildsemi.com/ds/DM/DM74LS244.pdf
http://www.national.com/ds/DM/DM54LS245.pdf
http://www.fairchildsemi.com/ds/DM/DM74LS245.pdf
9. Fortunately there is some ‫ أوﻻد ﺣﻼل‬whom have all the data sheets related to
microprocessor projects. Their site address is
http://www2.lacitec.on.ca/intranet/info1002/COURS/CA1/PIECES.HTM
10. There is a book –down stares- in our library, ‘PC Intern’ , chapter 7 is titled
‘The Parallel Port’.
11. For exhaustive discussion solely restricted to the issue of the Parallel Port,
consult Janet Louise Axelson “Parallel Port Complete”,
ISBN: 0965081915, (Feb 1997) Lakeview Research publishing.

‫ﻣﻮﺟﻮد ﻓﻲ اﻟﻤﻜﺘﺒﺔ‬
12. Don’t ever hesitate consulting Dr. Ahmad Hiasat & Eng. ‫ﻋﺼﺎم ﻗﺮاﻟﺔ‬, & don’t
waste your time with the others.
13. For actual I/O signal level conditioning refer to ADC0804/DAC08 data
sheets.
14. If you haven’t understand a thing in this document, then just wire the circuit
entitled (Final Connection) & copy the program that occupies the whole page (the
long one). -I think one should concentrate more on writing efficient filter
algorithms, i.e. using pointers, efficient memory utilization … etc, instead of
wasting time on figuring out which pin is high & which is low-.
15. The author of these notes, have used his best efforts in preparing this notes.
These efforts include the development, research, & testing of the diagrams &
programs to determine their effectiveness. The author make no warranty of any
kind, expressed or implied, with regard to these programs or documentation
contained in these notes. The author shall not be liable in any event for
incidental or consequential damages in connection with, or arising out of, the
furnishing, performance, or use of these programs.