PWM Positive Buck-Boost Converter with Reduced Switching Loss

employing Quasi-Resonant Operation

Han-Shin Youn, Ki-Bum Park, Hyun-Wook Seong, Gun-Woo Moon, and Myung-Joong Youn

Department of Electrical Engineering, KAIST,
335 Gwahangno(373-1 Guseong-Dong), Yuseong-Gu, Daejeon, 305-701, Republic of Korea
Phone: +82-42-350-8022, Fax: +82-42-350-3498, E-mail: yhs8312@powerlab.kaist.ac.kr


Abstract -- In this paper, a PWM positive buck-boost
converter with the reduced switching loss employing the quasi-
resonant operation is proposed. Since the proposed converter
utilizes resonance between a resonant inductor

and a resonant
capacitor, the switching loss and filter inductor size can be
reduced. Moreover, the proposed converter shows the positive
polarity output voltage configuration compared with the buck-
boost converter. The operational principle and theoretical
analysis are presented. To confirm the performance of the
proposed converter, experimental results from a 24 V to 66 V,
100 kHz prototype are presented.

Index TermsBuck-Boost converter and resonant converter.
I. INTRODUCTION
The non-isolated dc-dc converters have been widely used
in industry [1]-[3]. In dc-dc conversion applications which
require a wide range of input and output voltages such as
battery powered power supplies, fuel-cell systems, PFC and
LED, the buck-boost converters are appropriate solutions [4]-
[8]. However, the buck-boost topology in Fig. 1 (a) suffers
from the high voltage stresses which are the sum of the input
and output voltages, the high turn-off instant currents on
devices, the large filter inductor current which increases the
filter inductor size, and the negative polarity of the output
voltage. To change the polarity, an additional switch and a
diode should be required [Fig1. (b)]. Therefore, the switching
and conduction losses of the conventional buck-boost topologies
are considerable.
To complement these drawbacks, a PWM positive buck-
boost converter with the reduced switching loss employing
the quasi-resonant operation is proposed in this paper. As can
be seen in Fig. 2, the proposed converter utilizes a resonant
capacitor C
r
, a resonant inductor L
r
and diodes D
1
, D
2
and D
C
.
These components not only constitute a resonant tank which
operates during the switch turn-on interval DT
S
but also
make the proposed converter achieve the positive polarity of
the output voltage V
O
. Since the resonant tank transmits the
sinusoidal powering current, the low average filter inductor
current can be achieved and reduces the size of a filter
inductor L
f
. Moreover, D
1
is turned off smoothly due to the
sinusoidal powering current. The voltage stresses on D
1
and D
C

are clamped to V
O
, and the voltage stresses across the switch S

(a)

(b)
Fig. 1. Conventional Buck-Boost Converters. (a) Buck-Boost converter.
(b) Positive Buck-Boost converter.


Fig. 2. Proposed converter.

and D
2
can be approximately decreased to V
O
. Therefore, the
switching loss of the proposed converter can be reduced
compared with that of the conventional converters.
II. OPERATION PRINCIPLES
The proposed converter utilizes the resonant tank which is
composed of C
r
and L
r
. Due to the resonant operation during
DT
S
, the operation of the proposed converter can be divided
into two regions in accordance with the resonant period T
r

which can be expressed as in (1) i.e., the below resonant
region ( T
r
/2 < DT
S
) and the above resonant region ( T
r
/2 >
DT
S
), as the conventional resonant converters [10]-[14].
1
, 2
r r r r
r r
T L C
L C
e t = =
(1)
In addition, according to the filter inductor current I
Lf
, the
proposed converter can be operated in the continuous
conduction mode (CCM) or discontinuous conduction mode
(DCM).
978-1-4244-5287-3/10/$26.00 2010 IEEE 3319


Fig. 3. Key waveforms in the below resonant region.

A. Below resonant region ( T
r
/2 < DT
S
)
In the below resonant region, the half resonant period is
shorter than DT
S
. Fig. 3 shows the key waveforms of CCM
operations in the below resonant region, and Fig. 4 describes
the topological states corresponding to Fig. 3. The operation
of one switching period can be divided into three modes.
Before t
0
, I
Lf
flows through D
2
, D
C
, L
r
and C
r
.

Mode 1 [ t
0
~ t
1
] : After S is turned on at t
0
, D
2
and D
C

become reverse-biased, and the powering path from the input
to the output is formed through L
r
, C
r
, D
1
, and S. Then, C
r
is
discharged in a resonant manner, and the resonant tank
transmits the powering current which is sinusoidal in shape.
Moreover, the magnitude of the powering current is zero at t
1

because the resonance between C
r
and L
r
is finished at this
time. On the other hand, I
Lf
(t) increases linearly due to the
applied voltage V
i
. The switch current I
S
(t) contains both the
powering current and I
Lf
(t). Therefore, I
Lf
(t), I
S
(t) and V
Cr
(t)
are expressed as follows:
0 0
( ) ( ) ( )
f f
i
L L
f
V
I t I t t t
L
= +
(2)
1 0 0
( ) ( ( ) ) sin( ( )) ( )
f
r
S i Cr O r L
r
C
I t V V t V t t I t
L
e = + +
(3)
{ }
0 0 0
( ) ( ) ( ( ) ) 1 cos( ( ))
Cr Cr i Cr O r
V t V t V V t V t t e = +
(4)
The voltage across the D
C
, V
Dc
(t) is clamped to V
O
, and
the voltage applied on D
2
, V
D2
(t) is the sum of V
i
and V
Cr
(t).

Mode 2 [ t
1
~ t
2
] : After the resonance finished at t
1
, the
powering path through C
r
, L
r
, D
1
and S is blocked. Thus, the
magnitudes of I
S
(t) and I
Lf
(t) are equal until t
2
. It means that

(a)

(b)

(c)
Fig. 4. Topological states of operational mode corresponding to Fig.3.
(a) Mode 1 ( t0 ~ t1). (b) Mode 2 ( t1 ~ t2). (c) Mode 3 ( t2 ~ t3).

only I
Lf
(t) flows through S, and the current flowing through
the resonant tank and D
1
is zero. Since the voltage across L
f

is V
i
during this period, I
Lf
(t) and I
S
(t) linearly increase as (5).

1 1
( ) ( ) ( ) ( )
f f
i
L S L
f
V
I t I t I t t t
L
= = +
(5)
As mentioned before, the current flowing through C
r
is
zero, so the magnitude of V
Cr
(t) maintains constant value.
After I
D1
(t) reaches zero at t
1
, L
r
resonates with junction
capacitors of D
1
and D
C
resulting in small oscillations while
V
Dc
(t) is still clamped to V
O
. V
D2
(t) is the sum of V
i
and
V
Cr
(t).

Mode 3 [ t
2
~ t
3
] : After S is turned off at t
2
, D
2
and D
C

become forward-biased, and D
1
is naturally turned off.
Therefore, the current path is formed through D
2
, D
C
, L
r
and
C
r
. I
Lf
(t) decreases until t
3
due to the applied voltage, V
Cr
(t),
and the energy stored in L
f
is absorbed by C
r
. I
Lf
(t) is
expressed as (6).
2 2
( )
( ) ( ) ( )
Cr
Lf Lf
f
V t
I t I t t t
L
=
(6)
The degradation of I
D2
is caused by junction capacitances
of diodes and L
r
. In addition, this degradation flows through
D
C
during the switch turn-off interval (1-D)T
S
[9]. Therefore,
I
Dc
(t) and I
D2
(t) are approximated as follows:
( )
C
t
D O
r
C
I t V
L
~
(7)
2
2 2
( )
( ) ( ) ( ) ( ) ( )
r
f C f
C
t
D L D L O
f r
V t
C
I t I t I t I t t t V
L L
= ~
(8)
The voltage across D
1
, V
D1
(t) is clamped to V
O
, and V
S
(t)
is the sum of V
i
and V
Cr
(t). At t
3
, one switching operation
ends, and the same operation is repeated.
3320

VLf
IS
VS
ILf
DTs
Ts
Vi
S
VCr
Vi+VCr
IS-ILf
ICr
ILf
VCr
VCr_avg
ID1
ILr VD1=VO
t2 t3 to
ID2
IDc
VD2=Vi+VCr
VDc=VO
t1

(a)

(b)
Fig. 5. Operation in the above resonant region. (a) Key waveforms in
the above resonant region. (b) Topological state of Mode 2 (t1~t2).

B. Above resonant region ( T
R
/2 > DT
S
)
The operation in the above resonant region is similar to
that in the below resonant region. However, there is little
difference between the operation in the below and above
resonant regions. As can be seen in Fig 5, in the above
resonant region, the half resonant period is longer than DT
S
.
Thus, the switch is turned off at t
1
before the resonance
between C
r
and L
r
is finished. Moreover, the powering path
through C
r
, L
r
, D
1
and S is blocked, and D
2
becomes forward-
biased. Since V
Cr
(t) is inversely applied to L
f
, the magnitude
of I
Lf
(t) decreases, and C
r
is charged. In addition, V
O
is
inversely applied to L
r
and the energy stored in L
r
is
transferred to the output. Thus, I
Lr
(t) decreases linearly until t
2

and reaches zero. I
Lf
(t) and I
Lr
(t) are expressed as follows:
1 1
( )
( ) ( ) ( )
f f
Cr
L L
f
V t
I t I t t t
L
=
(9)
1 1
( ) ( ) ( )
r r
O
L L
r
V
I t I t t t
L
=
(10)
V
Dc
(t) is clamped to V
O
, and V
S
(t) is the sum of V
i
and
V
Cr
(t). At t
2
, D
1
is turned off naturally.

C. Operation in DCM
Considering the low magnitude of L
f
or light load

(a)

(b)
Fig. 6. DCM operation of the proposed converter. (a) DCM key waveforms
in the below resonant region. (b) Topological state of Mode 4 (t3~t4).

conditions, I
Lf
decreases to zero during (1-D)T
S
. Therefore,
the proposed converter is operated in DCM. After I
Lf
reaches
zero, L
f
, the output capacitance of S and junction capacitances
of diodes are operating in a resonant manner and result in
oscillations. Fig. 5 shows an additional DCM topological
state of Mode 4(t
3
~t
4
) and DCM waveforms of the proposed
converter in the below resonant region.

III. ANALYSIS AND CHARACTERISTICS
In this section, the theoretical analysis of the proposed
converter is presented compared with the buck-boost converter.

A. DC conversion ratio in CCM
Provided that the proposed converter operates in CCM, the
average voltage of C
r
during (1-D)T
S
, V
Cr_avg
|
(1-D)Ts
can be
expressed as (11) from the voltage-second balance of L
f
.
(1 )
_
1
D Ts
Cr avg i
D
V V
D

(11)
In the below resonant region, there is no powering current
which flows through D
1
during Mode 2(t
1
~t
2
). Thus, the
average powering current flowing through the D
1
, I
D1_avg
is
expressed as (12) from (3).
1
_ 0
2
( ( ) )
r
D avg i Cr O
S
C
I V V t V
T
= +
(12)
Since the average powering current is equal to load current
I
O
, the ripple of V
Cr
, V
Cr
and V
Cr
(t
0
) can be easily obtained
as (13) and (14).
O S O S
Cr
r O r
I T V T
V
C R C
A = =
(13)
3321


Fig. 7. DC conversion ratio with Q variation in CCM (Tr/2 = 0.6TS).

0
1
( )
1 2 1 2
O S
Cr i Cr i
O r
V T D D
V t V V V
D D R C
= + A = +

(14)
In the above resonant region, V
Cr
can be achieved as (15)
using (3), and V
Cr
(t
0
) can be obtained as (16) from (11) and
(15).
0
( ( ) )(1 cos( ))
Cr i Cr O r S
V V V t V DT e A = +
(15)
{ }
{ }
0
2 (1 ) 1 cos( ) 1 cos( )
( )
(1 ) 1 cos( ) 1 cos( )
r
r S r S
C i O
r S r S
D D DT DT
V t V V
D DT DT
e e
e e
+
=
+ +
(16)
As shown in Fig 3, the average powering current which
flows through D
1
is expressed as (17) from (3) and (10).
{ }
( )
1
_
2 1 cos( )
1 cos( ) 1 1
r r S i i
D avg O
r S O
C DT V V
I V
DT D V D
e
e
| |
| |
=
|
|
|
+
\ .
\ .
(17)
Therefore, I
O
can be expressed as (18) in the below
resonant region and as (19) in the above resonant region.
2
2
1
1 2
Tr
DTs
O i S r
O O
O S O r
V V T C
I V
R T D R C <
| |

= = +
` |

\ . )
(18)
{ }
( )
2
2 1 cos( )
1 cos( ) 1 1
Tr
DTs
r r S O i i
O O
O r S O
C DT V V V
I V
R DT D V D
e
e >
| |
| |
= =
|
|
|
+
\ .
\ .


(19)
By using (18) and (19), the dc conversion ratio can be
obtained as follows:
1
1
O
i
V
A
V D
=

(20)
1 cos( ) 1 cos( ) 1
1 1 2
1 cos( ) 1 cos( )
r S r S
r S r S
DT DT
A Q
Q DT DT
e e
e e

+
= + +
`
+

)
,
S
O r
T
Q
R C
=
(21)
The effect of the resonant operation A affects the DC
conversion ratio only in the above resonant region and
becomes one in the below resonant region. Fig. 7 shows the
DC conversion ratio as a function of Q which is affected by
the load condition and C
r
, provided that the half resonant
period is equal to 0.6T
S
. As Q increases, the less DC
conversion ratio can be achieved in the above resonant region
due to the damping effect.


Fig. 8. DC conversion ratio in DCM with Q variation (Tr/2 = 0.6TS).

B. DC conversion ratio in DCM
As shown in Fig. 6, the average powering current in DCM
is equal to that in CCM. However, the duration of the switch
off state DT
S
affects the average voltage of V
Cr
during DT
S
,
V
Cr_avg
|
DTs
. The relationship between V
Cr_avg
|
DTs
and V
i
is
expressed as (21) using the voltage-second balance of L
f
.
'
_
'
D Ts
Cr avg i
D
V V
D
= . (22)
Thus, the DC conversion ratio in DCM can be obtained as
follows through the same process of the DC conversion ratio
in CCM.
'
O
i
V D
A
V D
=
(23)
2
4
1 1
'
2
D
KA
KA
D
D
+ +
=
,
2
f
O S
L
K
R T
=
(24)
As presented in Fig. 3, the DC-conversion ratio in CCM is
primarily dependent on the duty ratio except for that in the
above resonant region which is affected by Q. On the other
hand, as can be seen in Fig. 8, the DC conversion ratio in
DCM is strongly influenced by the load condition regardless
of the operation in the above and below resonant regions.
Moreover, the damping factor Q is also affected by the load
conditions, since Q is inversely proportional to the load
variation. Thus, the load variation in DCM changes the
operating duty ratio as other converters.

C. Voltage and current stress of devices
The voltage stresses across devices of the buck-boost
converter can be expressed as the sum of input and output
voltage, V
i
+V
O
. Thus, the voltage stresses of the buck-boost
converter can be changed according to the input voltage
variation. On the other hand, as mentioned before, the
voltage stresses on S and D
2
of the proposed converter are
V
i
+V
Cr
. Moreover, if V
Cr
is small enough, these can be
approximated by V
O
which is equal to the voltage stresses
3322

across D
1
and D
C
. This means voltage stresses are not
influenced by the input voltage variation, and only output
voltage determines voltage stress. Furthermore, the voltage
stresses on D
1
and D
C
are clamped to V
O
, since two diodes
are connected in series across V
O
. Therefore, these reduced
voltage stresses can make the proposed converter utilize
schottky diodes to minimize reverse recovery of diodes.
In the below resonant region, for the sake of analysis of
current stresses, provided that the half resonant period of the
resonant tank is equal to DT
S
, the average powering current
which flows through D
1
is the same as I
O
. Therefore, the peak
current of I
D1
can be expressed as (25).
1
_
2
O
D peak
I
I
D
t
= (25)
The average I
D2
is equal to I
O
and I
D1_avg
due to the
current-second balance of C
r
. Moreover, I
D2
is the same as I
Lf

during (1-D)T
S
. Therefore, the peak currents of D
2
and L
f
are
expressed as (26).
2
_ _
1 2
O S S
D peak Lf peak
f
I DV T
I I
D L
= = +

(26)
If the current ripple of L
f
is small enough, the peak
magnitude of I
S
is represented as (27) by the sum of I
D1_peak

and I
Lf_avg
.
_
1 2
O O
S peak
I I
I
D D
t
= +

(27)
In the above resonant region, to simplify the analysis of
current stresses, provided that the quarter resonant period of
the resonant tank corresponds to DT
S
, the peak current which
flows through D
1
can be obtained as (28) from (3), (16) and
(23).
( )
1
_
2 1
1 1 1 2
1
S r
D peak
r
V C
I Q
D Q L

= + +
`

)
(28)
As shown in Fig. 5, the energy stored in L
r
is transferred
to the output through D
1
and D
2
, and I
Lf
flows through D
2

during Mode 2(t
1
~t
2
). Therefore, the peak current stress on
D
2
is the sum of I
D1_peak
and I
Lf_peak
, and it is similar to the
peak switch current stress, since both I
Lf
and I
D1
flow through
the switch before the switch turn-off instant. Considering the
current-second balance of C
r
, I
Lf_avg
and I
Lf_peak
are expressed
as (29) and (30) from (9) and (28). Thus, I
S_peak
and I
D2_peak

are expressed as (31).
( ) _ 2
2 1
1 1 1 2
(1 )
f
S r
L avg
S
V C
I Q
D T Q

= + +
`

)
(29)
( ) _ 2
2 1
1 1 1 2
(1 ) 2
f
S r
L peak S
S f
DT C
I V Q
D T Q L


= + + +
` `

)
)
(30)
( )
( )
2
, _
1 1 2
2
1
1 1 2
S S S r r
S D peak
S r f
Q
V V DT C C
I
D Q D T L L

+
| |

= + + +
| `
|

\ .
)
(31)
There is a small current drop of I
D2
during (1-D)T
S
. The
degradation of I
D2
which flows through D
C
can be
approximated as (32) irrespective of the operation in the
above and below resonant regions [9].
3
t
D O
r
C
I V
L
~
(32)
In DCM, the current stresses on devices are expressed as
(33)~(35) in the below resonant region and (35)~(37) in the
above resonant region
1
2
_
2
Tr
DT
s
O
D peak
I
I
D
t
<
=
(33)
2
_
2 2
Tr
DTs
S O
S peak S
f
V I
I DT
L D
t
<
= +
(34)
3
t
D O
r
C
I V
L
~
(35)
1
2
_
2 ( ') 1
1 1 2
'
Tr
DTs
S r
D peak
r
V D D C
I Q
D Q L >
| | +
= + +
|
\ .
(36)
2
2
, _
2( ') 1
1 1 2
' 2
Tr
DTs
S r
S D peak S
r f
DT C D D
I V Q
D Q L L >

| | +
= + + +
` |
\ .
)
(37)

D. Filter inductor
The size of L
f
is usually determined by I
Lf_avg
and the
magnitude of L
f
. To reduce the size of L
f
, the low magnitude
of L
f
and low I
Lf_avg
are required. However, the low
magnitude of L
f
induces the high current ripple which
inevitably increases the switch turn-off loss.
In the buck-boost converter, I
Lf_avg
is the same as I
in_avg
/D
which increases as duty cycle decreases. On the other hand,
in the proposed converter, I
Lf_avg
is similar to the average
input current, I
in_avg
. Thus, I
Lf_avg
of the proposed converter is
lower than that of the buck-boost converter. Moreover, I
S_peak

is rarely changed according to the magnitude of L
f
due to the
sinusoidal powering current. As a result, compared with the
buck-boost converter, the proposed converter can achieve the
small size L
f
, and it is more suitable for the low power
applications despite of auxiliary devices.

E. Switching loss and conduction loss
The switching loss is primarily determined by I
S
and V
S
at
turn-on and off instant. In the below resonant, although I
S_peak

of the proposed converter increases due to the sinusoidal
powering current, the low magnitude of I
S
at the switch
transition can be achieved. In addition, the voltage stress
across S of the proposed converter is expressed as V
i
+V
Cr

which is lower than that of the buck-boost, V
i
+V
O
. Thus, the
switching loss of the proposed converter can be lower than
that of the buck-boost converter. On the other hands, in the
above resonant region, the increased switch turn-off current
and loss are unavoidable, since the switch is turned off
during the half resonant period. However, as shown Fig .1 (b),
to achieve the positive polarity of V
O
, the buck-boost
converter should use an additional switch which causes the
increased switching loss. Although the switching loss of the
proposed converter increases in the above resonant region,
3323

the proposed converter is still attractive at the low power
applications.
The auxiliary diodes, D
2
and D
C
of the proposed convert
cause the additional conduction loss. This additional
conduction loss can be obtained from the sum of I
D2_avg
and
I
Dc_avg
which is equal to the powering current and I
O
. Thus,
the conduction loss of the proposed converter is higher than
that of the buck-boost converter. This additional conduction
loss is the main drawback of the proposed converter, which
does not make it suitable for the high power applications.
Table I shows the comparison of device stresses between
the buck-boost converter and the proposed converter,
provided that the buck-boost and proposed converters are
operated at the same duty cycle.
To be brief, although the number of components and
conduction loss are increased, the proposed converter can
achieve a small-size filter inductor, reduced switching loss,
positive polarity of V
O
and the low voltage stress on devices
which make it suitable for the low power applications.

F. Design of resonant capacitor C
r
and inductor L
r

Fig. 9 shows the current waveforms of S in the proposed
converter according to the variations of T
r
. In the above
resonant region, the current stresses can be reduced, while the
switch turn-off loss is increased. On the other hand, in the
below resonant region, though the switch turn-off loss is
reduced, the current stresses across devices are increased.
Provided that the proposed converter operates in the
below resonant as a step-up converter, to achieve the most

(a) (b)
Fig. 9. Comparison of switch current waveforms with Tr variation.
(a) Above resonant region. (b) Below resonant region.

suitable switching loss and low current stress, the design
guidelines of T
r
, C
r
and L
r
are as follows.
2
r S
T DT =
(38)
( ) 4
S
r
r
DT
C
L
t
=
(39)
However, if the proposed converter operates in the above
resonant region to work as a step-down converter, as
mentioned before, the increased switch turn-off current and
loss are unavoidable. Moreover A and Q which cause
damping effect are affected by load condition and C
r
as well.
Thus, an adequate trade-off among these factors should be
required.
In DCM, the condition (38) and (39) cannot be guaranteed
due to the decreased duty ratio.

IV. EXPERIMENTAL RESULTS
To verify the performance of the proposed converter, a
prototype for LED applications is implemented with the
TABLE I
COMPARISON BETWEEN PROPOSED AND BUCK-BOOST CONVERTER IN CCM
Buck-Boost Converter Proposed Converter
ILf_avg
_ in avg
I
D

_ in avg
I
I
S_peak

_
2
in avg i S
f
I DVT
D L
+

( )
( )
_
/ 2
1
1
2
r S
in avg
T DT
D
I
D
t
<

+
`
)
or
( )
( )
( ) / 2
2 1
1 1 1 2
1 1 2
r S
S S r r
S
S r f
T DT
V V C C
Q DT
D Q D T L L
>
| |

+ + + + | `
|

)
\ .
V
Q

1
i
V
D
or
O
V
D

O
V or
1
S
i Cr
V
V V
D
+ ~

ID_peak
1 2
O S S
f
I DV T
D L
+

D1:
( ) / 2
2
r S
O
T DT
I
D
t
<
or ( )
( ) / 2
2 1
1 1 1 2
1
r S
S r
r
T DT
V C
Q
D Q L
>

+ +
`

)


D2:
( ) / 2
1 2
r S
O i S
f
T DT
I DVT
D L
<
+

or
( )
( )
( ) / 2
1 1 2
2
1
1 1 2
r S
S S S r r
S r f
T DT
Q
V V DT C C
D Q D T L L
>

+
| |

+ + + | `
|

\ .
)

DC:
t
O
r
C
V
L

VD
O
V
D

D
1
, D
C
:
O
V
D2 :
i Cr
V V +
3324

2 u s / d i v

(a)
2 u s / d i v

(c)



Gate(10V/div)
V
S
(20V/div)
V
Cr
(10V/div)
2 u s / d i v

(a)
2 u s / d i v
I
S
(5A/div)
I
Lf
(1A/div)
I
Cr
(5A/div)

(c)



following specification; input voltage V
i
= 24-V, output
voltage V
O
= 66-V, and output power P
O
= 100-W. The
design parameters are as follows; switching frequency F
S
=
V
D1
(50V/div)
V
Dc
(50V/div)
V
D2
(50V/div)
2 u s / d i v

(b)
I
D1
(5A/div)
I
D2
(5A/div)
I
Dc
(1A/div)
2 u s / d i v

(d)



V
D1
(20V/div)
V
Dc
(20V/div)
V
D2
(20V/div)
2 u s / d i v

(b)
I
D1
(5A/div)
I
D2
(5A/div)
I
Dc
(0.5A/div)
2 u s / d i v

(d)



100kHz, filter inductance L
f
= 188uH, resonant inductance L
r

= 1.8uH, resonant capacitance C
r
= 2.25uF, switches S :
FDP2572 ( R
ds
= 45 m, V
DSS
= 150 V, C
oss
= 183 pF ) , diodes
Figure. 10. Experimental waveforms corresponding to specifications at full load. (a) Gate, V
S
and V
Cr
. (b) V
D1
, V
Dc
and V
D2
.
(c) I
S
, I
Lf
and I
Cr
. (d) I
D1
, I
D2
and I
Dc
.
Figure. 11. Experimental waveforms in the above resonant region at VO = 20 V. (a) Gate, VS and VCr. (b) VD1, VDc and VD2.
(c) IS, ILf and ICr. (d) ID1, ID2 and IDc.
3325


Fig. 12. Measured efficiency corresponding to specifications.

D
1
~D
C
: 31DQ10( V
F
= 0.85 V, V
RRM
= 100 V ).
Fig. 10 shows the experimental waveforms at full load
condition. As mentioned before, the resonant tank transfers
the sinusoidal powering current which flows through D
1
, and
I
S
is the sum of this powering current and I
Lf
. Although the
peak current stress of S reaches approximately 9A, the switch
current of turn-off instant decreases to about 6A, and D
1
is
naturally turned off due to the sinusoidal powering current.
Moreover, V
S
and V
D2
reaches over 70V, and V
D1
and V
Dc

are clamped to 66V which is lower than that of the buck-
boost converter.
Fig. 11 shows the additional experimental waveforms in
the above resonant region with the input voltage V
i
= 24V and
the output voltage V
O
= 20V. They are agreed well with the
theoretical analysis except for some oscillations caused by
parasitic components.
Fig. 12 shows the measured efficiency of the proposed
converter corresponding to specifications. At light loads, the
efficiency of the proposed converter is similar to that of the
buck-boost converter due to the additional conduction loss.
However, as load increases, since the reduced switching loss,
the efficiency of the proposed converter can be higher than
that of the buck-boost converter despite of the increased
conduction loss. As a result, the proposed converter can
achieve higher efficiency than that of the buck-boost converter.
V. CONCLUSION
A PWM positive buck-boost converter with the reduced
switching loss employing the quasi-resonant operation which
adopts L
r
and C
r
as a resonant tank is proposed. The
sinusoidal powering current caused by the resonant tank can
reduce the switching loss and filter inductor size. In addition,
the voltage stresses on the switch and the diodes are lower
than that of the buck-boost converter and the voltages across
D
1
and D
C
are clamped to the output voltage. Moreover, the
proposed converter achieves the positive polarity of V
O
, and
D
1
is turned off smoothly. Therefore, it is suitable for low
power applications.
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