Anda di halaman 1dari 5

Physics 261H, 251

Digital Logic Page 1

To gain a little hands on experience with the basic elements digital logic circuits. The NAND ( not-and ) gate will be used as a fundamental building block.. Digital logic electronics are an important part of many of our technologies. Often huge numbers of individual logic elements are produce on a small piece of silicon. Individual digit logic gates are usually built of transistors, but it is much easier to think of these logic gates as the fundamental building blocks, and mentally hide the underlying transistors. If you open an electronics catalog, you will find a large number of families of digital logic gates. The to major families are TTL and CMOS, and then these break down into subfamilies that are faster, or use less power. TTL stands for Transistor-Transistor Logic, while CMOS stands for Complementary Metal -Oxide Semiconductor. Whenever possible one should try to use logic gates from only one family ( and subfamily). Different families have different voltage and power requirements. CMOS features low power consumption and can operate with a supply voltage from +3 to + 15 Volts, while TTL uses more power and the supply voltage range is +4.75 to+5.25 Volts. Based on power consumption and pickiness of the supply voltage, one might always choose CMOS over TTL, but TTL will handle a bit more current drain on its output, A big reason for choosing TTL over CMOS is that CMOS is easily destroyed by a small zap of static electricity. When working with CMOS, one needs to wear a grounding strap. For this reason, we will be using TTL logic gates. Most of the members of the non-enhanced TTL family have designations of the form 74XX, where XX is some two digit number. For example a quad NAND gate has the industrial designation 7400. (The form for enhanced TTL are usually things like 74LSXX, while for CMOS it is usually 40XX.) To understand what digital logic gates do, you need to understand logic. For example, what does the statement, If X and Y then A, mean. It is often easier to express the meaning of a logical statement in terms of a truth table than in words. Truth tables express all possible combinations of inputs, for example X is true and Y is false, and the


related output might be A is false. In the table above the conditions of input (X,Y) and output (A) are written in terms of high Name Truth table X H L A L H Symbol


Inverter NOT





















or low voltage rather than true and false. This is

Physics 261H, 251

Digital Logic Page 2

because the on one occasion a high voltage condition might be considered a logical true, while in another it might be a logical false. For example, consider a switch used to relay information about whether a safety gate is closed. Does non zero voltage on the return line from the switch at the gate indicate that gate is open or closed. Well depending how things are arranged, closing the gate could either complete the currents path or break the path. A voltage on the return cable could indicate true or false to the question Is the gate open? Thus, it is just easier to describe everything in terms of high and low signal voltages rather than true or false. The integrated circuit that is used in this experiment is a 7400, which is a quad NAND. That is it is 4 separate two input NAND gates.

The power supply voltage, which is usually denote VCC must be between 4.75 to 5.25 volts. NEVER EVER greater than 5.25 volts. The voltage connected to the inputs must be less than or equal to the power supply voltage, VCC. To force an input low connect it to ground bus To force an input high, connect it to the 5V bus. Usually an input that is not connected to anything will act as if it is force high. It is a good idea to connect all unused inputs to either ground or VCC, and do so that the output of the gate is high..

2. Trigger point of TTL

Once the voltage regulator is working correctly, temporarily disconnect the battery. Connect pin # 14, VCC on the 7400 quad NAND gate to the +5 volt bus, and pin #7, ground, to the ground bus. Next, install the 25 kS potentiometer so that it acts as a voltage divider between the +5 V supply and ground ( see fig. 3). Finally connect the center lead of the potentiometer to pins #12, 13 of the 7400. Wire the DMM to monitor the voltage supplied from the potentiometer to these two inputs and use the secondary voltmeter to the monitor the output of the NAND gate, pin # 11. Check over your wiring, and if it is OK, reconnect the battery. Sweep the input voltage by turning the potentiometer, and plot the output voltage as a function of input voltage for the NAND gate.

Figure 1. The 7800 quad NAND gate. Procedure: The general flow of this experiment is to first review the operating requirements of TTL logic gates and then to install a voltage regulator to guarantee than the TTLs supply voltage requirements are met. Next a variable voltage is applied to the inputs of a NAND gate to find the voltage where the output switch from High to Low or Low to High. The use of LEDs as voltage indicators will be introduced, Finally a number of logic elements will be built using several NAND gates.
It is suggested that before you wire each circuit that for each NAND gate used, you label the associated chip pin number on the circuit diagram.

Figure 3 Circuit for finding the trigger point voltage of TTL gates.

1. TTL rules

3. Truth table for single NAND

Remove the

Physics 261H, 251

Digital Logic Page 3

potentiometer and the DMM from the circuit. What is the output state, if both pins #12 and 13 are connected to the +5 V bus? What is the output state, if both pins are connected to the ground bus? What is the output state, if one pin is connected to +5 V and the other to ground? Try both cases. Make a truth table based on your experimental data and compare it to the truth table provided for a NAND gate. to figure out the resistance, R, of the resistor .) In the circuit used in part 3, replace the voltmeter. with an LED and 220 S resistor in series, see fig 4. Note you need to know which end of the diode to put toward the + and which end to put toward the -. The long lead should be toward the +, so the short lead should be connected to the resistor. Test the logic function of the NAND gate as in part 3 but using a LED as an logic indicator. If the two input leads of a NAND gate are connected together and treated as a single input, the gate becomes a NOT gate. Wire a NOT gate from a NAND gate and test that its truth table is that of a NOT gate.

4. LED as logic indicators

As a logic circuit become progressively more complex, it becomes a progressively more complex problem to monitor the input and output signals, especially with Digital MultiMeters. One could either move the probes from place to place, or buy lots of DMMs. Because all you really need to know about a logic signal is if it is a low signal (~ 0V) or a high signal (~ 5V), a DMM is overkill. A simple, cheap solution is to use Light Emitting Diodes (LED) as detectors. LEDs are diodes and have a Current vs Voltage curve similar to the previous studied diodes, that is a minimum voltage in forward bias direction is required before significant voltage will flow. Usually this turn on voltage, VTURN_ON, is between 0.6 and 1.2 volts. One usually puts a resistor (~500S) in series with the LED to limit the current through an LED to a level that will not fry the it. (LEDs have maximum current ratings, IMAX , for an applied voltage, V, use :

5. Build a NOT gate.

6. Build an AND gate If the output of a NAND gate is negated (put through a NOT gate) the combination is an AND gate. Wire an AND gate and test its truth table.

7. Build an OR gate

If both of the input to a NAND gate are first negated, one has an OR gate. Wire an OR gate and test its truth table.

8 Build a NOR gate. If the output of an OR gate is negated the result is a NOR gate. Wire

Physics 261H, 251

Digital Logic Page 4

a NOR gate and test its truth table.

Equipment list
(1) Quad NAND gate 7400 (installed on breadboard) (1) 25 kS potentiometer (2) Resistor 1kS (2) Resistor 200S (2) LEDs (1) Voltage regulator +5 volts, 7805 (installed on breadboard) (1) Capacitor 1 :F Breadboards and pack of wires 9 V battery with clips, tinned leads DMM Voltmeter (at least 9 volts DC full scale) Banana leads & alligator clips

9. Build an XOR gate

The circuit shown below uses four NAND gates to make an XOR gate. Wire this circuit, and test its truth table. Include in the truth table the intermediate results.

An electronic latch circuit is a simple memory circuit. A momentary pulse on the set or S input sets the output Q to high and the other output to low. The circuit stays in this state until a pulse on the reset, R pulse is received. Then Q goes low and goes high. Build this circuit, and use two LEDs to monitor both Q and . Note the output is not defined if R and S are both low.

10. Build an RS Latch

Physics 261H, 251

Digital Logic Page 5

Figure 14 A pictorial view of the circuit in Fig. (3)