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Soft-Switching Converter With HF Transformer for Grid-Connected Photovoltaic Systems


Mario Cacciato, Member, IEEE, Alo Consoli, Fellow, IEEE, Rosario Attanasio, and Francesco Gennaro
AbstractIn this paper, the design, realization, and performance evaluation of a single-phase 3-kW dc/ac power converter, using an active-bridge dc/dc converter and a full-bridge dc/ac, are introduced, presenting a novel solution on the industrial scenario for the considered application. Control algorithms, including the maximum power point tracking, paralleling to the grid, and converter switching signals, are digitally implemented on a standard microcontroller. Index TermsDistributed generation systems, phase-shift modulation, photovoltaic (PV) power systems, synchronous phase-locked loop (PLL).

A prototype has been realized, and a fully digital control algorithm, including power management for grid-connected operations and maximum power point tracking (MPPT) algorithm, is implemented on a dedicated control board, equipped with last-generation 32-b microprocessor. II. S TATE OF THE A RT OF C OMMERCIAL PV C ONVERTERS In addition to a PV generator, a typical PV grid-connected system installation for residential and small commercial applications includes a dc/ac converter, and a battery pack in the case of stand-alone operation is also required. Off-theshelf dc/ac converters, in the power range of 15 kW, can be classied according to the following factors: the number of power processing stages, the use of galvanic isolation either with a high-frequency (HF) or low-frequency (LF) transformer, and the choice of decoupling stage placement between the inverter and energy source [3], [4]. During the last two decades, the topology choice of the inverter manufacturer has been based on a single-stage fullbridge (FB) inverter, connected to a centralized PV generator characterized by series and parallel connection of several PV modules. Although this is one of the simplest ways to interface a PV array to the grid, problems caused by partial shading and possible mismatch between module and cell characteristics have pushed the inverter manufactures and researchers to study alternative topologies. Nowadays, string or multistring congurations of PV modules and dual-stage dc/ac topologies are known as an efcient solution for both power conversion and energy management. In fact, module operations are optimized under different conditions, ensuring maximum energy yield. As a consequence, system efciency has been improved from 85%90% of earlier products to nearly 95% of the most recent ones. Presently, some companies claim 98% efciency for their inverters, obtained with transformerless topologies. Moreover, not only are transformers responsible for 3%5% of total losses but they also negatively account for weight, cost, and component number. However, by providing the galvanic isolation required by some countries standards, HF transformers are often used in modern designs, being a good compromise in terms of cost, efciency, and safety constraints. System modularity is another desired feature, characterizing new inverters. As installation data show that 23-kW inverters dominate the market, new modules are generally designed above 2-kW output power. Recently, some companies have also introduced a masterslave concept between modules in order to optimize system efciency even under low-radiation-level operation.

I. I NTRODUCTION

VER THE last few years, the interest in photovoltaic (PV) applications has grown exponentially. By the end of 2006, the total installed capacity of PV systems around the world had reached more than 6500-MWp power. Compared to the 1200 MWp globally installed at the end of 2000, a growth at an average annual rate of more than 35% has been seen. As PV systems need an interface based on power electronic converters to be connected with the grid or single load, the PV market has become appealing for many power electronics manufacturers [1]. In fact, a PV generator exhibits nonlinear voltagecurrent characteristics, and its maximum power point varies with solar radiation and temperature. In order to suitably connect the PV generator to the grid, single or multistage inverters are used, addressing many specications as high efciency and large input voltage range. Recent studies on the PV technical and economic targets report that, in order to meet the goal of reducing the energy cost for PV systems to $0.06/kWh by 2020, the PV inverter prices will need to decline to $0.250.30/Wp by 2020 [2]. Improvements in design, technology, and manufacturing of PV inverters are needed to achieve price and performance targets. This paper aims to outline the development and evaluation of a converter architecture which is new for PV applications with the aim of achieving signicant reduction of production costs and high efciency. Other peculiar characteristics of the proposed converter are integration level, galvanic isolation, and wide input voltage range.

Manuscript received January 13, 2009; revised September 2, 2009. First published September 22, 2009; current version published April 14, 2010. M. Cacciato and A. Consoli are with the Department of Electrical, Electronic and System Engineering, University of Catania, 95125 Catania, Italy (e-mail: mcacciato@diees.unict.it; aconsoli@diees.unict.it). R. Attanasio and F. Gennaro are with STMicroelectronics, 95100 Catania, Italy (e-mail: rosario.attanasio@st.com; francesco.gennaro@st.com). Color versions of one or more of the gures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identier 10.1109/TIE.2009.2032201

0278-0046/$26.00 2010 IEEE

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Fig. 1.

Converter scheme.

It has to be considered that proper integration of the converter system in the specic environment of the selected application can only be ensured by control. Control actions must allow interface and communication of the PV converter with the power grid and the user. They also must comply with modularity, reliability, and compatibility demands. Therefore, the control scheme of an efcient PV converter has to include an MPPT algorithm that is responsible for setting the PV eld bias point in order to extract the maximum energy in all irradiation conditions; a grid synchronization control (GSC) algorithm that is responsible for the initialization of the system, grid angle estimation, and anti-islanding monitoring; and a power management control (PMC) algorithm that is responsible for the current injection into the grid. While performing all such tasks, the converter system proposed in this paper will introduce some new aspects that will be detailed in the following. DSP microcontrollers are widely used to perform all control actions, owing to their good performance with complex mathematical operations and multiple pulsewidth modulation (PWM) outputs for drive signal generation. Over the last few years, many different inverter topologies have been designed and their performance investigated for grid connection in the power range of 15 kW. Among non-isolated congurations, the cascade connection of a buck, boost, or buckboost converter and an FB or half-bridge (HB) inverter seems to be very common, while the cascade connection of a current source FB dc/dc converter and an FB or HB inverter is often used when galvanic isolation and high conversion ratios are required [5]. In both cases, decoupling capacitors for LF voltage ripple can be placed either on the low- or highvoltage side. HF link topologies are also suitable for this application [6] but are not largely employed due to control issues and considerable component count. Moreover, decoupling capacitors can only be placed on the low-voltage side. Another class of converters, whose performance evaluation has been recently started by manufacturers, is represented by zero-voltage-transition phase-shift converters. Among those, the FB phase-shift converter is already used in telecom and server applications, where high power density and high efciency are mandatory. Active bridges, rst introduced in [7], also exploit the phase-shift concept in order to achieve zero-voltage switching (ZVS) for the power devices [8][10].

III. P ROPOSED C ONVERTER The scheme of the proposed converter is shown in Fig. 1. It is composed of an input bridge (M 1M 4) connected to an active bridge through an HF transformer, and an FB inverter used to generate a controlled 230-Vrms 50-Hz sinusoidal voltage. The active bridge, connected to the secondary of the transformer, is used to achieve ZVS operation for both input and output devices of the dc/dc converter (Fig. 2). Moreover, the current stress on the secondary-side switches is reduced. The transformer provides galvanic isolation between the PV array and the ac output voltage, improving the overall safety of the system. The leakage inductance of the transformer, which is typically considered an unintended parasitic component with a negative impact on the power converter, is used in such a topology as a power transfer element, thus eliminating the device overvoltage and the need of snubber circuits. Proper phase-shift control between the input bridge legs and the output bridge legs allows one to shape the transformer current, thus achieving ZVS for all the power devices and voltage step-up from a minimum input of 150 V to a regulated 450-V dc. The operating principle of the converter is based on the phase shift between the secondary leg (devices M 6 and M 7) and the rst leg of the input bridge (devices M 1 and M 4). The input and rectier bridges generate two square waveforms, respectively, across the primary and secondary windings of the transformer, shifted by the angle . The effect of the primary voltage V trasfprim and secondary voltage reected to the primary V trasfsec is to shape the inductance current according to the ratio (V trasfprim /V trasfsec ) [11]. Due to symmetry during the two halves of the switching period, the current expression can be written as iLlk () = 1 s Llk iLlk () = Vdc + Vbus n 0

2 Vbus + Vdc Vbus n n , 2s Llk Vdc Vbus n ( )

(1)

1 s Llk +

2Vdc + Vbus Vdc n , 2s Llk

(2)

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Fig. 2. DC/DC converter main waveforms.

and the power transferred to the output is Pav =


2 Vdc d 1 s Llk

all the power devices of the dc/dc converter, the following equations must be satised: (3) iLlk (0) = 2 Vbus + Vdc Vbus n n <0 2s Llk 2Vdc + Vbus Vdc n <0 iLlk () = 2s Llk (4) (5)

where Llk is the leakage inductance, Vdc is the input voltage, Vbus is the dc-link voltage, s = 2 fs , is the phase-shift angle, and d = ((Vbus /n)/Vdc ). In order to achieve ZVS for

which means that d < 1/(1 2(/)) and d > 1 2(/).

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Fig. 3. d versus input voltage for different n values.

Fig. 5. Output power versus phase angle. TABLE I C ONVERTER C HARACTERISTICS

Fig. 4.

Output power versus input voltage and phase angle.

Fig. 3 shows the variation of the ratio d between V trasfprim and V trasfsec for different values of the turn ratio n. Assuming a 450-V dc bus voltage and n = 1.5, it results to 0.5 d 1.9. Once the transformer turn ratio has been selected, the phase-shift angle can be calculated in order to obtain the desired output power for each value of the input voltage and leakage inductance. As an example, xing the leakage inductance, the output power can be calculated as a function of the phase angle and input voltage, as shown in Fig. 4. In Fig. 5, the output power variations with respect to phase angle and ZVS operation limits (red line) are shown for two values of input voltage. At 150-V input, soft-switching operation is obtained for phase-shift values greater than 30 . Independently from the output power transfer, the HF transformer leakage inductance also determines the peak current value through the power devices. The design parameters of the converter are listed in Table I. The dc/dc converter switching frequency was set at 35 kHz to take into account the limited range of ZVS operation with input voltage levels different than 300 V. In those operating conditions, higher switching frequencies would cause unwanted additional losses due to hard switching. In other words, the chosen switching frequency is a compromise to obtain good efciency in all conditions.

As a result of power loss calculation and voltage and current ratings, 47-A 650-V power MosFET devices are selected for the dc/dc converter featuring 60-m RdsON and 30-A 600-V insulated-gate bipolar transistors (IGBTs) for the dc/ac stage implementation. Each device in the dc/dc stage is connected in parallel to a fast soft recovery diode. The choice of such a MosFET featuring low RdsON and gate charge, as well as diode characteristics, is a critical aspect for those applications where high efciency is demanded. IV. D IGITAL C ONTROL Control issues have been deeply investigated, and the possibility of implementing the algorithm using a standard

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Fig. 6. Block diagram of the implemented control algorithm.

microcontroller is veried. The control board is equipped with a microprocessor based on a 32-b CORTEX-M3 core with suitable peripherals. The core, running at 72 MHz, is able to perform up to 90 million instructions per second. A highperformance CPU, based on Harward architecture, plus suitable peripherals such as advanced PWM, fast and accurate A/D conversions [12 bit with double sample and hold (S&H) circuit], and high-resolution timers, allows one to implement sophisticated control algorithm. All PWMs are generated with proper dead time, settable by software with some nanoseconds of resolution. As shown in Fig. 6, the three main control issues regarding a PV converter, namely, the MPPT, the GSC, and the PMC, have been included within the system. PMC is based on the control of the active and reactive power in d, q axis [12][16], while the implemented MPPT algorithm is an optimized version of the perturb and observe method [17][19]. The inverter current is transformed, using Park equations, in the two components referred to the rotating dq reference frame of the grid voltage. The two components Id and Iq are proportional to the active and reactive generated powers, respectively, and then, two synchronous proportionalintegral (PI) regulators have been used. The reference current value of d axis Id is calculated in order to regulate the voltage of the dc bus Vbus . The reactive power is maintained at zero through Iq , as only the injection of active power into the mains is allowed, according to the European standards. PI outputs are transformed back into ac quantities, using the inverse Park transformation, providing the signals for inverter modulation. The implemented equations are: Vd Vq V V = V Sin(e ) + V Cos(e ) = V Cos(e ) V Sin(e ) = Vd Cos(e ) Vq Sin(e ) = Vd Sin(e ) + Vq Cos(e )

Fig. 7.

PLL structure.

(6) (7)

where e is the grid angle estimated by the phase-locked loop (PLL).

The most critical task of the PMC is the estimation of the grid angle. To this aim, a PLL in a DQ reference frame (DQ-PLL) has been used instead of a standard PLL approach (e.g., zero crossing method). The main features of a DQ-PLL are wider bandwidth, lower noise sensitivity, and higher accuracy compared with the standard PLL. The implementation of the DQ-PLL algorithm in the present converter system has been noticeably improved from its original proposal in [20], as all the required software and hardware operations regarding the PLL have been performed with the same microcontroller of the main digital control. This is clearly outlined in the block scheme representing the PLL structure shown in Fig. 7. The phase-shift modulation for the dc/dc stage has also been implemented in the digital control loop. The adopted microcontroller allows a high-resolution phase shift (13.8 ns), owing to 16-b timers, with a consequent large regulation range of . The PWM embedded peripheral has been congured in order to generate a triangular carrier at 16 kHz with a resolution of 16.6 ns and programmable dead-time insertion to avoid crossconduction on the dc/ac stage. For the sake of security, the complementary pairs have to be disabled synchronously in the case of power stage failure/fault (e.g., overcurrent), and this is performed by a dedicated emergency stop input embedded in the peripheral. In the case of an overcurrent or overvoltage event, the dc/dc converter modulation is rst disabled by the control algorithm.

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Then, the dc/ac modulation is disabled, and the interface relays are disconnected, preventing any power ow from the system to the grid. After that, the control algorithm performs some checks on the input and bus dc voltage values and on the grid voltage and frequency values. If the sensed voltages are in the allowable range (150400-V input, 370450-V bus dc, 230 Vrms +/10%, and 49.750.3-Hz grid voltage), the dc/dc converter is operated in burst mode in order to charge the bus dc voltage at the minimum reference voltage level. The dc bus voltage may never exceed 450 V and must never decrease below the peak grid voltage plus the drop across the IGBTs and LCL lter. The minimum dc-bus voltage is set according to Vbus ref _ min = 2 Vgrid_ max + Pdc Zc Vgrid_ max (8)

TABLE II C ONTROL B LOCK T IMING E XECUTION

where Pdc is the average power on the dc bus, Vgrid_ max is the maximum rms value of the grid voltage, and Zc is the output LCL lter impedance. Once the system is connected to the grid, the MPPT algorithm is started to track the maximum available power. The LCL lter is designed to reduce high-order harmonics on the grid side [21]. The inductor value on the converter side is chosen to obtain 10% current ripple according to Li = Vgrid_pk iL fsw 1 ma 4 (9)

where Vgrid_pk is the grid peak voltage, iL is the desired current ripple, ma = Vgrid_pk /Vbus is the modulation index, and fsw is the inverter switching frequency. The selection of the coupling reactor Lg is chosen in order to achieve a further 20% reduction of the converter side current ripple. The selection of the lter capacitor must result in a resonant frequency of the LCL lter in the range between ten times the line frequency and one half the switching frequency to avoid stability problems caused by variations of the grid impedance. A small damping resistor connected in series with the capacitor is also added to improve control stability. The entire control loop has been synchronized with the AD conversions triggered by the ON states of the two PWMs. This brings benets, in terms of accuracy, avoiding the acquisition of analog quantities (e.g., currents) during the commutations of the power devices. The timing execution of the most relevant tasks is reported in Table II. The entire control loop is executed in less than 27 s (40% CPU load) with a sampling time of 64 s. Further code can be executed, in the remaining 60%, allowing the implementation of some humanmachine interface (HMI) such as liquid crystal display driving or graphical user interface via serial peripheral interface in order to have a complete smart platform. V. E XPERIMENTAL R ESULTS The prototype was built on a double-layer 70-m printed circuit board, shown in Fig. 8.

Fig. 8. Photograph of the converter prototype.

Electrolytic capacitors are used on the input side, in parallel with 0.1-F polypropylene capacitors, to lter the dc input, which is of relevant importance for correct MPPT operation [22]. A bank of four 330-F 500-V electrolytic capacitors, which are series and parallel connected, is placed on the inverter bus to lter the 100-Hz ripple. The input bridge, consisting of four MosFETs, is connected to the HF transformer realized with an E70 core with N27 ferrite grade. Its proper design allows us to achieve the desired value of leakage inductance without using any additional inductor. The secondary winding is connected to the phaseshifted bridge realized using four additional MosFETs with the same part number of those of the input bridge. The main experimental results are shown in Figs. 916. Fig. 9 shows the driving signals of M 1 and M 6, together with the HF transformer current and the M 1 drain current under ZVS operation. The commutation of the device M 1 can be observed in Fig. 10, where the control signal is shown together with the drain source voltage and drain current at 200-V input voltage and 5-A input current. Fig. 11 shows the angle estimation of the DQ-PLL and the grid voltage, while Fig. 12 shows the inverter output current resulting from the selection of a sawtooth Id reference. Inverter output voltage and current are shown in Figs. 13 and 14, respectively, in the stand-alone and grid-connected operations.

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Fig. 9. (ch1, ch2) Phase shift and control signals, (ch3) transformer input current, and (ch4) primary current.

Fig. 12.

Inverter output current with Id sawtooth reference.

Fig. 10. ZVS primary switch operation.

Fig. 13. Inverter output (ch2) voltage and (ch4) current in the stand-alone operation.

Fig. 11. DQ-PLL: Grid voltage angle estimation.

The proposed converter performs a power factor value equal to 0.993 and current total harmonic distortion percent equal to 3.7% at 2500-W output power. As for the performance of the whole dc/ac converter system, it should be observed that, while a constant bus voltage has been considered during the analysis of the dc/dc stage, a ripple at the frequency double than the grids one is expected on the dc bus voltage. Considering a

Fig. 14. (ch2) Inverter LC lter output voltage, (ch3) grid voltage, (ch4) inverter current, and (f2) output instantaneous power waveforms in the grid-connected operation.

bus dc voltage of 450 V and a capacitor rms ripple current of about 5 A, the resulting ripple voltage at 100 Hz, with a 4 470-F capacitor bank, is about 12.5 V. Dividing such a value by the transformer turn ratio, the effect on the primary reected voltage is a ripple of 8.3 V. As a consequence, the

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R EFERENCES
[1] Review of PV inverter technology cost and performance projections, Nat. Renewable Lab. Energy, Golden, CO, NREL Report SR-620-38771, 2006. [2] The 4th Edition of Solar GenerationA Publication in Cooperation Between European Photovoltaic Industry Association and Greenpeace, Sep. 2007. [3] S. Kjaer, J. Pedersen, and F. Blaabjerg, A review of single phase grid connected inverters for photovoltaic modules, IEEE Trans. Ind. Appl., vol. 41, no. 5, pp. 12921306, Sep/Oct. 2005. [4] R. H. Bonn, Developing a next generation PV inverter, in Proc. 29th IEEE Photovoltaic Spec. Conf., May 1924, 2002, pp. 13521355. [5] L. Palma, M. H. Todorovic, and P. Enjeti, A high gain transformer-less DCDC converter for fuel-cell applications, in Proc. 36th IEEE Power Electron. Spec. Conf., Sep. 1114, 2005, pp. 25142520. [6] P. T. Krein and R. S Balog, High-frequency link inverter for fuel cells based on multiple-carrier PWM, IEEE Trans. Power Electron., vol. 19, no. 4, pp. 12791288, Sep. 2004. [7] M. N. Kheraluwala, R. W. Gascoigne, D. M. Divan, and E. D. Baumann, Performance characterization of a high-power dual active bridge DC-toDC converter, IEEE Trans. Ind. Appl., vol. 28, no. 6, pp. 12941301, Nov./Dec. 1992. [8] J. M. Zhang, X. G. Xie, X. K. Wu, and Z. Qian, Comparison study of phase-shifted full bridge ZVS converters, in Proc. 35th IEEE PESC, Jun. 2025, 2004, vol. 1, pp. 533539. [9] F. Krismer, S. Round, and J. W. Kolar, Performance optimization of a high current dual active bridge with a wide operating voltage range, in Proc. 37th IEEE PESC, Jun. 1822, 2006, pp. 17. [10] H. Tao, A. Kotsopoulos, J. L. Duarte, and M. A. M. Hendrix, Transformer-coupled multiport ZVS bidirectional DCDC converter with wide input range, IEEE Trans. Power Electron., vol. 23, no. 2, pp. 771781, Mar. 2008. [11] R. W. A. A. De Doncker, D. M. Divan, and M. H. Kheraluwala, A three-phase soft-switched high-power-density DC/DC converter for highpower applications, IEEE Trans. Ind. Appl., vol. 27, no. 1, pp. 6373, Jan./Feb. 1991. [12] W. Libo, Z. Zhengming, and L. Jianzheng, A single-stage three-phase grid-connected photovoltaic system with modied MPPT method and reactive power compensation, IEEE Trans. Energy Convers., vol. 22, no. 4, pp. 881886, Dec. 2007. [13] E. Roman, R. Alonso, P. Ibanez, S. Elorduizapatarietxe, and D. Goitia, Intelligent PV module for grid-connected PV systems, IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 10661073, Jun. 2006. [14] J. M. Kwon, K. H. Nam, and B. H. Kwon, Photovoltaic power conditioning system with line connection, IEEE Trans. Ind. Electron., vol. 53, no. 4, pp. 10481054, Jun. 2006. [15] F. Blaabjerg, R. Teodorescu, M. Liserre, and A. V. Timbus, Overview of control and grid synchronization for distributed power generation systems, IEEE Trans. Ind. Electron., vol. 53, no. 5, pp. 13981409, Oct. 2006. [16] P. Rodriguez, A. Luna, M. Ciobotaru, R. Teodorescu, and F. Blaabjerg, Advanced grid synchronization system for power converters under unbalanced and distorted operating conditions, in Proc. 32nd IEEE IECON, Nov. 2006, pp. 51735178. [17] N. Femia, G. Petrone, G. Spagnuolo, and M. Vitelli, Optimization of perturb and observe maximum power point tracking method, IEEE Trans. Power Electron., vol. 20, no. 4, pp. 963973, Jul. 2005. [18] D. Sera, R. Teodorescu, J. Hantschel, and M. Knoll, Optimized maximum power point tracker for fast-changing environmental conditions, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 26262637, Jul. 2008. [19] T. Esram and P. L. Chapman, Comparison of photovoltaic array maximum power point tracking techniques, IEEE Trans. Energy Convers., vol. 22, no. 2, pp. 439449, Jun. 2007. [20] L. G. B. Rolim, D. R. da Costa, and M. Aredes, Analysis and software implementation of a robust synchronizing PLL circuit based on the pq theory, IEEE Trans. Ind. Electron., vol. 53, no. 6, pp. 19191926, Dec. 2006. [21] M. Liserre, R. Teoderuscu, and F. Blaabjerg, Stability of photovoltaic and wind turbine grid-connected inverters for a large set of grid impedance values, IEEE Trans. Power Electron., vol. 21, no. 1, pp. 263272, Jan. 2006. [22] N. D. Benavides and P. L. Chapman, Modeling the effect of voltage ripple on the power output of photovoltaic modules, IEEE Trans. Ind. Electron., vol. 55, no. 7, pp. 26382643, Jul. 2008.

Fig. 15. (ch1) Drain current in device M 1, (ch2) inverter LC lter output voltage, (ch3) grid voltage, and (ch4) inverter current waveforms in the gridconnected operation.

Fig. 16. Converter efciency.

parameter d, which has been used to dene the ZVS range, as shown in (4) and (5), is only slightly affected by the bus dc voltage ripple. This is clearly shown in Fig. 15, where the drain current in one of the input bridge MosFETs is drawn together with grid current and voltage. As it is possible to note, the negative peaks of the drain current are almost constant, revealing good soft-switching operation in the full period of the inverter output current. In Fig. 16, the converter efciency is shown at different input voltage values, highlighting the almost at response of the proposed solution in the whole power range. VI. C ONCLUSION In this paper, a new cost effective converter architecture has been proposed for PV applications, addressing high efciency, good integration level, galvanic isolation, exibility toward the source, and reliability. Full evaluation has been carried out on a converter prototype, pointing out some relevant advantages of the proposed solution compared to commercial converters. Simulation and experimental results have conrmed the consistency of the proposed solution for PV generation systems.

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Mario Cacciato (S98M01) received the M.S. degree in electrical engineering (cum laude) from the University of Catania, Catania, Italy, in 1996, and the Ph.D. degree in electronic engineering from the University of Reggio Calabria, Reggio Calabria, Italy, in 2000. In 2000, he joined the Department of Electrical Engineering, University of Rome La Sapienza, Rome, Italy, as an Assistant Professor. Since 2004, he has been with the Department of Electrical, Electronics and System Engineering, University of Catania, where he is currently teaching courses on electrical drives. His main scientic interests include power electronics, control of electric drives, electromagnetic compatibility, renewable energies, and hydrogen applications. He is the author of more than 60 technical papers, published in journals and proceedings of international conferences. He has also participated in several research projects funded by Italian and foreign agencies such as the Ministero dellIstruzione, dellUniversit e della Ricerca, Consiglio Nazionale delle Ricerche, Ente per le Nuove Tecnologie, lEnergia e lAmbiente, and the European Community. Dr. Cacciato is a member of the AEIT, the Italian Electric Association, where he is currently a member of the Scientic Board of the Automation Group.

Rosario Attanasio was born in Catania, Italy, in 1977. He received the M.S. and Ph.D. degrees in electrical engineering from the University of Catania, Catania, in 2003 and 2006, respectively. He is currently a Senior Application Engineer in the Power Systems Group, Industrial and Multisegment Sector, STMicroelectronics, Catania. He is the author of more than ten technical papers published in journals and proceedings of international conferences. He has also participated in research projects funded by Italian and foreign agencies. His major research interests include power electronics converters and control, renewable energies, and electromagnetic compatibility. Dr. Attanasio is a member of the AEIT, the Italian Electric Association.

Alo Consoli (M79SM88F00) was with the R&D Unit, FIAT, Turin, Italy in 19731974. Since 1975, he has been a Professor of electrical machines at the University of Catania, Catania, Italy, teaching in the areas of electrical machines, electrical drives, and power electronics, where he is currently the Head of the Center for Promotion and Transfer of Innovation Technology, which he created in 1999. Since 1980, he has been visiting the U.S. for research and teaching assignments. Since 1987, he has been responsible for the Ph.D. program in electrical engineering and is currently the Coordinator of the Ph.D. program in energy at the Scuola Superiore of Catania, Catania. His research activities include energy conversion systems, electrical drives, robotics, and power electronics, having been performed in the frame of industry cooperation, national, and international research programs. He has authored or coauthored over 300 technical papers and is the holder of four international patents. He is the coauthor and the coeditor of the book Modern Electric Drives (Kluwer, 2000). He is also the author of Electrical Motors within the Italian National Encyclopedia Treccani. Dr. Consoli is a Distinguished Lecturer of the IEEE Industry Applications Society (IAS)/Power Electronics Society (PELS). He is the past President of Converters, Machines, and Electrical Drives, which is the Association of Italian Professors of Power Electronics. He is an Associate Editor of the IEEE T RANSACTIONS ON P OWER E LECTRONICS and a member of the Advisory Committee of the IEEE PELS as the Chairman of the Motor Drives Committee. He is also a member of the Italian Electric Association (AEI) and a member of the Executive Committee and the International Steering Committee of the European Power Electronics Association. Among his international achievements are two IEEE awardsthe best paper published in the IEEE T RANS ACTIONS ON P OWER E LECTRONICS and the best paper presented at the IEEE IAS Annual Meeting.

Francesco Gennaro received the M.S. (cum laude) and Ph.D. degrees in electrical engineering from the University of Catania, Catania, Italy, in 1996 and 2000, respectively. In 1999, he was a Visiting Scholar at the University of Wisconsin, Madison, and a New Product Development Engineer at Soft Switching Technologies Corporation, Madison. After one year as an Associate Researcher in the Department of Electrical and Electronic Engineering, University of Catania, he joined STMicroelectronics, Catania, as a Senior Application Engineer for high-voltage smart power ICs, where he is currently the Power Converters Team Manager in the Systems Lab, Application Laboratory of Industrial and Multisegment Sector, developing system solutions in several application elds, e.g., low-power industrial converters, and photovoltaic and fuel cell systems. He is also involved in funded project technical management and development. He is the author of more than 30 papers on power converters and is the holder of four international patents on power converters.

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