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The thyristor is a four-layered, three terminal semiconducting device, with each layer consisting of alternately N-type or P-type material,

for example P-N-P-N. The main terminals, labelled anode and cathode, are across the full four layers, and the control terminal, called the gate, is attached to p-type material near to the cathode. (A variant called an SCSSilicon Controlled Switchbrings all four layers out to terminals.) The operation of a thyristor can be understood in terms of a pair of tightly coupled bipolar junction transistors, arranged to cause the self-latching action:

Structure on the physical and electronic level, and the thyristor symbol.

Thyristors have three states:


1. Reverse blocking mode Voltage is applied in the direction that would be blocked by a diode 2. Forward blocking mode Voltage is applied in the direction that would cause a diode to conduct, but the thyristor has not yet been triggered into conduction 3. Forward conducting mode The thyristor have been triggered into conduction and will remain conducting until the forward current drops below a threshold value known as the "holding current"

Function of the gate terminal

The thyristor has three p-n junctions (serially named J1, J2, J3 from the anode).

Layer diagram of thyristor.

When the anode is at a positive potential VAK with respect to the cathode with no voltage applied at the gate, junctions J1 and J3 are forward biased, while junction J2 is reverse biased. As J2 is reverse biased, no conduction takes place (Off state). Now if VAK is increased beyond the breakdown voltage VBO of the thyristor, avalanche breakdown of J2 takes place and the thyristor starts conducting (On state). If a positive potential VG is applied at the gate terminal with respect to the cathode, the breakdown of the junction J2 occurs at a lower value of VAK. By selecting an appropriate value of VG, the thyristor can be switched into the on state suddenly. Once avalanche breakdown has occurred, the thyristor continues to conduct, irrespective of the gate voltage, until: (a) the potential VAK is removed or (b) the current through the device (anodecathode) is less than the holding current specified by the manufacturer. Hence VG can be a voltage pulse, such as the voltage output from a UJT relaxation oscillator. These gate pulses are characterized in terms of gate trigger voltage (VGT) and gate trigger current (IGT). Gate trigger current varies inversely with gate pulse width in such a way that it is evident that there is a minimum gate charge required to trigger the thyristor.

Switching characteristics

V - I characteristics.

In a conventional thyristor, once it has been switched on by the gate terminal, the device remains latched in the on-state (i.e. does not need a continuous supply of gate current to conduct), providing the anode current has exceeded the latching current (IL). As long as the anode remains positively biased, it cannot be switched off until the anode current falls below the holding current (IH). A thyristor can be switched off if the external circuit causes the anode to become negatively biased, a method known as natural, or line, commutation. In some applications this is done by switching a second thyristor to discharge a capacitor into the cathode of the first thyristor. This method is called forced commutation. After the current in a thyristor has extinguished, a finite time delay must elapse before the anode can again be positively biased and retain the thyristor in the off-state. This minimum delay is called the circuit commutated turn off time (tQ). Attempting to positively bias the anode within this time causes the thyristor to be self-triggered by the remaining charge carriers (holes and electrons) that have not yet recombined. For applications with frequencies higher than the domestic AC mains supply (e.g. 50 Hz or 60 Hz), thyristors with lower values of tQ are required. Such fast thyristors are made by diffusing into the silicon heavy metals ions such as gold or platinum which act as charge combination centres. Alternatively, fast thyristors may be made by neutron irradiation of the silicon. Modes operation This device is generally used in switching applications. In the normal "off" state, the device restricts current to the leakage current. When the gate-to-cathode voltage exceeds a certain threshold, the device turns "on" and conducts current. The device will remain in the "on" state even after gate current is removed so long as current through the device remains above the holding current. Once current falls below the holding current for an appropriate period of time, the device will switch "off". If the gate is pulsed and the current through the device is below the holding current, the device will remain in the "off" state.

If the applied voltage increases rapidly enough, capacitive coupling may induce enough charge into the gate to trigger the device into the "on" state; this is referred to as "dv/dt triggering." This is usually prevented by limiting the rate of voltage rise across the device, perhaps by using a snubber. "dv/dt triggering" may not switch the SCR into full conduction rapidly, and the partially triggered SCR may dissipate more power than is usual, possibly harming the device. SCRs can also be triggered by increasing the forward voltage beyond their rated breakdown voltage (also called as break over voltage), but again, this does not rapidly switch the entire device into conduction and so may be harmful so this mode of operation is also usually avoided. Also, the actual breakdown voltage may be substantially higher than the rated breakdown voltage, so the exact trigger point will vary from device to device.UJT is commonly used to trigger SCR. Reverse Bias SCR are available with or without reverse blocking capability. Reverse blocking capability adds to the forward voltage drop because of the need to have a long, low doped P1 region. Usually, the reverse blocking voltage rating and forward blocking voltage rating are the same. The typical application for reverse blocking SCR is in current source inverters. SCR incapable of blocking reverse voltage are known as asymmetrical SCR, abbreviated ASCR. They typically have a reverse breakdown rating in the 10's of volts. ASCR are used where either a reverse conducting diode is applied in parallel (for example, in voltage source inverters) or where reverse voltage would never occur . Thyristor turn on methods 1. 2. 3. 4. 5. forward voltage triggering gate triggering dv/dt triggering temperature triggering light triggering

Forward voltage triggering occurs when the anode-cathode forward voltage is increased with the gate circuit opened. This is known as avalanche breakdown, during which junction j2 will breakdown. At sufficient voltages, the thyristor changes to its on state with low voltage drop and large forward current. In this case, J1 and J3 are already forward biased. a) Forward Voltage Triggering: When anode to cathode forward voltage is increased with gate circuit open, the reverse biased junction J2 will break. This is known as avalanche breakdown and the voltage at which avalanche occurs is called forward breakover voltage VB0. At this voltage, thyristor changes from off-state (high voltage with low leakage current) to on-state characterised by low voltage across thyristor with large forward current. As other junctions J 1, J3 are already forward biased, breakdown of junction J2 allows free movement of carriers across three junctions and as a result, large forward anode-current flows. As stated before, this forward

current is limited by the load impedance. In practice, the transition from off-state to on-state obtained by exceeding VB0 is never employed as it may destroy the device. The magnitudes of forward and reverse breakover voltages are nearly the same and both are temperature dependent. In practice, it is found that VBR is slightly more than VB0. Therefore, forward breakover voltage is taken as the final voltage rating of the device during the design of SCR applications. After the avalanche breakdown, junction J2 looses its reverse blocking capability. Therefore, if the anode voltage is reduced below VB0 SCR will continue conduction of the current. The SCR can now be turned off only by reducing the anode current below a certain value called holding current (defined later). (6) Gate Triggering : Turning on of thyristors by gate triggering is simple, reliable and efficient, it is therefore the most usual method of firing the forward biased SCRs. A thyristor with forward breakover voltage (say 800 V) higher than the normal working voltage (say 400 V) is chosen. This means that thyristor will remain in forward blocking state with normal working voltage across anode and cathode and with gate open. However, when turn-on of a thyristor is required, a positive gate voltage between gate and cathode is applied. With gate current thus established, charges are injected into the inner p layer and voltage at which forward breakover occurs is reduced. The forward voltage at which the device switches to on-state depends upon the magnitude of gate current. Higher the gate current, lower is the forward breakover voltage

When positive gate current is applied, gate P layer is flooded with electrons from the cathode. This is because cathode N layer is heavily doped as compared to gate P layer. As the thyristor is forward biased, some of these electrons reach junction J2. As a result, width of depletion layer around junction J2 is reduced. This causes the junction J2 to breakdown at an applied voltage lower than forward breakover voltage VB0. If magnitude of gate current is increased, more electrons will reach junction J2 ,as a consequence thyristor will get turned on at a much lower forward applied voltage.

shows that for gate current Ig = 0, forward breakover voltage is VB0. For Igl , forward breakover voltage, or turn-on voltage is less than VB0 For Ig2 > Ig1 , forward breakover voltage is still further reduced. The effect of gate current on the forward breakover voltage of a thyristor can also be illustrated by means of a curve as shown in Fig. 4.4. For Ig < oa, forward breakover voltage remains almost constant at VB0. For gate currents Ig1 , Ig2 and Ig3 the values of forward breakover voltages are ox, oy and oz, respectively as shown. In the curve marked Ig = 0 is actually for gate current less than oa. In practice, the magnitude of gate current is more than the minimum gate current required to turn on the SCR. Typical gate current magnitudes are of the order of 20 to 200 mA. Once the SCR is conducting a forward current, reverse biased junction J 2 no longer exists. As such, no gate current is required for the device to remain in on-state. Therefore, if the gate current is removed, the conduction of current from anode to cathode remains unaffected. However, if gate current is reduced to zero before the rising anode current attains a value, called the latching current, the thyristor will turn-off again. The gate pulse width should therefore be judiciously chosen to ensure that anode current rises above the latching current. Thus latching current may be defined as the minimum value of anode current which it must attain during turnon process to maintain conduction when gate signal is removed. Once the thyristor is conducting, gate loses control. The thyristor can be turned-off (or the thyristor can be returned to forward blocking state) only if the forward current falls below a lowlevel current called the holding current. Thus holding current may be defined as the minimum value of anode current below which it must fall for turning-off the thyristor. The latching current is higher than the holding current. Note that latching current is associated with turn-on process and holding current with turn-off process. It is usual to take latching current as two to three times the holding current . In industrial applications, holding current (typically 10 mA) is almost taken as zero. (c) dv/dt Triggering : This method is discussed further in separate post. (d) Temperature Triggering : During forward blocking, most of the applied voltage appears across reverse biased junction J2. This voltage across junction J2 associated with leakage current may raise the temperature of this junction. With increase in temperature, leakage current through junction J2 further increases. This cumulative process may turn on the SCR at some high temperature. (e) Light Triggering: For light-triggered SCRs, a recess (or niche) is made in the inner p-layer as shown in Fig. 4.5 (a). When this recess is irradiated, free charge carriers (holes and electrons) are generated just like when gate signal is applied between gate and cathode. The pulse of light of appropriate wavelength is guided by optical fibres for irradiation. If the intensity of this light thrown on the recess exceeds a certain value, forward-biased SCR is turned on. Such a thyristor is known as light-activated SCR (LASCR). LASCR may be triggered with a light source or with a gate signal. Sometimes a combination of both light source and gate signal is used to trigger an SCR. For this, the gate is biased with voltage or current slightly less than that required to turn it on, now a beam of light directed at the

inner p-layer junction turns on the SCR. The light intensity required to turn-on the SCR depends upon the voltage bias given to the gate. Higher the voltage (or current) bias, lower the light intensity required. Light-triggered thyristors have now been used in high-voltage direct current (HVDC) transmission systems. In these several SCRs are connected in series-parallel combination and their light-triggering has the advantage of electrical isolation between power and control circuits. Switching Characteristics during Turn-on A forward-biased thyristor is usually turned on by applying a positive gate voltage between gate and cathode. There is, however, a transition time from forward off-state to forward on state. This transition time called thyristor turn-on time, is defined as the time during which it changes from forward blocking state to final on-state. Total turn-on time can be divided into three intervals ; (i) delay time td , (ii) rise time tr and (iii) spread time tp , Fig. 4.8. (i) Delay time td : The delay time td is measured from the instant at which gate current reaches 0.9 Ig to the instant at which anode current reaches 0.1Ia. Here Ig and Ia are respectively the final values of gate and anode currents. The delay time may also be defined as the time during which anode voltage falls from Va to 0.9Va where Va = initial value of anode voltage. Another way of defining delay time is the time during which anode current rises from forward leakage current to 0.1 Ia where Ia = final value of anode current. With the thyristor initially in the forward blocking state, the anode voltage is OA and anode current is small leakage current as shown in Fig. 4.8. Initiation of turn-on process is indicated by a rise in anode current from small forward leakage current and a fall in anode-cathode voltage from forward blocking voltage OA. As gate current begins to flow from gate to cathode with the application of gate signal, the gate current has nonuniform distribution of current density over the cathode surface due to the p layer. Its value is much higher near the gate but decreases rapidly as the distance from the gate increases, see Fig. 4.6 (a). This shows that during delay time td ,anode current flows in a narrow region near the gate where gate current density is the highest. The delay time can be decreased by applying high gate current and more forward voltage between anode and cathode. The delay time is fraction of a microsecond.

(ii) Rise time tr: The rise time tr is the time taken by the anode current to rise from 0.1 Ia to 0.9 Ia. The rise time is also defined as the time required for the forward blocking off-state voltage to fall from 0.9 to 0.1 of its initial value OA. The rise time is inversely proportional to the magnitude of gate current and its build up rate. Thus tr can be reduced if high and steep current

pulses are applied to the gate. However, the main factor determining tr is the nature of anode circuit. For example, for series RL circuit, the rate of rise of anode current is slow, therefore, t r is more. For RC series circuit, di/dt is high, tr is therefore, less.

From the beginning of rise time tr anode current starts spreading from the narrow conducting region near the gate. The anode current spreads at a rate of about 0.1 mm per microsecond . As the rise time is small, the anode current is not able to spread over the entire cross-section of cathode. Fig. 4.6 (b) illustrates how anode current expands over cathode surface area during turnon process of a thyristor. Here the thyristor is taken to have single gate electrode away from the centre of p-layer. It is seen that anode current conducts over a small conducting channel even after tr -this conducting channel area is however, greater than that during td.During rise time, turn-on losses in the thyristor are the highest due to high anode voltage (Va) and large anode current (Ia) occurring together in the thyristor as shown in Fig. 4.8. As these losses occur only.over a small conducting region, local hot spots may be formed and the device may be damaged. (iii) Spread time tp : The spread time is the time taken by the anode current to rise from 0.9 Ia to Ia. It is also defined as the time for the forward blocking voltage to fall from 0.1 of its value to the on-state voltage drop (1 to 1.5 V). During this time, conduction spreads over the entire crosssection of the cathode of SCR. The spreading interval depends on the area of cathode and on gate structure of the SCR. After the spread time, anode current attains steady state value and the voltage drop across SCR is equal to the on-state voltage drop of the order of 1 to 1.5 V, Fig. 4.8. Total turn-on time of an SCR is equal to the sum of delay time, rise time and spread time. Thyristor manufacturers usually specify the rise time which is typically of the order of 1 to 4 sec. Total turn-on time depends upon the anode circuit parameters and the gate signal waveshapes. During turn-on, SCR may be considered to be a charge controlled device. A certain amount of charge must be injected into the gate region for the thyristor conduction to begin. This charge is directly proportional to the value of gate current. Therefore, higher the magnitude of gate current, the lesser time it takes to inject this charge. The turn-on time can therefore be reduced by

using higher values of gate currents. The magnitude of gate current is usually 3 to 5 times the minimum gate current required to trigger an SCR. When gate current is several times higher than the minimum gate current required, a thyristor is said to be hard-fired or overdriven. Hard-firing or overdriving of a thyristor reduces its turn-on time and enhances it di/dt capability. A typical waveform for gate current, that is widely used, is shown in Fig. 4.7. This waveform has higher initial value of gate current with a very fast rise time. The initial high value of gate current is then reduced to a lower value where it stays for several microseconds in order to avoid unwanted turn-off of the device. Switching Characteristics during Turn-off Thyristor turn-off means that it has changed from on to off state and is capable of blocking the forward voltage. This dynamic process of the SCR from conduction state to forward blocking state is called commutation process or turn-off process. Once the thyristor is on, gate loses control. The SCR can be turned off by reducing the anode current below holding current . If forward voltage is applied to the SCR at the moment its anode current falls to zero, the device will not be able to block this forward voltage as the carriers (holes and electrons) in the four layers are still favourable for conduction. The device will therefore go into conduction immediately even though gate signal is not applied. In order to obviate such an occurrence, it is essential that the thyristor is reverse biased for a finite period after the anode current has reached zero. The turn-off time tq of a thyristor is defined as the time between the instant anode current becomes zero and the instant SCR regains forward blocking capability. During time t q ,all the excess carriers from the four layers of SCR must be removed. This removal of excess carriers consists of sweeping out of holes from outer p-layer and electrons from outer n-layer. The carriers around junction J2 can be removed only by recombination. The turn-off time is divided into two intervals ; reverse recovery time trr and the gate recovery time tg r ; i.e. tq = trr + tgr.

Fig. 4.8. Thyristor voltage and current waveforms during turn-on and turn-off processes.. The thyristor characteristics during turn-on and turn-off processes are shown in one Fig. 4.8 so as to gain insight into these processes. At instant t l ,anode current becomes zero. After t l anode current builds up in the reverse direction with the same di/dt slope as before t l The reason for the reversal of anode current after t l is due to the presence of carriers stored in the four layers. The reverse recovery current removes excess carriers from the end junctions J1 and J3 between the instants t l and t 3. In other words, reverse recovery current flows due to the sweeping out of holes from top p-layer and electrons from bottom n-layer. At instant t 2, when about 60% of the stored charges are removed from the outer two layers, carrier density across J1 and J3 begins to decrease and with this reverse recovery current also starts decaying. The reverse current decay is fast in the beginning but gradual thereafter. The fast decay of recovery current causes a reverse voltage across the device due to the circuit inductance. This reverse voltage surge appears across the thyristor terminals and may therefore damage it. In practice, this is avoided by using protective RC elements across SCR. At instant t3 , when reverse recovery current has fallen to nearly zero value, end junctions J1 and J3 recover and SCR is able to block the reverse voltage. For a thyristor, reverse recovery phenomenon between t1 and t3 is similar to that of a rectifier diode. At the end of reverse recovery period (t3 -the middle junction J2 still has trapped charges, therefore, the thyristor is not able to block the forward voltage at t3 The trapped charges around J2, i.e. in the inner two layers, cannot flow to the external circuit, therefore, these trapped charges must decay only by recombination. This recombination is possible if a reverse voltage is maintained across SCR, though the magnitude of this voltage is not important. The rate of recombination of charges is independent of the external circuit parameters. The time for the recombination of charges between t3 and t4 is called gate recovery time tgr At instant t 4, junction J2 recovers and the forward voltage can be reapplied between anode and cathode. The thyristor turn-off time tq is in the range of 3 to 100 sec. The turn-off time is influenced by the magnitude of forward current, di/dt at the time of commutation and junction temperature. An increase in the

magnitude of these factors increases the thyristor turn-off time. If the value of forward current before commutation is high, trapped charges around junction J2 are more. The time required for their recombination is more and therefore turn-off time is increased. But turn-off time decreases with an increase in the magnitude of reverse voltage, particularly in the range of 0 to 50 V. This is because high reverse voltage sucks out the carriers out of the junctions J l , J3 and the adjacent transition regions at a faster rate. It is evident from above that turn-off time tq is not a constant parameter of a thyristor. The thyristor turn-off time tq is applicable to an individual SCR. In actual practice, thyristor (or thyristors) form a part of the power circuit. The turn-off time provided to the thyristor by the practical circuit is called circuit turn-off time tc. It is defined as the time between the instant anode current becomes zero and the instant reverse voltage due to practical circuit reaches zero, see Fig. 4.8. Time tc must be greater than tq for reliable turn-off, otherwise the device may turnon at an undesired instant, a process called commutation failure. Thyristors with slow turn-off time (50 100 (usee) are called converter grade SCRs and those with fast turn-off time (3 50 sec) are called inverter-grade SCRs. Converter-grade SCRs are cheaper and are used where slow turn-off is possible as in phase-controlled rectifiers, ac voltage controllers, cycloconverters etc. Inverter-grade SCRs are costlier and are used in inverters, choppers and force-commutated converters.

TWO-TRANSISTOR MODEL OF A THYRISTOR


The principle of thyristor operation can be explained with the use of its two-transistor model (or two-transistor analogy). Fig. 4.15 (a) shows schematic diagram of a thyristor. From this figure, two-transistor model is obtained by bisecting the two middle layers, along the dotted line, in two separate halves as shown in Fig. 4.15 (b). In this figure, junctions J1 J2 and J2 -J3 can be considered to constitute pnp and npn transistors separately. The circuit representation of the twotransistor model of a thyristor is shown in Fig. 4.15 (c).

In the off-state of a transistor, collector current Ic is related to emitter current IE as IC = IE + ICBO where is the common-base current gain and ICB0 is the common-base leakage current of collector-base junction of a transistor.

For transistor Q1 in Fig. 4.15 (c), emitter current IE = anode current Ia and IC = collector current IC1. Therefore, for Q1 IC1 = 1 Ia + ICBO1 ..(4.3) where and 1 = common-base current gain of Q1 ICBO1 = common-base leakage current of Q1

Similarly, for transistor Q2, the collector current IC2 is given by IC2 = 2 Ik + ICBO2 (4.4) where 2 common-base current gain of Q2,ICBO2 =common-base leakage current of Q2 and

Ik = emitter current of Q2. The sum of two collector currents given by Eqs. (4.3) and (4.4) is equal to the external circuit current I entering at anode terminal A. There fore Ia = IC1 + IC2 Ia = 1 Ia + ICBO1+ 2 Ik + ICBO2 (4.5) When gate current is applied, then Ik = Ia + Ig . Substituting this value of Ik in Eq. (4.5) gives Ia = 1 Ia + ICBO1+ 2 (Ia + Ig ) + ICBO2
or

Ia = 2 Ig + ICBO1 + ICBO2 /[1-( 1+ 2)]

Design of Snubber Circuits for Thyristor Protection A snubber circuit consists of a series combination of resistance Rs and capacitance Cs in parallel with the thyristor as shown in Fig. 4.25. Strictly speaking, a capacitor Cs in parallel with the device is sufficient to prevent unwanted dv/dt triggering of the SCR. When switch S is closed, a sudden voltage appears across the circuit. Capacitor Cs behaves like a short circuit, therefore voltage across SCR is zero. With the passage of time, voltage across C s builds up at a slow rate such that dv/dt across Cs and therefore across SCR is less than the specified maximum dv/dt rating of the device. Here the question arises that if Cs is enough to prevent accidental turn-on of the device by dv/dt, what is the need of putting Rs in series with Cs ? The answer to this is as under. Before SCR is fired by gate pulse, Cs charges to full voltage Vs. When the SCR is turned on, capacitor discharges through the SCR and sends a current equal to Vs / (resistance of local path formed by Cs and SCR). As this resistance is quite low, the turn-on di/dt will tend to be excessive and as a result, SCR may be destroyed. In order to limit the magnitude of discharge current, a resistance Rs is inserted in series with Cs as shown in Fig. 4.25. Now when SCR is turned on, initial discharge current Vs/Rs is relatively small and turn-on di/dt is reduced.

In actual practice ; Rs, Cs and the load circuit parameters should be such that dv/dt across Cs during its charging is less than the specified dv/dt rating of the SCR and discharge current at the turn-on of SCR is within reasonable limits. Normally, Rs Cs and load circuit parameters form an underdamped circuit so that dv/dt is limited to acceptable values. The design of snubber circuit parameters is quite complex.. In practice, designed snubber parameters are adjusted up or down in the final assembled power circuit so as to obtain a satisfactory performance of the power electronics system.

Triac-Its construction and Operation


The triac is another three-terminal ac switch that is triggered into conduction when a low-energy signal is applied to its gate terminal. Unlike the SCR, the triac conducts in either direction when turned on. The triac also differs from the SCR in that either a positive or negative gate signal triggers it into conduction. Thus the triac is a three terminal, four layer bidirectional semiconductor device that controls ac power whereas an SCR controls dc power or forward biased half cycles of ac in a load. Because of its bidirectional conduction property, the triac is widely used in the field of power electronics for control purposes. Triacs of 16 kW rating are readily available in the market. Triac is an abbreviation for three terminal ac switch. Tri-indicates that the device has three terminals and ac indicates that the device controls alternating current or can conduct in either direction.

Triac Circuit Symbol


Construction of a Triac

As mentioned above, triac is a three terminal, four layer bilateral semiconductor device. It incorporates two SCRs connected in inverse parallel with a common gate terminal in a single chip device. The arrangement of the triac is shown in figure. As seen, it has six doped regions. The gate terminal G makes ohmic contacts with both the N and P materials. This permits trigger pulse of either polarity to start conduction. Electrical equivalent circuit and schematic symbol are shown in figure.b and figure.c respectively. Since the triac is a bilateral device, the term anode and cathode has no meaning, and therefore, terminals are designated as main terminal 1. (MT1), main terminal 2 (MT2) and gate G. To avoid confusion, it has become common practice to specify all voltages and currents using MT1 as the reference.

Triac Basic Structure


Operation and Working of a Triac

Though the triac can be turned on without any gate current provided the supply voltage becomes equal to the breakover voltage of the triac but the normal way to turn on the triac is by applying a proper gate current. As in case of SCR, here too, the larger the gate current, the smaller the supply voltage at which the triac is turned on. Triac can conduct current irrespective of the voltage polarity of terminals MT1 and MT2 with respect to each other and that of gate and terminal MT2. Consequently four different possibilities of operation of triac exists. They are:
1. Terminal

MT2 and gate are positive with respect to terminal MT1

When terminal MT2 is positive with respect to terminal MT1 current flows through path P1-N1P2-N2. The two junctions P1-N1 and P2-N2 are forward biased whereas junction N1 P2 is blocked. The triac is now said to be positively biased. A positive gate with respect to terminal MT1 forward biases the junction P2-N2 and the breakdown occurs as in a normal SCR. 2. Terminal MT2 is positive but gate is negative with respect to terminal MT1 Though the flow path of current remains the same as in mode 1 but now junction P2-N3 is forward biased and current carriers injected into P2 turn on the triac. 3.Terminal MT2 and gate are negative with respect to terminal MT1 When terminal MT2 is negative with respect to terminal MT1, the current flow path is P2-N1-P1N4. The two junctions P2-N1 and P1 - N4 are forward biased whereas junction N1-P1 is blocked. The triac is now said to be negatively biased. A negative gate with respect to terminal MT1 injects current carriers by forward biasing junction P2-N3 and thus initiates the conduction.

4. Terminal MT2 is negative but gate is positive with respect to terminal MT1 Though the flow path of current remains the same as in mode 3 but now junction P 2-N2 is forward biased, current carriers are injected and therefore, the triac is turned on. Generally, trigger mode 4 should be avoided especially in circuits where high di/dt may occur. The sensitivity of triggering modes 2 and 3 is high and in case of marginal triggering capability negative gate pulses should be used. Though the triggering mode 1 is more sensitive compared to modes 2 and 3, it requires a positive gate trigger. However, for bidirectional control and uniform gate trigger modes 2 and 3 are preferred. Characteristics of Triac

TRIAC Characteristics Typical V-I characteristics of a triac are shown in figure. The triac has on and off state characteristics similar to SCR but now the char acteristic is applicable to both positive and negative voltages. This is expected because triac consists of two SCRs connected in parallel but opposite in direc tions. MT2 is positive with respect to MTX in the first quadrant and it is negative in the third quad rant. As already said in previous blog posts, the gate triggering may occur in any of the following four modes. Quadrant I operation Quadrant II operation : : VMT2, positive; VG1 positive VMT21 positive; VGl negative VMT21 negative; VGl negative VMT21 negative; VG1 positive

Quadrant III operation : Quadrant IV operation :

where VMT21 and VGl are the voltages of terminal MT2 and gate with respect to terminal MT1. The device, when starts conduction permits a very heavy amount of current to flow through it. This large inrush of current must be restricted by employing external resist ance, otherwise the device may get damaged. The gate is the control terminal of the device. By applying proper signal to the gate, the firing angle of the device can be controlled. The circuits used in the gate for triggering the device are called the gate-triggering circuits. The gate-triggering circuits for the triac are almost same like those used for SCRs. These triggering circuits usually generate trigger pulses for firing the device. The trigger pulse should be of sufficient magnitude and duration so that firing of the device is assured. Usually, a duration of 35 us is sufficient for sustaining the firing of the device. Bipolar junction transistor(BJT) A bipolar transistor consists of a three-layer sandwich of doped (extrinsic) semiconductor materials, either P-N-P in Figure below(b) or N-P-N at (d). Each layer forming the transistor has a specific name, and each layer is provided with a wire contact for connection to a circuit. The schematic symbols are shown in Figure below(a) and (d).

BJT transistor: (a) PNP schematic symbol, (b) physical layout (c) NPN symbol, (d) layout. The functional difference between a PNP transistor and an NPN transistor is the proper biasing (polarity) of the junctions when operating. For any given state of operation, the current directions and voltage polarities for each kind of transistor are exactly opposite each other. Bipolar transistors work as current-controlled current regulators. In other words, transistors restrict the amount of current passed according to a smaller, controlling current. The main current that is controlled goes from collector to emitter, or from emitter to collector, depending on the type of transistor it is (PNP or NPN, respectively). The small current that controls the main current goes from base to emitter, or from emitter to base, once again depending on the kind of transistor it is (PNP or NPN, respectively). According to the standards of semiconductor symbology, the arrow always points against the direction of electron flow. (Figure below)

Small electron base current controls large collector electron current flowing against emitter arrow. Bipolar transistors are called bipolar because the main flow of electrons through them takes place in two types of semiconductor material: P and N, as the main current goes from emitter to collector (or vice versa). In other words, two types of charge carriers -- electrons and holes

With VGS < VT, there is no inversion layer present under the surface At VDS = 0, the source and drain depletion regions are symmetrical A positive VDS reverse biases the drain substrate junction, hence the depletion region around the drain widens, and since the drain is adjacent to the gate edge, the depletion region widens in the channel No current flows even for VDS > 0, since there is no conductive channel between the source and drain for VGS < VT

There are three regions of operation in the MOSFET

When VGS < VT, no conductive channel is present and ID = 0, the cutoff region If VGS < VT and VDS < VDS,sat, the device is in the triode region of operation. Increasing VDS increases the lateral field in the channel, and hence the current. Increasing VGS increases the transverse field and hence the inversion layer density, which also increases the current If VGS < VT and VDS > VDS,sat, the device is in the saturation region of operation. Since the drain end channel density has become small, the current is much less dependent on VDS , but is still dependent on VGS, since increased VGS still increases the inversion layer density

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