Transformer and Its Uses

1
Fundamentals of Microelectronics II
CH9 Cascode Stages and Current Mirrors
CH10 Differential Amplifiers
CH11 Frequency Response
CH12 Feedback
2
Chapter 9 Cascode Stages and Current Mirrors
9.1 Cascode Stage

9.2 Current Mirrors
CH 9 Cascode Stages and Current Mirrors 3
Boosted Output Impedances
( ) | |
( )
S O S m out
E O E m out
R r R g R
r R r r R g R
+ + =
+ + =
1
|| || 1
2
1 t t
Bipolar Cascode Stage
( )
1 2 1 1
1 2 1 1 2
||
|| )] || ( 1 [
t
t t
r r r g R
r r r r r g R
O O m out
O O O m out
~
+ + =
Maximum Bipolar Cascode Output Impedance
The maximum output impedance of a bipolar cascode is
bounded by the ever-present r
t
between emitter and ground
of Q
1
.
1 1 max ,
1 1 max ,
1
O out
O m out
r R
r r g R
|
t
~
~
Example: Output Impedance
Typically r
t
is smaller than r
O
, so in general it is impossible
to double the output impedance by degenerating Q
2
with a
resistor.
2 1
1 2
2
O
O
outA
r r
r r
R
=
t
t
PNP Cascode Stage
( )
1 2 1 1
1 2 1 1 2
||
|| )] || ( 1 [
t
t t
r r r g R
r r r r r g R
O O m out
O O O m out
~
+ + =
Another Interpretation of Bipolar Cascode
Instead of treating cascode as Q
2
degenerating Q
1
, we can
also think of it as Q
1
stacking on top of Q
2
(current source)
to boost Q
2
s output impedance.
False Cascodes
When the emitter of Q
1
is connected to the emitter of Q
2
, its
no longer a cascode since Q
2
becomes a diode-connected
device instead of a current source.
1
2
1
2
1
1 2
2
1 1 2
2
1
2
1
1
|| ||
1
|| ||
1
1
O
m
O
m
m
out
O
m
O O
m
m out
r
g
r
g
g
R
r r
g
r r r
g
g R
~ +
|
|
.
|
\
|
+ ~
+
(
|
|
.
|
\
|
+ =
t t
MOS Cascode Stage
( )
2 1 1
2 1 2 1
1
O O m out
O O O m out
r r g R
r r r g R
~
+ + =
Another Interpretation of MOS Cascode
Similar to its bipolar counterpart, MOS cascode can be
thought of as stacking a transistor on top of a current
source.
Unlike bipolar cascode, the output impedance is not limited
by |.
PMOS Cascode Stage
( )
2 1 1
2 1 2 1
1
O O m out
O O O m out
r r g R
r r r g R
~
+ + =
Example: Parasitic Resistance
R
P
will lower the output impedance, since its parallel
combination with r
O1
will always be lower than r
O1
.
2 1 2 1
) || )( 1 (
O P O O m out
r R r r g R + + =
Short-Circuit Transconductance
The short-circuit transconductance of a circuit measures its
strength in converting input voltage to output current.
0 =
=
out
v
in
out
m
v
i
G
Transconductance Example
1 m m
g G =
Derivation of Voltage Gain
By representing a linear circuit with its Norton equivalent,
the relationship between V
out
and V
in
can be expressed by
the product of G
m
and R
out
.
out m in out
out in m out out out
R G v v
R v G R i v
=
= =
Example: Voltage Gain
1 1 O m v
r g A =
Comparison between Bipolar Cascode and CE Stage
Since the output impedance of bipolar cascode is higher
than that of the CE stage, we would expect its voltage gain
to be higher as well.
Voltage Gain of Bipolar Cascode Amplifier
Since r
O
is much larger than 1/g
m
, most of I
C,Q1
flows into the
diode-connected Q
2
. Using R
out
as before, A
V
is easily
calculated.

) || (
2 1
1
1 1
1
t
r r g r g A
g G
O m O m v
m m
~
~
Alternate View of Cascode Amplifier
A bipolar cascode amplifier is also a CE stage in series with
a CB stage.
Practical Cascode Stage
Since no current source can be ideal, the output impedance
drops.
) || ( ||
2 1 2 2 3 t
r r r g r R
O O m O out
~
Improved Cascode Stage
In order to preserve the high output impedance, a cascode
PNP current source is used.
) || ( || ) || (
2 1 2 2 3 4 3 3 t t
r r r g r r r g R
O O m O O m out
~
MOS Cascode Amplifier
| |
2 2 1 1
2 1 2 2 1
) 1 (
O m O m v
O O O m m v
out m v
r g r g A
r r r g g A
R G A
~
+ + ~
=
Improved MOS Cascode Amplifier
Similar to its bipolar counterpart, the output impedance of a
MOS cascode amplifier can be improved by using a PMOS
cascode current source.
op on out
O O m op
O O m on
R R R
r r g R
r r g R
||
4 3 3
1 2 2
=
~
~
Temperature and Supply Dependence of Bias
Current
Since V
T
, I
S
,
n
, and V
TH
all depend on temperature, I
1
for
both bipolar and MOS depends on temperature and supply.
2
2 1
2
1
1 2 1 2
2
1
) ln( ) (
|
|
.
|
\
|

+
=
= +
TH DD ox n
S T CC
V V
R R
R
L
W
C I
I I V R R V R

Concept of Current Mirror
The motivation behind a current mirror is to sense the
current from a golden current source and duplicate this
golden current to other locations.
Bipolar Current Mirror Circuitry
The diode-connected Q
REF
produces an output voltage V
1
that forces I
copy1
= I
REF
, if Q
1
= Q
REF
.
REF
REF S
S
copy
I
I
I
I
,
1
=
Bad Current Mirror Example I
Without shorting the collector and base of Q
REF
together,
there will not be a path for the base currents to flow,
therefore, I
copy
is zero.
Bad Current Mirror Example II
Although a path for base currents exists, this technique of
biasing is no better than resistive divider.
Multiple Copies of I
REF

Multiple copies of I
REF
can be generated at different
locations by simply applying the idea of current mirror to
more transistors.
REF
REF S
j S
j copy
I
I
I
I
,
,
,
=
Current Scaling
By scaling the emitter area of Q
j
n times with respect to
Q
REF
, I
copy,j
is also n times larger than I
REF
. This is equivalent
to placing n unit-size transistors in parallel.

REF j copy
nI I =
,
Example: Scaled Current
Fractional Scaling
A fraction of I
REF
can be created on Q
1
by scaling up the
emitter area of Q
REF
.
REF copy
I I
3
1
=
Example: Different Mirroring Ratio
Using the idea of current scaling and fractional scaling,
I
copy2
is 0.5mA and I
copy1
is 0.05mA respectively. All coming
from a source of 0.2mA.
Mirroring Error Due to Base Currents
( ) 1
1
1 + +
=
n
nI
I
REF
copy
|
Improved Mirroring Accuracy
Because of Q
F
, the base currents of Q
REF
and Q
1
are mostly
supplied by Q
F
rather than I
REF
. Mirroring error is reduced |
times.
( ) 1
1
1
2
+ +
=
n
nI
I
REF
copy
|
Example: Different Mirroring Ratio Accuracy
2
2
2
1
15
4
10
15
4
|
|
+
=
+
=
REF
copy
REF
copy
I
I
I
I
PNP Current Mirror
PNP current mirror is used as a current source load to an
NPN amplifier stage.
Generation of I
REF
for PNP Current Mirror
Example: Current Mirror with Discrete Devices
Let Q
REF
and Q
1
be discrete NPN devices. I
REF
and I
copy1
can
vary in large magnitude due to I
S
mismatch.
MOS Current Mirror
The same concept of current mirror can be applied to MOS
transistors as well.
Bad MOS Current Mirror Example
This is not a current mirror since the relationship between
V
X
and I
REF
is not clearly defined.
The only way to clearly define V
X
with I
REF
is to use a diode-
connected MOS since it provides square-law I-V
relationship.
Example: Current Scaling
Similar to their bipolar counterpart, MOS current mirrors
can also scale I
REF
up or down (I
1
= 0.2mA, I
2
= 0.5mA).
CMOS Current Mirror
The idea of combining NMOS and PMOS to produce CMOS
current mirror is shown above.
45
Chapter 10 Differential Amplifiers
10.1 General Considerations

10.2 Bipolar Differential Pair

10.3 MOS Differential Pair

10.4 Cascode Differential Amplifiers

10.5 Common-Mode Rejection

10.6 Differential Pair with Active Load
CH 10 Differential Amplifiers

46
Audio Amplifier Example
An audio amplifier is constructed above that takes on a
rectified AC voltage as its supply and amplifies an audio
signal from a microphone.

47
Humming Noise in Audio Amplifier Example
However, V
CC
contains a ripple from rectification that leaks
to the output and is perceived as a humming noise by the
user.

48
Supply Ripple Rejection
Since both node X and Y contain the ripple, their difference
will be free of ripple.
in v Y X
r Y
r in v X
v A v v
v v
v v A v
=
=
+ =

49
Ripple-Free Differential Output
Since the signal is taken as a difference between two
nodes, an amplifier that senses differential signals is
needed.

50
Common Inputs to Differential Amplifier
Signals cannot be applied in phase to the inputs of a
differential amplifier, since the outputs will also be in
phase, producing zero differential output.
0 =
+ =
+ =
Y X
r in v Y
r in v X
v v
v v A v
v v A v

51
Differential Inputs to Differential Amplifier
When the inputs are applied differentially, the outputs are
180 out of phase; enhancing each other when sensed
differentially.
in v Y X
r in v Y
r in v X
v A v v
v v A v
v v A v
2 =
+ =
+ =

52
Differential Signals
A pair of differential signals can be generated, among other
ways, by a transformer.
Differential signals have the property that they share the
same average value to ground and are equal in magnitude
but opposite in phase.

53
Single-ended vs. Differential Signals

54
Differential Pair
With the addition of a tail current, the circuits above operate
as an elegant, yet robust differential pair.

55
Common-Mode Response
2
2
2 1
2 1
EE
C CC Y X
EE
C C
BE BE
I
R V V V
I
I I
V V
= =
= =
=

56
Common-Mode Rejection
Due to the fixed tail current source, the input common-
mode value can vary without changing the output common-
mode value.

57
Differential Response I
CC Y
EE C CC X
C
EE C
V V
I R V V
I
I I
=
=
=
=
0
2
1

58
Differential Response II
CC X
EE C CC Y
C
EE C
V V
I R V V
I
I I
=
=
=
=
0
1
2

59
Differential Pair Characteristics
None-zero differential input produces variations in output
currents and voltages, whereas common-mode input
produces no variations.

60
Small-Signal Analysis
Since the input to Q
1
and Q
2
rises and falls by the same
amount, and their bases are tied together, the rise in I
C1
has
the same magnitude as the fall in I
C2
.
I
I
I
I
I
I
EE
C
EE
C
A =
A + =
2
2
2
1

61
Virtual Ground
For small changes at inputs, the g
m
s are the same, and the
respective increase and decrease of I
C1
and I
C2
are the
same, node P must stay constant to accommodate these
changes. Therefore, node P can be viewed as AC ground.
V g I
V g I
V
m C
m C
P
A = A
A = A
= A
2
1
0

62
Small-Signal Differential Gain
Since the output changes by -2g
m
AVR
C
and input by 2AV,
the small signal gain is g
m
R
C
, similar to that of the CE
stage. However, to obtain same gain as the CE stage,
power dissipation is doubled.
C m
C m
v
R g
V
VR g
A =
A
A
=
2
2

63
Large Signal Analysis
T
in in
EE
C
T
in in
T
in in
EE
C
V
V V
I
I
V
V V
V
V V
I
I
2 1
2
2 1
2 1
1
exp 1
exp 1
exp
+
=
=

64
Input/Output Characteristics
T
in in
EE C
out out
V
V V
I R
V V
2
tanh
2 1
2 1
=

65
Linear/Nonlinear Regions
The left column operates in linear region, whereas the right
column operates in nonlinear region.

66
Small-Signal Model

67
Half Circuits
Since V
P
is grounded, we can treat the differential pair as
two CE half circuits, with its gain equal to one half
circuits single-ended gain.
C m
in in
out out
R g
v v
v v
=
2 1
2 1

68
Example: Differential Gain
O m
in in
out out
r g
v v
v v
=
2 1
2 1

69
Extension of Virtual Ground
It can be shown that if R
1
= R
2
, and points A and B go up
and down by the same amount respectively, V
X
does not
move.
0 =
X
V

70
Half Circuit Example I
( )
1 3 1 1
|| || R r r g A
O O m v
=

71
Half Circuit Example II
( )
1 3 1 1
|| || R r r g A
O O m v
=

72
Half Circuit Example III
m
E
C
v
g
R
R
A
1
+
=

73
Half Circuit Example IV
m
E
C
v
g
R
R
A
1
2
+
=

74
MOS Differential Pairs Common-Mode Response
Similar to its bipolar counterpart, MOS differential pair
produces zero differential output as V
CM
changes.
2
SS
D DD Y X
I
R V V V = =

75
Equilibrium Overdrive Voltage
The equilibrium overdrive voltage is defined as the
overdrive voltage seen by M
1
and M
2
when both of them
carry a current of I
SS
/2.
( )
L
W
C
I
V V
ox n
SS
equil
TH GS
=

76
Minimum Common-mode Output Voltage
In order to maintain M
1
and M
2
in saturation, the common-
mode output voltage cannot fall below the value above.
This value usually limits voltage gain.
TH CM
SS
D DD
V V
I
R V >
2

77
Differential Response

78
Small-Signal Response
Similar to its bipolar counterpart, the MOS differential pair
exhibits the same virtual ground node and small signal
gain.
D m v
P
R g A
V
=
= A 0

79
Power and Gain Tradeoff
In order to obtain the source gain as a CS stage, a MOS
differential pair must dissipate twice the amount of current.
This power and gain tradeoff is also echoed in its bipolar
counterpart.

80
MOS Differential Pairs Large-Signal Response
( ) ( )
2
2 1 1 2 1
4
2
1
2
in in
ox n
SS
in ox n D D
V V
L
W
C
I
V V
L
W
C I I
in
=

81
Maximum Differential Input Voltage
There exists a finite differential input voltage that
completely steers the tail current from one transistor to the
other. This value is known as the maximum differential
input voltage.
( )
equil
TH GS in in
V V V V = 2
max
2 1

82
Contrast Between MOS and Bipolar Differential Pairs
In a MOS differential pair, there exists a finite differential
input voltage to completely switch the current from one
transistor to the other, whereas, in a bipolar pair that
voltage is infinite.
MOS
Bipolar

83
The effects of Doubling the Tail Current
Since I
SS
is doubled and W/L is unchanged, the equilibrium
overdrive voltage for each transistor must increase by
to accommodate this change, thus AV
in,max
increases by
as well. Moreover, since I
SS
is doubled, the differential
output swing will double.

2
2

84
The effects of Doubling W/L
Since W/L is doubled and the tail current remains
unchanged, the equilibrium overdrive voltage will be
lowered by

to accommodate this change, thus AV
in,max
will be lowered by as well. Moreover, the differential
output swing will remain unchanged since neither I
SS
nor R
D

has changed
2
2

85
Small-Signal Analysis of MOS Differential Pair
When the input differential signal is small compared to
4I
SS
/
n
C
ox
(W/L), the output differential current is linearly
proportional to it, and small-signal model can be applied.
( ) ( )
2 1 2 1 2 1
4
2
1
in in SS ox n
ox n
SS
in in ox n D D
V V I
L
W
C
L
W
C
I
V V
L
W
C I I = ~

86
Virtual Ground and Half Circuit
Applying the same analysis as the bipolar case, we will
arrive at the same conclusion that node P will not move for
small input signals and the concept of half circuit can be
used to calculate the gain.
C m v
P
R g A
V
=
= A 0

87
MOS Differential Pair Half Circuit Example I
|
|
.
|
\
|
=
=
1 3
3
1
|| ||
1
0
O O
m
m v
r r
g
g A

88
MOS Differential Pair Half Circuit Example II
3
1
0
m
m
v
g
g
A =
=

89
MOS Differential Pair Half Circuit Example III
m SS
DD
v
g R
R
A
1 2
2
0
+
=
=

90
Bipolar Cascode Differential Pair
( ) | |
1 3 3 1 3 1
||
O O O m m v
r r r r g g A + =
t

91
Bipolar Telescopic Cascode
( ) | | | | ) || ( || ||
5 7 5 5 3 1 3 3 1 t t
r r r g r r r g g A
O O m O O m m v
~

92
Example: Bipolar Telescopic Parasitic Resistance
| |
op O O m m v
O O m O op
R r r r g g A
R
r r
R
r r g r R
|| ) || (
2
|| ||
2
|| || 1
3 1 3 3 1
1
5 7
1
5 7 5 5
t
t t
=
+
(
|
.
|
\
|
+ =

93
MOS Cascode Differential Pair
1 3 3 1 O m O m v
r g r g A ~

94
MOS Telescopic Cascode
( ) | | ) ( ||
7 5 5 1 3 3 1 O O m O O m m v
r r g r r g g A ~

95
Example: MOS Telescopic Parasitic Resistance
( )
) || (
] 1 [ ||
1 3 3 1
7 7 5 1 5
O m O op m v
O O m O op
r g r R g A
r r g R r R
~
+ + =

96
Effect of Finite Tail Impedance
If the tail current source is not ideal, then when a input CM
voltage is applied, the currents in Q
1
and Q
2
and hence
output CM voltage will change.
m EE
C
CM in
CM out
g R
R
V
V
2 / 1
2 /
,
,
+
=
A
A

97
Input CM Noise with Ideal Tail Current

98
Input CM Noise with Non-ideal Tail Current

99
Comparison
As it can be seen, the differential output voltages for both
cases are the same. So for small input CM noise, the
differential pair is not affected.

100
CM to DM Conversion, A
CM-DM

If finite tail impedance and asymmetry are both present,
then the differential output signal will contain a portion of
input common-mode signal.
EE m
D
CM
out
R g
R
V
V
2 / 1 +
A
=
A
A

101
Example: A
CM-DM
| |
3 1 3 3 1 3
1
|| )] || ( 1 [ 2
1
t t
r R r r R g
g
R
A
O m
m
C
DM CM
+ + +
A
=

102
CMRR
CMRR defines the ratio of wanted amplified differential
input signal to unwanted converted input common-mode
noise that appears at the output.
DM CM
DM
A
A
CMRR
=

103
Differential to Single-ended Conversion
Many circuits require a differential to single-ended
conversion, however, the above topology is not very good.

104
Supply Noise Corruption
The most critical drawback of this topology is supply noise
corruption, since no common-mode cancellation
mechanism exists. Also, we lose half of the signal.

105
Better Alternative
This circuit topology performs differential to single-ended
conversion with no loss of gain.

106
Active Load
With current mirror used as the load, the signal current
produced by the Q
1
can be replicated onto Q
4
.
This type of load is different from the conventional static
load and is known as an active load.

107
Differential Pair with Active Load
The input differential pair decreases the current drawn from
R
L
by AI and the active load pushes an extra AI into R
L
by
current mirror action; these effects enhance each other.


108
Active Load vs. Static Load
The load on the left responds to the input signal and
enhances the single-ended output, whereas the load on the
right does not.

109
MOS Differential Pair with Active Load
Similar to its bipolar counterpart, MOS differential pair can
also use active load to enhance its single-ended output.

110
Asymmetric Differential Pair
Because of the vastly different resistance magnitude at the
drains of M
1
and M
2
, the voltage swings at these two nodes
are different and therefore node P cannot be viewed as a
virtual ground.

111
Thevenin Equivalent of the Input Pair
oN Thev
in in oN mN Thev
r R
v v r g v
2
) (
2 1
=
=

112
Simplified Differential Pair with Active Load
) || (
2 1
OP ON mN
in in
out
r r g
v v
v
=

113
I
A
Proof of V
A
<<

V
out

OP mP
out
A
r g
v
v
2
~
A m
O
out
v g
r
v
I
4
4
=

114
Chapter 11 Frequency Response
11.1 Fundamental Concepts
11.2 High-Frequency Models of Transistors
11.3 Analysis Procedure
11.4 Frequency Response of CE and CS Stages
11.5 Frequency Response of CB and CG Stages
11.6 Frequency Response of Followers
11.7 Frequency Response of Cascode Stage
11.8 Frequency Response of Differential Pairs
11.9 Additional Examples

114

115
Chapter Outline
CH 11 Frequency Response

115

116 CH 11 Frequency Response

116
High Frequency Roll-off of Amplifier
As frequency of operation increases, the gain of amplifier
decreases. This chapter analyzes this problem.

117
Example: Human Voice I
Natural human voice spans a frequency range from 20Hz to
20KHz, however conventional telephone system passes
frequencies from 400Hz to 3.5KHz. Therefore phone
conversation differs from face-to-face conversation.

117
Natural Voice
Telephone System

118
Example: Human Voice II

118

Mouth

Recorder

Air

Mouth

Ear

Air

Skull
Path traveled by the human voice to the voice recorder

Path traveled by the human voice to the human ear

Since the paths are different, the results will also be
different.

119
Example: Video Signal
Video signals without sufficient bandwidth become fuzzy as
they fail to abruptly change the contrast of pictures from
complete white into complete black.

119
High Bandwidth Low Bandwidth

120
Gain Roll-off: Simple Low-pass Filter
In this simple example, as frequency increases the
impedance of C
1
decreases and the voltage divider consists
of C
1
and R
1
attenuates V
in
to a greater extent at the output.

120


121
Gain Roll-off: Common Source

The capacitive load, C
L
, is the culprit for gain roll-off since
at high frequency, it will steal away some signal current
and shunt it to ground.
1
||
out m in D
L
V g V R
C s
| |
=
|
\ .


122
Frequency Response of the CS Stage
At low frequency, the capacitor is effectively open and the
gain is flat. As frequency increases, the capacitor tends to
a short and the gain starts to decrease. A special
frequency is =1/(R
D
C
L
), where the gain drops by 3dB.
1
2 2 2
+
=
e
L D
D m
in
out
C R
R g
V
V


123
Example: Figure of Merit
This metric quantifies a circuits gain, bandwidth, and
power dissipation. In the bipolar case, low temperature,
supply, and load capacitance mark a superior figure of
merit.
L CC T
C V V
M O F
1
. . . =

124
Example: Relationship between Frequency
Response and Step Response

124
( )
2 2 2
1 1
1
1
H s j
R C
e
e
= =
+
( ) ( )
0
1 1
1 exp
out
t
V t V u t
R C
| |
=
|
\ .
The relationship is such that as R
1
C
1
increases, the
bandwidth drops and the step response becomes slower.


125
Bode Plot
When we hit a zero,
zj
, the Bode magnitude rises with a
slope of +20dB/dec.
When we hit a pole,
pj
, the Bode magnitude falls with a
slope of -20dB/dec
|
|
.
|
\
|
+
|
|
.
|
\
|
+
|
|
.
|
\
|
+
|
|
.
|
\
|
+
=
2 1
2 1
0
1 1
1 1
) (
p p
z z
s s
s s
A s H
e e
e e


126
Example: Bode Plot
The circuit only has one pole (no zero) at 1/(R
D
C
L
), so the
slope drops from 0 to -20dB/dec as we pass
p1
.
L D
p
C R
1
1
= e


127
Pole Identification Example I
in S
p
C R
1
1
= e
L D
p
C R
1
2
= e
( )( )
2
2
2 2
1
2
1 1
p p
D m
in
out
R g
V
V
e e e e + +
=


128
Pole Identification Example II
in
m
S
p
C
g
R
|
|
.
|
\
|
=
1
||
1
1
e
L D
p
C R
1
2
= e


129
Circuit with Floating Capacitor
The pole of a circuit is computed by finding the effective
resistance and capacitance from a node to GROUND.
The circuit above creates a problem since neither terminal
of C
F
is grounded.


130
Millers Theorem
If A
v
is the gain from node 1 to 2, then a floating impedance
Z
F
can be converted to two grounded impedances Z
1
and Z
2
.
v
F
A
Z
Z
=
1
1
v
F
A
Z
Z
/ 1 1
2
=


131
Miller Multiplication
With Millers theorem, we can separate the floating
capacitor. However, the input capacitor is larger than the
original floating capacitor. We call this Miller multiplication.


132
Example: Miller Theorem
( )
F D m S
in
C R g R +
=
1
1
e
F
D m
D
out
C
R g
R
|
|
.
|
\
|
+
=
1
1
1
e

133
High-Pass Filter Response
1
2
1
2
1
2
1
1 1
+
=
e
e
C R
C R
V
V
in
out
The voltage division between a resistor and a capacitor can
be configured such that the gain at low frequency is
reduced.

133

134
Example: Audio Amplifier
nF C
i
6 . 79 =
nF C
L
8 . 39 =
In order to successfully pass audio band frequencies (20
Hz-20 KHz), large input and output capacitances are
needed.
O =
O =
200 / 1
100
m
i
g
K R

134

135
Capacitive Coupling vs. Direct Coupling
Capacitive coupling, also known as AC coupling, passes
AC signals from Y to X while blocking DC contents.
This technique allows independent bias conditions between
stages. Direct coupling does not.
Capacitive Coupling

Direct Coupling


135

136
Typical Frequency Response
Lower Corner Upper Corner

136


137
High-Frequency Bipolar Model
At high frequency, capacitive effects come into play. C
b
represents the base charge, whereas C

and C
je
are the
junction capacitances.
b je
C C C
t
= +


138
High-Frequency Model of Integrated Bipolar
Transistor
Since an integrated bipolar circuit is fabricated on top of a
substrate, another junction capacitance exists between the
collector and substrate, namely C
CS
.


139
Example: Capacitance Identification


140
MOS Intrinsic Capacitances
For a MOS, there exist oxide capacitance from gate to
channel, junction capacitances from source/drain to
substrate, and overlap capacitance from gate to
source/drain.


141
Gate Oxide Capacitance Partition and Full Model
The gate oxide capacitance is often partitioned between
source and drain. In saturation, C
2
~ C
gate
, and C
1
~ 0. They
are in parallel with the overlap capacitance to form C
GS
and
C
GD
.


142
Example: Capacitance Identification


143
Transit Frequency
Transit frequency, f
T
, is defined as the frequency where the
current gain from input to output drops to 1.
t
t
C
g
f
m
T
= 2
GS
m
T
C
g
f = t 2

144
Example: Transit Frequency Calculation
( )
TH GS
n
T
V V
L
f =
2
2
3
2

t
GHz f
s V cm
mV V V
nm L
T
n
TH GS
226
) . /( 400
100
65
2
=
=
=
=

144

145
Analysis Summary
The frequency response refers to the magnitude of the
transfer function.
Bodes approximation simplifies the plotting of the
frequency response if poles and zeros are known.
In general, it is possible to associate a pole with each node
in the signal path.
Millers theorem helps to decompose floating capacitors
into grounded elements.
Bipolar and MOS devices exhibit various capacitances that
limit the speed of circuits.


145

146
High Frequency Circuit Analysis Procedure
Determine which capacitor impact the low-frequency region
of the response and calculate the low-frequency pole
(neglect transistor capacitance).
Calculate the midband gain by replacing the capacitors with
short circuits (neglect transistor capacitance).
Include transistor capacitances.
Merge capacitors connected to AC grounds and omit those
that play no role in the circuit.
Determine the high-frequency poles and zeros.
Plot the frequency response using Bodes rules or exact
analysis.

146

147
Frequency Response of CS Stage
with Bypassed Degeneration
( )
( )
1
1
+ +
+
=
S m b S
b S D m
X
out
R g s C R
s C R R g
s
V
V
In order to increase the midband gain, a capacitor C
b
is
placed in parallel with R
s
.
The pole frequency must be well below the lowest signal
frequency to avoid the effect of degeneration.


147


148
Unified Model for CE and CS Stages


149
Unified Model Using Millers Theorem

150
Example: CE Stage
f F C
f F C
f F C
mA I
R
CS
C
S
30
20
100
100
1
200
=
=
=
=
=
O =
t
|
( )
( ) GHz
MHz
out p
in p
59 . 1 2
516 2
,
,
=
=
t e
t e
The input pole is the bottleneck for speed.

150

151
Example: Half Width CS Stage
X W 2 +
(
|
|
.
|
\
|
+ +
=
(
|
.
|
\
|
+ +
=
2
2
1
2
1
2 2
1
2
1
,
,
XY
L m
out
L
out p
XY L m in
S
in p
C
R g
C
R
C R g C
R
e
e

151


152
Direct Analysis of CE and CS Stages
Direct analysis yields different pole locations and an extra
zero.
( ) ( )
( ) ( )
( )
out in XY out XY in L Thev
out XY L in Thev Thev XY L m
p
out XY L in Thev Thev XY L m
p
XY
m
z
C C C C C C R R
C C R C R R C R g
C C R C R R C R g
C
g
+ +
+ + + +
=
+ + + +
=
=
1
| |
1
1
| |
| |
2
1
e
e
e


153
Example: CE and CS Direct Analysis
( ) | | ( )
( ) | | ( )
( )( )
out in XY out XY in O O S
out XY O O in S S XY O O m
p
out XY O O in S S XY O O m
p
C C C C C C r r R
C C r r C R R C r r g
C C r r C R R C r r g
+ +
+ + + +
~
+ + + +
~
2 1
2 1 2 1 1
2
2 1 2 1 1
1
||
) ( || || 1
) ( || || 1
1
e
e

154
Example: Comparison Between Different Methods
( )
( ) MHz
MHz
out p
in p
428 2
571 2
,
,
=
=
t e
t e
( )
( ) GHz
MHz
out p
in p
53 . 4 2
264 2
,
,
=
=
t e
t e
( )
( ) GHz
MHz
out p
in p
79 . 4 2
249 2
,
,
=
=
t e
t e
( )
O =
=
O =
=
=
=
O =
K R
g
f F C
f F C
f F C
R
L
m
DB
GD
GS
S
2
0
150
100
80
250
200
1
Millers
Exact
Dominant Pole

154


155
Input Impedance of CE and CS Stages
( ) | |
t
t
r
s C R g C
Z
C m
in
||
1
1
+ +
~
( ) | |s C R g C
Z
GD D m GS
in
+ +
~
1
1

156
Low Frequency Response of CB and CG Stages
( )
( )
m i S m
i C m
in
out
g s C R g
s C R g
s
V
V
+ +
=
1
As with CE and CS stages, the use of capacitive coupling
leads to low-frequency roll-off in CB and CG stages
(although a CB stage is shown above, a CG stage is
similar).

156


157
Frequency Response of CB Stage
X
m
S
X p
C
g
R
|
|
.
|
\
|
=
1
||
1
,
e
t
C C
X
=
Y L
Y p
C R
1
,
= e
CS Y
C C C + =

=
O
r


158
Frequency Response of CG Stage
=
O
r
X
m
S
X p
C
g
R
|
|
.
|
\
|
=
1
||
1
,
e
SB GS X
C C C + =
Y L
Y p
C R
1
,
= e
DB GD Y
C C C + =
Similar to a CB stage, the input pole is on the order of f
T
, so
rarely a speed bottleneck.
=
O
r


159
Example: CG Stage Pole Identification
( )
1 1
1
,
1
||
1
GD SB
m
S
X p
C C
g
R +
|
|
.
|
\
|
= e
( )
2 2 1 1
2
,
1
1
DB GS GD DB
m
Y p
C C C C
g
+ + +
= e

160
Example: Frequency Response of CG Stage
( )
O =
=
O =
=
=
=
O =
K R
g
f F C
f F C
f F C
R
d
m
DB
GD
GS
S
2
0
150
100
80
250
200
1
( )
( ) MHz
GHz
Y p
X p
442 2
31 . 5 2
,
,
=
=
t e
t e

160


161
Emitter and Source Followers
The following will discuss the frequency response of
emitter and source followers using direct analysis.
Emitter follower is treated first and source follower is
derived easily by allowing r
t
to go to infinity.


162
Direct Analysis of Emitter Follower
1
1
2
+ +
+
=
bs as
s
g
C
V
V
m
in
out
t
( )
m
L S
m
S
L L
m
S
g
C
r
R
g
C
C R b
C C C C C C
g
R
a
|
|
.
|
\
|
+ + + =
+ + =
t
t
t t
1


163
Direct Analysis of Source Follower Stage
1
1
2
+ +
+
=
bs as
s
g
C
V
V
m
GS
in
out
( )
m
SB GD
GD S
SB GS SB GD GS GD
m
S
g
C C
C R b
C C C C C C
g
R
a
+
+ =
+ + =

164
Example: Frequency Response of Source Follower
( )
0
150
100
80
250
100
200
1
=
O =
=
=
=
=
O =
m
DB
GD
GS
L
S
g
f F C
f F C
f F C
f F C
R
( ) | |
( ) | | GHz j GHz
GHz j GHz
p
p
57 . 2 79 . 1 2
57 . 2 79 . 1 2
2
1
=
+ =
t e
t e

164


165
Example: Source Follower
1
1
2
+ +
+
=
bs as
s
g
C
V
V
m
GS
in
out
| |
1
2 2 1 1
1
2 2 1 1 1 1 1
1
) )( (
m
DB GD SB GD
GD S
DB GD SB GS GD GS GD
m
S
g
C C C C
C R b
C C C C C C C
g
R
a
+ + +
+ =
+ + + + =


166
Input Capacitance of Emitter/Source Follower
L m
GS
GD in
R g
C C
C C C
+
+ =
1
/
/
t
=
O
r


167
Example: Source Follower Input Capacitance
( )
1
2 1 1
1
|| 1
1
GS
O O m
GD in
C
r r g
C C
+
+ =


168
Output Impedance of Emitter Follower
1 + +
+ +
=
|
t t
t t t
s C r
R r s C r R
I
V
S S
X
X


169
Output Impedance of Source Follower
m GS
GS S
X
X
g s C
s C R
I
V
+
+
=
1


170
Active Inductor
The plot above shows the output impedance of emitter and
source followers. Since a followers primary duty is to
lower the driving impedance (R
S
>1/g
m
), the active
inductor characteristic on the right is usually observed.


171
Example: Output Impedance
( )
3 3
3 2 1
1 ||
m GS
GS O O
X
X
g s C
s C r r
I
V
+
+
=
=
O
r


172
Frequency Response of Cascode Stage
For cascode stages, there are three poles and Miller
multiplication is smaller than in the CE/CS stage.
1
2
1
,
~
=
m
m
XY v
g
g
A
XY x
C C 2 ~


173
Poles of Bipolar Cascode
( )( )
1 1 1
,
2 ||
1
t t
e
C C r R
S
X p
+
=
( )
1 2 1
2
,
2
1
1
t
e
C C C
g
CS
m
Y p
+ +
=
( )
2 2
,
1
e
C C R
CS L
out p
+
=


174
Poles of MOS Cascode
(
|
|
.
|
\
|
+ +
=
1
2
1
1
,
1
1
GD
m
m
GS S
X p
C
g
g
C R
e
(
|
|
.
|
\
|
+ + +
=
1
1
2
2 1
2
,
1
1
1
GD
m
m
GS DB
m
Y p
C
g
g
C C
g
e
( )
2 2
,
1
GD DB L
out p
C C R +
= e

175
Example: Frequency Response of Cascode
( )
O =
=
O =
=
=
=
O =
K R
g
f F C
f F C
f F C
R
L
m
DB
GD
GS
S
2
0
150
100
80
250
200
1
( )
( )
( ) MHz
GHz
GHz
out p
Y p
X p
442 2
73 . 1 2
95 . 1 2
,
,
,
=
=
=
t e
t e
t e

175


176
MOS Cascode Example
(
|
|
.
|
\
|
+ +
=
1
2
1
1
,
1
1
GD
m
m
GS S
X p
C
g
g
C R
e
(
+ +
|
|
.
|
\
|
+ + +
=
3 3 1
1
2
2 1
2
,
1
1
1
DB GD GD
m
m
GS DB
m
Y p
C C C
g
g
C C
g
e
( )
2 2
,
1
GD DB L
out p
C C R +
= e


177
I/O Impedance of Bipolar Cascode
( )s C C
r Z
in
1 1
1
2
1
||
t
t
+
=
( )s C C
R Z
CS
L out
2 2
1
||
+
=


178
I/O Impedance of MOS Cascode
s C
g
g
C
Z
GD
m
m
GS
in
(
|
|
.
|
\
|
+ +
=
1
2
1
1
1
1
( )s C C
R Z
DB GD
L out
2 2
1
||
+
=


179
Bipolar Differential Pair Frequency Response
Since bipolar differential pair can be analyzed using half-
circuit, its transfer function, I/O impedances, locations of
poles/zeros are the same as that of the half circuits.
Half Circuit


180
MOS Differential Pair Frequency Response
Since MOS differential pair can be analyzed using half-
circuit, its transfer function, I/O impedances, locations of
poles/zeros are the same as that of the half circuits.
Half Circuit


181
Example: MOS Differential Pair
( )
3 3
,
1
1
3
3 1
3
,
1 3 1 1
,
1
1
1
1
] ) / 1 ( [
1
GD DB L
out p
GD
m
m
GS DB
m
Y p
GD m m GS S
X p
C C R
C
g
g
C C
g
C g g C R
+
=
(
|
|
.
|
\
|
+ + +
=
+ +
=
e
e
e

182
Common Mode Frequency Response
( )
1 2
1
+ +
+ A
=
A
A
SS m SS SS
SS SS D m
CM
out
R g s C R
C R R g
V
V
C
ss
will lower the total impedance between point P to
ground at high frequency, leading to higher CM gain which
degrades the CM rejection ratio.

182

183
Tail Node Capacitance Contribution
Source-Body Capacitance of
M
1
, M
2
and M
3
Gate-Drain Capacitance of M
3

183

184
Example: Capacitive Coupling
( ) | |
E B in
R r R R 1 ||
2 2 2
+ + = |
t
( )
( ) Hz
C R r
B
L
542 2
||
1
1 1 1
1
= = t e
t
( )
( ) Hz
C R R
in C
L
9 . 22
1
2 2
2
=
+
= t e

184

185
( )
( ) MHz
C R R
in D
L
92 . 6 2
1
2 2 1
2
=
+
= t e
( ) MHz
C R
R g
S
S m
L
4 . 42 2
1
1 1
1 1
1
=
+
= t e
2
2
1
v
F
in
A
R
R
=
Example: IC Amplifier Low Frequency Design

185

186
( ) 77 . 3 ||
2 1 1
= =
in D m
in
X
R R g
v
v
Example: IC Amplifier Midband Design

186

187
Example: IC Amplifier High Frequency Design
) 21 . 1 ( 2
) 15 . 1 (
1
) 15 . 2 ( 2
) 308 ( 2
2 2 2
3
2
1
GHz
C C R
GHz
MHz
DB GD L
p
p
p
=
+
=
=
=
t
e
t e
t e

187
188
Chapter 12 Feedback
12.1 General Considerations

12.2 Types of Amplifiers

12.3 Sense and Return Techniques

12.4 Polarity of Feedback

12.5 Feedback Topologies

12.6 Effect of Finite I/O Impedances

12.7 Stability in Feedback Systems
CH 12 Feedback 189
Negative Feedback System
A negative feedback system consists of four components:
1) feedforward system, 2) sense mechanism, 3) feedback
network, and 4) comparison mechanism.
CH 12 Feedback 190
Close-loop Transfer Function
1
1
1 KA
A
X
Y
+
=
CH 12 Feedback 191
Feedback Example
A
1
is the feedforward network, R
1
and R
2
provide the
sensing and feedback capabilities, and comparison is
provided by differential input of A
1
.

1
2 1
2
1
1 A
R R
R
A
X
Y
+
+
=
CH 12 Feedback 192
Comparison Error
As A
1
K increases, the error between the input and fed back
signal decreases. Or the fed back signal approaches a
good replica of the input.
K A
X
E
1
1+
=
E
CH 12 Feedback 193
Comparison Error
2
1
1
R
R
X
Y
+ ~
CH 12 Feedback 194
Loop Gain
When the input is grounded, and the loop is broken at an
arbitrary location, the loop gain is measured to be KA
1
.
test
N
V
V
KA =
1
0 = X
CH 12 Feedback 195
Example: Alternative Loop Gain Measurement
test N
V KA V
1
=
CH 12 Feedback 196
Incorrect Calculation of Loop Gain
Signal naturally flows from the input to the output of a
feedforward/feedback system. If we apply the input the
other way around, the output signal we get is not a result
of the loop gain, but due to poor isolation.
CH 12 Feedback 197
Gain Desensitization
A large loop gain is needed to create a precise gain, one
that does not depend on A
1
, which can vary by 20%.
1
1
>> K A
K X
Y 1
~
CH 12 Feedback 198
Ratio of Resistors
When two resistors are composed of the same unit resistor,
their ratio is very accurate. Since when they vary, they will
vary together and maintain a constant ratio.
CH 12 Feedback 199
Merits of Negative Feedback
1) Bandwidth
enhancement

2) Modification of I/O
Impedances

3) Linearization
CH 12 Feedback 200
Bandwidth Enhancement
Although negative feedback lowers the gain by (1+KA
0
), it
also extends the bandwidth by the same amount.
( )
0
0
1
e
s
A
s A
+
=
( )
( )
0 0
0
0
1
1
1
e KA
s
KA
A
s
X
Y
+
+
+
=
Open Loop
Closed Loop
Negative
Feedback
CH 12 Feedback 201
Bandwidth Extension Example
As the loop gain increases, we can see the decrease of the
overall gain and the extension of the bandwidth.
CH 12 Feedback 202
Example: Open Loop Parameters
D out
m
in
D m
R R
g
R
R g A
=
=
~
1
0
CH 12 Feedback 203
Example: Closed Loop Voltage Gain
D m
D m
in
out
R g
R R
R
R g
v
v
2 1
2
1
+
+
=
CH 12 Feedback 204
Example: Closed Loop I/O Impedance
|
|
.
|
\
|
+
+ =
D m
m
in
R g
R R
R
g
R
2 1
2
1
1
D m
D
out
R g
R R
R
R
R
2 1
2
1
+
+
=
CH 12 Feedback 205
Example: Load Desensitization
3 /
D m D m
R g R g
D m
D m
D m
D m
R g
R R
R
R g
R g
R R
R
R g
2 1
2
2 1
2
3 1
+
+
+
+
W/O Feedback
Large Difference
With Feedback
Small Difference
CH 12 Feedback 206
Linearization
Before feedback
After feedback
CH 12 Feedback 207
Four Types of Amplifiers
CH 12 Feedback 208
Ideal Models of the Four Amplifier Types
CH 12 Feedback 209
Realistic Models of the Four Amplifier Types
CH 12 Feedback 210
Examples of the Four Amplifier Types
CH 12 Feedback 211
Sensing a Voltage
In order to sense a voltage across two terminals, a
voltmeter with ideally infinite impedance is used.
CH 12 Feedback 212
Sensing and Returning a Voltage
Similarly, for a feedback network to correctly sense the
output voltage, its input impedance needs to be large.
R
1
and R
2
also provide a mean to return the voltage.
~ +
2 1
R R
Feedback
Network
CH 12 Feedback 213
Sensing a Current
A current is measured by inserting a current meter with
ideally zero impedance in series with the conduction path.
The current meter is composed of a small resistance r in
parallel with a voltmeter.
CH 12 Feedback 214
Sensing and Returning a Current
Similarly for a feedback network to correctly sense the
current, its input impedance has to be small.
R
S
has to be small so that its voltage drop will not change
I
out
.
0 ~
S
R
Feedback
Network
CH 12 Feedback 215
Addition of Two Voltage Sources
In order to add or substrate two voltage sources, we place
them in series. So the feedback network is placed in series
with the input source.
Feedback
Network
CH 12 Feedback 216
Practical Circuits to Subtract Two Voltage Sources
Although not directly in series, V
in
and V
F
are being
subtracted since the resultant currents, differential and
single-ended, are proportional to the difference of V
in
and
V
F
.
CH 12 Feedback 217
Addition of Two Current Sources
In order to add two current sources, we place them in
parallel. So the feedback network is placed in parallel with
the input signal.
Feedback
Network
CH 12 Feedback 218
Practical Circuits to Subtract Two Current Sources
Since M
1
and R
F
are in parallel with the input current source,
their respective currents are being subtracted. Note, R
F
has
to be large enough to approximate a current source.
CH 12 Feedback 219
Example: Sense and Return
R
1
and R
2
sense and return the output voltage to
feedforward network consisting of M
1
- M
4
.
M
1
and M
2
also act as a voltage subtractor.
CH 12 Feedback 220
Example: Feedback Factor
mF
out
F
g
v
i
K = =
CH 12 Feedback 221
Input Impedance of an Ideal Feedback Network
To sense a voltage, the input impedance of an ideal
feedback network must be infinite.
To sense a current, the input impedance of an ideal
feedback network must be zero.
CH 12 Feedback 222
Output Impedance of an Ideal Feedback Network
To return a voltage, the output impedance of an ideal
feedback network must be zero.
To return a current, the output impedance of an ideal
feedback network must be infinite.
CH 12 Feedback 223
Determining the Polarity of Feedback
1) Assume the input goes
either up or down.

2) Follow the signal through
the loop.

3) Determine whether the
returned quantity enhances or
opposes the original change.

CH 12 Feedback 224
Polarity of Feedback Example I
|
in
V + |
2 1
,
D D
I I
| |
x out
V V ,
+ |
1 2
,
D D
I I
Negative Feedback
CH 12 Feedback 225
Polarity of Feedback Example II
|
in
V + |
A D
V I ,
1
| |
x out
V V ,
| +
A D
V I ,
1
Negative Feedback
CH 12 Feedback 226
Polarity of Feedback Example III
|
in
I | |
X D
V I ,
1
+ +
2
,
D out
I V
| |
X D
V I ,
1
Positive Feedback
CH 12 Feedback 227
Voltage-Voltage Feedback
0
0
1 KA
A
V
V
in
out
+
=
CH 12 Feedback 228
Example: Voltage-Voltage Feedback
) || ( 1
) || (
2 1
2
OP ON mN
OP ON mN
in
out
r r g
R R
R
r r g
V
V
+
+
=
CH 12 Feedback 229
Input Impedance of a V-V Feedback
) 1 (
0
K A R
I
V
in
in
in
+ =
A better voltage sensor
CH 12 Feedback 230
Example: V-V Feedback Input Impedance
|
|
.
|
\
|
+
+ =
D m
m in
in
R g
R R
R
g I
V
2 1
2
1
1
CH 12 Feedback 231
Output Impedance of a V-V Feedback
( )
0
1 KA
R
I
V
out
X
X
+
=
A better voltage source
CH 12 Feedback 232
Example: V-V Feedback Output Impedance
mN
closed out
g R
R
R
1
1
2
1
,
|
|
.
|
\
|
+ ~
CH 12 Feedback 233
Voltage-Current Feedback
O
O
in
out
KR
R
I
V
+
=
1
CH 12 Feedback 234
Example: Voltage-Current Feedback
F
D D m
D D m
in
out
R
R R g
R R g
I
V
2 1 2
2 1 2
1+
=
CH 12 Feedback 235
Input Impedance of a V-C Feedback
K R
R
I
V
in
X
X
0
1+
=
A better current sensor.
CH 12 Feedback 236
Example: V-C Feedback Input Impedance
F
D D m
m
closed in
R
R R g
g
R
2 1 2
1
,
1
1
.
1
+
=
CH 12 Feedback 237
Output Impedance of a V-C Feedback
A better voltage source.
K R
R
I
V
out
X
X
0
1+
=
CH 12 Feedback 238
Example: V-C Feedback Output Impedance
F
D D m
D
closed out
R
R R g
R
R
2 1 2
2
,
1+
=
CH 12 Feedback 239
Current-Voltage Feedback
m
m
in
out
KG
G
V
I
+
=
1
CH 12 Feedback 240
Example: Current-Voltage Feedback
( )
( )
M O O m m
O O m m
closed
in
out
R r r g g
r r g g
V
I
5 3 3 1
5 3 3 1
|| 1
||
|
+
=
Laser
CH 12 Feedback 241
Input Impedance of a C-V Feedback
A better voltage sensor.
) 1 (
m in
in
in
KG R
I
V
+ =
CH 12 Feedback 242
Output Impedance of a C-V Feedback
A better current source.
) 1 (
m out
X
X
KG R
I
V
+ =
CH 12 Feedback 243
Laser
Example: Current-Voltage Feedback
) 1 (
1
|
) 1 (
1
|
1
|
2 1
2
2 1
1
2 1
2 1
M D m m
m
closed out
M D m m
m
closed in
M D m m
D m m
closed
in
out
R R g g
g
R
R R g g
g
R
R R g g
R g g
V
I
+ =
+ =
+
=
CH 12 Feedback 244
Wrong Technique for Measuring Output Impedance
If we want to measure the output impedance of a C-V
closed-loop feedback topology directly, we have to place V
X
in series with K and R
out
. Otherwise, the feedback will be
disturbed.

CH 12 Feedback 245
Current-Current Feedback
I
I
in
out
KA
A
I
I
+
=
1
CH 12 Feedback 246
Input Impedance of C-C Feedback
A better current sensor.
I
in
X
X
KA
R
I
V
+
=
1
CH 12 Feedback 247
Output Impedance of C-C Feedback
A better current source.
) 1 (
I out
X
X
KA R
I
V
+ =
CH 12 Feedback 248
Example: Test of Negative Feedback
|
in
I + |
out D
I V ,
1
| +
F P
I V ,
| +
out D
I V ,
1
Negative Feedback
Laser
CH 12 Feedback 249
Example: C-C Negative Feedback
)] / ( 1 [ |
) / ( 1
1
.
1
|
) / ( 1
|
2 2
2 1
2
2
F D m O closed out
F M D m m
closed in
F M D m
D m
closed I
R R R g r R
R R R g g
R
R R R g
R g
A
M
+ =
+
=
+

=
Laser
CH 12 Feedback 250
How to Break a Loop
The correct way of breaking a loop is such that the loop
does not know it has been broken. Therefore, we need to
present the feedback network to both the input and the
output of the feedforward amplifier.
CH 12 Feedback 251
Rules for Breaking the Loop of Amplifier Types
CH 12 Feedback 252
Intuitive Understanding of these Rules
Since ideally, the input of the feedback network sees zero
impedance (Z
out
of an ideal voltage source), the return
replicate needs to be grounded. Similarly, the output of the
feedback network sees an infinite impedance (Z
in
of an ideal
voltage sensor), the sense replicate needs to be open.
Similar ideas apply to the other types.

CH 12 Feedback 253
Rules for Calculating Feedback Factor
CH 12 Feedback 254
Intuitive Understanding of these Rules
Since the feedback senses voltage, the input of the
feedback is a voltage source. Moreover, since the return
quantity is also voltage, the output of the feedback is left
open (a short means the output is always zero).
Similar ideas apply to the other types.

CH 12 Feedback 255
Breaking the Loop Example I
( ) | |
( )
2 1 ,
1 ,
2 1 1 ,
||
/ 1
||
R R R R
g R
R R R g A
D open out
m open in
D m open v
+ =
=
+ =
CH 12 Feedback 256
Feedback Factor Example I
) 1 /(
) 1 (
) 1 /(
) /(
, , ,
, , ,
, , ,
2 1 2
open v closed out closed out
open v open in closed in
open v open v closed v
KA R R
KA R R
KA A A
R R R K
+ =
+ =
+ =
+ =
CH 12 Feedback 257
Breaking the Loop Example II
( ) | |
( )
2 1 ,
,
2 1 ,
|| ||
|| ||
R R r r R
R
R R r r g A
OP ON open out
open in
OP ON mN open v
+ =
=
+ =
CH 12 Feedback 258
Feedback Factor Example II
) 1 /(
) 1 /(
) /(
, , ,
,
, , ,
2 1 2
open v open out closed out
closed in
open v open v closed v
KA R R
R
KA A A
R R R K
+ =
=
+ =
+ =
CH 12 Feedback 259
Breaking the Loop Example IV
( ) | |
F D open out
F
m
open in
F D m
m
F
D F
open
in
out
R R R
R
g
R
R R g
g
R
R R
I
V
||
||
1
|| .
1
|
2 ,
1
,
2 2
1
1
=
=
+
=
CH 12 Feedback 260
Feedback Factor Example IV
) | 1 /(
) | 1 /(
) | 1 /( | |
/ 1
, ,
, ,
open
in
out
open out closed out
open
in
out
open in closed in
open
in
out
open
in
out
closed
in
out
F
I
V
K R R
I
V
K R R
I
V
K
I
V
I
V
R K
+ =
+ =
+ =
=
CH 12 Feedback 261
Breaking the Loop Example V
( )
M O open out
open in
M L O
O m O O m
open
in
out
R r R
R
R R r
r g r r g
V
I
+ =
=
+ +
=
1 ,
,
1
1 1 5 3 3
||
|
CH 12 Feedback 262
] | ) / ( 1 [
] | ) / ( 1 /[ ) | / ( ) | / (
, ,
,
open in out open out closed out
closed in
open in out open in out closed in out
M
V I K R R
R
V I K V I V I
R K
+ =
=
+ =
=
Feedback Factor Example V
CH 12 Feedback 263
Breaking the Loop Example VI
M m open out
m open in
m M L
D m
open
in
out
R g R
g R
g R R
R g
V
I
+ =
=
+ +
=
) / 1 (
/ 1
/ 1
|
2 ,
1 ,
2
1
CH 12 Feedback 264
Feedback Factor Example VI
] | ) / ( 1 [
] | ) / ( 1 [
] | ) / ( 1 /[ ) | / ( ) | / (
, ,
, ,
open in out open in closed in
M
V I K R R
V I K R R
V I K V I V I
R K
+ =
+ =
+ =
=
CH 12 Feedback 265
Breaking the Loop Example VII
M F O open out
M F
m
open in
F M L O
O m
m
M F
D M F
open I
R R r R
R R
g
R
R R R r
r g
g
R R
R R R
A
||
) ( ||
1
||
.
1
) (
2 ,
1
,
2
2 2
1
,
+ =
+ =
+ +
+ +
+
=
CH 12 Feedback 266
Feedback Factor Example VII
) 1 (
) 1 /(
) 1 /(
) /(
, , ,
, , ,
, , ,
open I open out closed out
open I open in closed in
open I open I closed I
M F M
KA R R
KA R R
KA A A
R R R K
+ =
+ =
+ =
+ =
CH 12 Feedback 267
Breaking the Loop Example VIII
M F open out
F
m
open in
M F m
m F
D F
open
in
out
R R R
R
g
R
R R g
g R
R R
I
V
||
||
1
)] || ( [
/ 1
|
,
1
,
2
1
=
=
+
=
CH 12 Feedback 268
Feedback Factor Example VIII
] | ) / ( 1 /[
] | ) / ( 1 /[
] | ) / ( 1 /[ | ) / ( | ) / (
/ 1
, ,
, ,
open in out open in closed in
F
I V K R R
I V K R R
I V K I V I V
R K
+ =
+ =
+ =
=
CH 12 Feedback 269
Example: Phase Response
As it can be seen, the phase of H(j) starts to drop at 1/10
of the pole, hits -45
o
at the pole, and approaches -90
o
at 10
times the pole.
CH 12 Feedback 270
Example: Three-Pole System
For a three-pole system, a finite frequency produces a
phase of -180
o
, which means an input signal that operates
at this frequency will have its output inverted.
CH 12 Feedback 271
Instability of a Negative Feedback Loop
Substitute j for s. If for a certain
1
, KH(j
1
) reaches
-1, the closed loop gain becomes infinite. This implies for a
very small input signal at
1
, the output can be very large.
Thus the system becomes unstable.
) ( 1
) (
) (
s KH
s H
s
X
Y
+
=
CH 12 Feedback 272
Barkhausens Criteria for Oscillation
180 ) (
1 | ) ( |
1
1
= Z
=
e
e
j KH
j KH
CH 12 Feedback 273
Time Evolution of Instability
CH 12 Feedback 274
Oscillation Example
This system oscillates, since theres a finite frequency at
which the phase is -180
o
and the gain is greater than unity.
In fact, this system exceeds the minimum oscillation
requirement.
CH 12 Feedback 275
Condition for Oscillation
Although for both systems above, the frequencies at which
|KH|=1 and ZKH=-180
o
are different, the system on the left
is still unstable because at ZKH=-180
o
, |KH|>1. Whereas
the system on the right is stable because at ZKH=-180
o
,
|KH|<1.
CH 12 Feedback 276
Condition for Stability

PX
, (phase crossover), is the frequency at which
ZKH=-180
o
.

GX
, (gain crossover), is the frequency at which |KH|=1.

PX GX
e e <
CH 12 Feedback 277
Stability Example I
1
1 | |
=
<
K
H
p
CH 12 Feedback 278
Stability Example II
5 . 0
1 | | 5 . 0
=
<
K
H
p
CH 12 Feedback 279
Marginally Stable vs. Stable
Marginally Stable
Stable
CH 12 Feedback 280
Phase Margin
Phase Margin =
ZH(
GX
)+180

The larger the phase
margin, the more stable
the negative feedback
becomes
CH 12 Feedback 281
Phase Margin Example
45 = PM
CH 12 Feedback 282
Frequency Compensation
Phase margin can be improved by moving
GX
closer to
origin while maintaining
PX
unchanged.
CH 12 Feedback 283
Frequency Compensation Example
C
comp
is added to lower the dominant pole so that
GX
occurs at a lower frequency than before, which means
phase margin increases.
CH 12 Feedback 284
Frequency Compensation Procedure
1) We identify a PM, then -180
o
+PM gives us the new
GX
, or
PM
.
2) On the magnitude plot at
PM
, we extrapolate up with a
slope of +20dB/dec until we hit the low frequency gain then
we look down and the frequency we see is our new
dominant pole,
P
.
CH 12 Feedback 285
Example: 45
o
Phase Margin Compensation
2 p PM
e e =
CH 12 Feedback 286
Miller Compensation
To save chip area, Miller multiplication of a smaller
capacitance creates an equivalent effect.
c O O m eq
C r r g C )] || ( 1 [
6 5 5
+ =

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