by

I.BHARGAVA RAO B.HARISH D.RAGHU VARMA R.SATISH

INTRODUCTION

In a single-phase half-bridge inverter, only two switches are needed. To avoid shoot-through fault, both switches are never turned on at the same time. S1 is turned on and S2 is turned off to give a load voltage

The multilevel topologies can be classified into three main categories. They are 1. Neutral point clamped (NPC) 2. Flying capacitors (FC)

3. Cascaded H-bridge(CHB) converters.

NPC converters also known as three-level inverters. Problems of 2level inverter in high-power applications.
High

DC link voltage requires series connection of devices.

in dynamic voltage sharing during switching.

Difficulty

These problems are solved by using NPC inverter or multilevel inverter.

Maynard and Foch introduced a flying-capacitor-based

inverter in 1992. The structure of this inverter is similar to that of

the diode-clamped inverter except that instead of using clamping diodes, the inverter uses capacitors in their place. The circuit

topology of the flying capacitor multilevel inverter. This topology

has a ladder structure of dc side capacitors, where the voltage on each capacitor differs from that of the next capacitor. The voltage increment between two adjacent capacitor legs gives the size of the voltage steps in the output waveform.

A single-phase structure of an m-level cascaded inverter is

illustrated in Figure .Each separate dc source (SDCS) is connected

to a single-phase full-bridge, or H-bridge, inverter. Each inverter level can generate three different voltage outputs, +Vdc, 0, and Vdc by connecting the dc source to the ac output by different combinations of the four switches, S1, S2, S3, and S4. To obtain +Vdc, switches S1 and S4 are turned on, whereas Vdc can be obtained by turning on switches S2 and S3. By turning on S1 and S2 or S3 and S4, the output voltage is 0.

Single-phase structure of a multilevel cascaded H-bridges inverter

The neutral point converter proposed by Nabae, Takahashi, and Akagi in

1981 was essentially a three-level diode-clamped inverter. In the 1990s several researchers published articles that have reported experimental results for four-,

five-, and six-level diode-clamped converters for such uses as static VAR
compensation, variable speed motor drives, and high-voltage system

interconnections.

A three-phase six-level diode-clamped inverter is shown in Figure2.9.

Each of the three phases of the inverter shares a common dc bus, which has been subdivided by five capacitors into six levels. The voltage across each capacitor is

Vdc, and the voltage stress across each switching device is limited to Vdc through
the clamping diodes. Table lists the output voltage levels possible for one phase of the inverter with the negative dc rail voltage V0 as a reference.

Selective harmonic elimination pulse width modulation (SHEPWM) method is systematically applied for the first time to

multilevel series-connected voltage-source PWM inverters. The

method is implemented based on optimization techniques. The optimization starting point is obtained using a phase-shift harmonic suppression approach. The commonly available switching technique is selective harmonic elimination (SHE) method at fundamental frequency, for which transcendental equations characterizing harmonics are solved to compute switching angles.

The considered hybrid topology is composed by a traditional three-phase, three-level NPC inverter, connected with a

single phase H-bridge inverter in series with each output phase. The
power circuit is illustrated in Fig, wit In the hybrid topology considered, the NPC inverter provides the total active power flow. For high-power medium voltage NPC, there are advantages to using latching devices such IGCTs rather than IGBTs, due to their lower losses and higher voltage blocking capability imposing a restriction on the switching frequency. h only the H-bridge of phase a shown in detail.

Hybrid topology power circuit

Three-level SHE is an established and well documented modulation strategy. A qualitative phase output voltage waveform is presented in Grph.3.1 considering a 5-angle realization, so five degrees of freedom are available. This enables the amplitude of the fundamental component to be controlled and four harmonics to be eliminated. Since a three-phase system is considered, the triple harmonics are eliminated at the load by connection, and hence, they do not require elimination by the modulation pulse pattern. Thus, the 5th, 7th, 11th and 13th harmonics are chosen for elimination.

Each series H-bridge converter is independently controlled by two complementary references, as shown in Fig. The first

reference) corresponds to the inverse of the harmonics remaining

from the SHE pulse pattern, calculated as describe in the previous section from the difference between the NPC pulsed voltage pattern and its sinusoidal voltage reference.

Simplified H-bridge circuit for dynamic modeling of dc-link voltage

H-bridge control diagram for phase a

In regenerative operation, such as active front end applications for regenerative drives, the power flow needs to be controlled bidirectional. This is possible due to the interaction between the converter and load voltages through the grid impedance,

usually an inductive filter.

Simulation circuit of the NPC inverter

circuit of the NPC inverter with H-Bridge

Experimental results are gained feeding a linear load with values RL = 10 and LL = 3mH with the 1kW prototype. As previously discussed in section III-C, the converter is operated with Vdc = 180V , while the H-Bridge dc-link voltage reference was set to 30V.

This

section

presents

results

to

ascertain

converters

performance under closed loop conditions. First, the converter is run

without the use of the series H-bridges (for comparison purposes only), and the results are shown in graph. It can be clearly seen that the output

voltage of the converter.

Graph presents simulation results for the hybrid topology and

control method when it is used as an active rectifier connecting a 115V line-to-line grid through a line impedance Of Ls = 1:5mH and Rs = 0:2. Note that at t = 0:14s, a change from feed to regenerative load mode has been demanded. This results in the change in polarity of the input

current ia and in the NPC-SHE voltage output va0N.