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Department of Electronics and Communication Engineering,

Manipal Institute of Technology, Manipal, INDIA


MODULE 3

Bipolar Junction Transistor



BASIC ELECTRONICS
Department of Electronics and Communication Engineering,
Manipal Institute of Technology, Manipal, INDIA
Syllabus
Introduction to Bipolar Junction Transistor
BJT Operation
BJT Configurations
Tutorials
BJT Biasing
Tutorials
BJT Amplifier
Tutorials
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Reference Books
1. Electronic Devices and Circuit Theory by
Boylestad & Nashelsky,
2. Integrated Electronics by Millman & Halkias,
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Introduction
Solid state transistor was invented by a team of scientists at
Bell laboratories during 1947-48
It brought an end to vacuum tube era
Advantages of solid state transistor over vacuum devices:
Smaller size, light weight
No heating elements required
Lower power consumption and operating voltages
Low price
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Introduction
Figure showing relative sizes of
transistor, IC and LED
Figure showing different transistor packages
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Introduction
Bipolar Junction Transistor (BJT) is a sandwich consisting of
three layers of two different types of semiconductor
Two kinds of BJT sandwiches are: NPN and PNP
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Introduction
The three layers of BJT are called Emitter, Base and Collector
Base is very thin compared to the other two layers
Base is lightly doped. Emitter is heavily doped. Collector is
moderately doped
NPN Emitter and Collector are made of N-type
semiconductors; Base is P-type
PNP Emitter and Collector are P-type, Base is N-type
Both types (NPN and PNP) are extensively used, either
separately or in the same circuit

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Introduction
Transistor symbols:
Note: Arrow direction from P to N (like diode)
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Introduction
BJT has two junctions Emitter-Base (EB) Junction and
Collector-Base (CB) Junction
Analogous to two diodes connected back-to-back:
EB diode and CB diode
The device is called bipolar junction transistor because
current is due to motion of two types of charge carriers free
electrons & holes
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Transistor Operation
Operation of NPN transistor is discussed here; operation of
PNP is similar with roles of free electrons and holes
interchanged
For normal operation (amplifier application)
EB junction should be forward biased
CB junction should be reverse biased
Depletion width at EB junction is narrow (forward biased)
Depletion width at CB junction is wide (reverse biased)
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Transistor Operation
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Transistor Operation
Un-biased transistor showing barriers at the junctions
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Transistor Operation
C-B junction is reverse biased increased barrier height
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Transistor Operation
E-B junction is forward biased aids charge flow
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Transistor Operation
Electron-hole combination leads to small base current
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Transistor Operation
When EB junction is forward biased, free electrons from
emitter region drift towards base region
Some free electrons combine with holes in the base to form
small base current
Inside the base region (p-type), free electrons are minority
carriers. So most of the free electrons are swept away into the
collector region due to reverse biased CB junction
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Transistor Operation
Three currents can be identified in BJT
1. Emitter current
This is due to flow of free electrons from emitter to base
Results in current from base to emitter
2. Base current
This is due to recombination of free electrons and holes in the base
region
Small in magnitude (usually in micro amperes)
3. Collector current
Has two current components:
One is due to injected free electrons flowing from base to collector
Another is due to thermally generated minority carriers
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Transistor Operation
Note the current directions in NPN and PNP transistors
For both varieties: ---(1)
C
E
B
I
C
I
E
I
B
NPN
C
E
B
I
C
I
E
I
B
PNP
B C E
I I I + =
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Transistor Operation
As noted earlier, collector current has two components:
One due to injected charge carriers from emitter
Another due to thermally generated minority carriers
Both results in current in the same direction. Hence
--- (2)


dc
is the fraction of charge carriers emitted from emitter, that
enter into the collector region
I
CBO
is the reverse saturation current in CB diode
--- (3)
CBO E dc C
I I I + =o
E
CBO C
dc
I
I I
= o
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Transistor Operation
As approximation, we can neglect I
CBO
compared to I
E
and I
C
Hence approximate equations are:



Like the reverse saturation current of ordinary diode, I
CBO
also
doubles for every 10
o
rise in temperature.
So I
CBO
cannot be neglected at higher temperatures
The parameter
dc
is called common-base dc current gain
Value of
dc
is around 0.99
E dc C
I I o =
E
C
dc
I
I
= o
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Transistor Operation
We have
Substituting for I
E
, we get
CBO E dc C
I I I + =o
( )
CBO B C dc C
I I I I + + =o
CBO B dc C dc
I I I + = o o ) 1 (
) 1 ( ) 1 (
dc
CBO
B
dc
dc
C
I
I I
o o
o

=
CEO B dc C
I I I + = |
Where and
) 1 (
dc
dc
dc
o
o
|

= ( )
CBO dc
dc
CBO
CEO
I
I
I 1
) 1 (
+ =

= |
o
--- (4)
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Transistor Operation
Equations (2) and (4) are two alternate forms of BJT current
equation
Since value of
dc
is around 0.99, I
CEO
>> I
CBO
However, I
CEO
is still very small compared to I
C
Hence approximation of (4) gives: or

Parameter
dc
is called common emitter dc current gain
Values of
dc
and
dc
vary from transistor to transistor. Both

dc
and
dc
are sensitive to temperature changes
B dc C
I I | =
B
C
dc
I
I
= |
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Problems
1. A BJT has alpha (dc) 0.998 and collector-to-base reverse sat
current 1A. If emitter current is 5mA, calculate the
collector and base currents. (Ans: 4.99 mA, 10 A)
2. An npn transistor has collector current 4mA and base current
10 A. Calculate the alpha and beta values of the transistor,
neglecting the reverse sat current I
CBO
(Ans: 0.9975, 400)

3. In a transistor, 99% of the carriers injected into the base
cross over to the collector region. If collector current is
4mA and collector leakage current is 6 A, Calculate emitter
and base currents (Ans: 4.034 mA, 34 A)
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Transistor Configurations
BJT has three terminals
For two-port applications, one of the BJT terminals needs to
be made common between input and output



Accordingly three configurations exist:
Common Base (CB) configuration
Common Emitter (CE) configuration
Common Collector (CC) configuration
(The last one is not discussed in this course)
Input Output
2-port
device
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Transistor Configurations
Common Base configuration
(Resistors are not shown here
for simplicity)
Base is common between input and output
Input voltage: V
EB
Input current: I
E
Output voltage: V
CB
Output current: I
C
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Transistor Configurations
CB Input characteristics
A plot of I
E
versus V
EB

for various values of V
CB
It is similar to forward
biased diode
characteristics
As V
CB
is increased, I
E

increases only slightly
Note that second letter in
the suffix is B (for base)
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Transistor Configurations
const V with
I
V
r
CB
E
EB
i
A
A
=
const I with
V
V
A
E
EB
CB
V
A
A
=
Input resistance r
i
Voltage amplification factor A
V
Both can be determined from the CB input characteristics
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Transistor Configurations
2 1
2 1
E E
EB EB
i
I I
V V
r

=
2 1
2 1
EB EB
CB CB
V
V V
V V
A

=
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Transistor Configurations
CB Output characteristics
A plot of I
C
versus V
CB
for various values of I
E
Three regions are identified: Active, Cutoff, Saturation
Active region:
E-B junction forward biased
C-B junction reverse biased
I
C
is positive, V
CB
is positive
I
C
increases with I
E
For given I
E
, I
C
is almost constant; increases only
slightly with increase in V
CB
. This is due to base-width
modulation (Early effect)
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Transistor Configurations
CB Output characteristics

1.Active Region
2.Saturation Region
3.Cut off Region

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Transistor Configurations
Base Width modulation
As the reverse bias voltage V
CB
is increased, the depletion
region width at the C-B junction increases. Part of this
depletion region lies in the base layer. So, effective base
width decreases. Hence number of electron-hole
combination at the base decreases. So base current reduces
and collector current increases.
Note that I
E
= I
C
+ I
B
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Transistor Configurations
When I
E
= 0, I
C
= I
CBO
I
CBO
is collector to base current with emitter open
Below this line we have cut-off region
Here both junctions are reverse biased
Region to the left of y-axis (V
CB
negative) is saturation region
Here both junctions are forward biased
I
C
decreases exponentially, and eventually changes
direction
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Transistor Configurations
Both can be measured from output characteristics
const I with
I
V
r
E
C
CB
O
A
A
=
Output resistance r
o
Current amplification factor A
I
or
ac
const V with
I
I
CB
E
C
ac
A
A
= o
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Transistor Configurations
Common Emitter configuration
(Resistors are omitted for simplicity)
Emitter is common between input and output
Input voltage: V
BE
Input current: I
B
Output voltage: V
CE
Output current: I
C
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Transistor Configurations
CE input characteristics

Plot of I
B
versus V
BE
for
various values of V
CE
Similar to diode
characteristics
As V
CE
is increased, I
B

decreases only slightly
This is due to base-width
modulation
Note that second suffix is E
(for emitter)
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Transistor Configurations
CE output characteristics
A plot of I
C
versus V
CE
for various values of I
B
Three regions identified: Active, Cut-off, Saturation
Active region:
Linear region in the output characteristics
E-B junction forward biased
C-B junction reverse biased
I
C
increases with I
B
For given I
B
, I
C
increases slightly with increase in V
CE
;
this is due to base-width modulation (Early effect)
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Transistor Configurations
CE output characteristics
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Transistor Configurations
Note that V
CE
= V
CB
+ V
BE
So if V
CE
is increased, effectively V
CB
also increases
For saturation to take place, C-B junction should be forward
biased.
This happens when V
CE
is approximately 0.3 V (or less) for Si
Note that when V
CE
= 0.3V, and V
BE
= 0.6 V, V
CB
= 0.3V (a
forward bias of 0.3 V)
So region to the left of the vertical line V
CE
=V
CE(sat)
=0.3V (for
silicon) is considered as saturation region
Region below I
B
=0 line (or I
C
=I
CEO
) is cut-off region
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Transistor Configurations
I
CEO
is much larger than I
CBO
because of the relation:
dc
CBO
CEO
I
I
o
=
1
Note that value of
dc
is around 0.99
The values of
dc
&
ac
, and
dc
&
ac
are almost the same.
Hence the subscripts can be omitted for simplicity
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Transistor Configurations
Input resistance r
i
Voltage gain A
V
Output resistance r
o
Current gain A
I
or
ac
const V with
I
V
r
CE
B
BE
i
=
A
A
=
const I with
V
V
A
B
BE
CE
V
=
A
A
=
const I with
I
V
r
B
C
CE
o
=
A
A
=
const V with
I
I
CE
B
C
ac
=
A
A
= |
All these parameters can be determined from CE characteristics

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Transistor Configurations
Experimental
setup for
determining CE
characteristics:
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Tutorials
1. A Ge transistor with = 100 has collector-to-base leakage
current of 5 A. If the transistor is connected in common-
emitter operation, find the collector current for base current
(a) 0 (b) 40 A.
Sol: Given that I
CBO
= 5A, and = 100
We know that

When I
B
= 0, I
C
= I
CEO
= (+1)I
CBO
= 505 A
When I
B
= 40 A, I
C
= I
B
+ I
CEO

= (100 40 10
6
) + (505 10
6
)
= 4.505 mA

CEO B dc C
I I I + = |
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Tutorials
2. A Ge Transistor has collector current of 51 mA when the base
current is 0.4 mA. If = 125, then what is its collector cutoff
current I
CEO
? (Ans: 1 mA)
3. In a transistor circuit, when the base current is increased from
0.32 mA to 0.48 mA, the emitter current increases from 15 mA
to 20 mA. Find
ac
and
ac
values. (Ans: 0.968, 30.25)
4. A transistor with = 0.98 and I
CBO
= 5 A has I
B
= 100 A.
Find I
C
and I
E
. (Ans: 5.15 mA, 5.25 mA)

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Transistor Biasing
What is meant by biasing the transistor?
Applying external dc voltages to ensure that transistor
operates in the desired region
Which is the desired region?
For amplifier application, transistor should operate in active
region
For switch application, it should operate in cut-off and sat.
What is meant by quiescent point (Q-point)?
The point we get by plotting the dc values of I
C
, I
B
and V
CE

(when ac input is zero) on the transistor characteristics
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Transistor Biasing
Transistor characteristics
showing Q-point
Q-point is in the middle
of active region.
This is called Class-A
operation. (Other classes
are discussed later)
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Transistor Biasing
Types of biasing:
Fixed bias and Self bias
Fixed bias:
The value of I
B
is fixed by choosing
proper value for R
B
Equations to consider are:
B
BE CC
B
R
V V
I

=
C C CC CE
R I V V =
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Transistor Biasing
Pros and Cons of Fixed bias:
Pros: 1) Simple circuit
2) Uses very few resistors

Cons: Q-point is unstable
1) If temperature increases, then increases, and
hence I
CQ
and V
CEQ
vary (effectively Q-point shifts)
2) If the transistor is replaced with another
transistor having different value, then also Q-point shifts
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Transistor Biasing
Load Line
We have:
C C CC CE
R I V V =
This is an equation of straight line with points V
CC
/R
C
and
V
CC
lying on y-axis and x-axis respectively
This line is called Load line because it depends on
resistor R
C
considered as Load and V
CC

Intersection of load line and transistor characteristic curve
is the Q-point or operating point
This point is the common solution for characteristics and
load line equation
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Transistor Biasing
Variation in load line with
circuit parameters V
CC
, R
C

and R
B
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Transistor Biasing
Voltage divider bias or Self bias
Resistor R
E
connected between
emitter and ground
Voltage-divider resistors R
1
& R
2

replace R
B
Circuit can be analyzed in two
methods:
Exact method (using
Thevenins theorem)
Approximation method
(neglecting base current)
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Transistor Biasing
Exact method:
Input side of self-bias
(Fig. a) transformed into
Thevenins equivalent
circuit (Fig. b) where,
R
TH
is the resistance
looking into the
terminals A & B (Fig. c)
and V
TH
is given by:
2 1
2
R R
R V
V
CC
TH
+
=
2 1
2 1
2 1
||
R R
R R
R R R
TH
+
= =
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Transistor Biasing
E TH
BE TH
B
R R
V V
I
) 1 ( + +

=
|
E
BE TH
B
R
V V
I
|

~
E
BE TH
B C
R
V V
I I

= = |
Equations to consider:
Since >> 1 and (+1)R
E
>> R
TH
Since I
C
is almost independent of ,
Q-point is stable
Self-bias circuit redrawn with input side
replaced by Thevenins equivalent :
E E C C CC CE
R I R I V V =
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Transistor Biasing
Approximate analysis:
Carried out only if R
E
10R
2
I
B
is negligible compared to I
1
and I
2
So,
E E C C CC CE
R I R I V V =
2 1
2
R R
R V
V
CC
B
+
=
E
BE B
E
R
V V
I

=
E C
I I o =
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Tutorials
1. For a fixed bias circuit using Si transistor, R
B
= 500 k, R
C
= 2 k, V
CC
=
15 V, I
CBO
= 20 A and = 70. Find the collector current I
CQ
and V
CEQ
at
Q-point. Take V
BE
as 0.7 V. (Ans: 3.422mA, 8.156V)
2. A Si transistor is biased for a constant base current. If = 80, V
CEQ
= 8 V,
R
C
= 3 k and V
CC
= 15 V, find I
CQ
and the value of R
B
required.
(Ans: 2.33 mA, 493 K)
3. Repeat problem 2 if the transistor is a germanium device. (V
BE
=0.3V)
(Ans: 2.33 mA, 507 K)
4. For a fixed bias circuit, V
CC
= 12 V and R
C
= 4 k. The Ge transistor used
is characterized by = 50, I
CEO
= 0 and V
CE

sat
= 0.2 V. Find the value of
R
B
that just results in saturation. (Ans: 198.3K)
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Tutorials
5. For a self bias circuit using silicon transistor, R
E
= 300 , R
C
= 500 ,
V
CC
= 15 V, = 100 and . If 10R
2
= R
E
, then determine the value of R
1

to get V
CEQ
= V
CC
/ 2. (Ans: 9.85K)
6. For a self bias circuit, the transistor is a Si device, R
E
= 200 , R
1
=
10R
2
= 10 k, R
C
= 2 k, = 100 and V
CC
= 15 V. Determine the
values of I
CQ
and V
CEQ
.
7. Suppose if the transistor used in problem 6 failed, and was replaced with
a new transistor with = 75. Is the new transistor still biased for active
region operation?
8. A self bias circuit uses Si transistor, R
C
= 330 , R
E
= 100 and V
CC
=
12 V. Estimate the values of R
1
and R
2
required to provide a base
current of 0.3 mA, so as to locate the operating point at I
CQ
= 18 mA and
V
CEQ
= 4.25 V.
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Transistor Amplifier
Amplifier
Device which gives larger swing in output voltage
proportional to the input voltage swing
BJT basically amplifies current: Collector current equals
beta times Base current
With proper circuit designs, we can get voltage
amplification and power (both voltage and current)
amplification
For faithful amplification (no distortion), BJT should
operate in Active region throughout the input cycle (Class
A)
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Transistor Amplifier
Without any bias,
transistor is in cut-off
(I
C
=0, V
CE
=0)
Biasing circuit fixes the
operating point in the
middle of active region
required for faithful
amplification
Figure shows common-
emitter amplifier circuit
employing fixed bias
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Transistor Amplifier
With reference to the fig in previous slide, as input voltage v
in

varies, i
in
varies, thus base current i
B
varies
This variation in base current is amplified beta times to get
variation in collector current i
C
Output voltage v
out
is V
CC
i
C
R
C
Note that if v
in
increases, there is proportional decrease in v
out
,
but of greater magnitude
Similarly if v
in
decreases, v
out
increases proportionally
Thus output voltage of CE amplifier is 180
o
out of phase with
input voltage
(Note that small letters are used to represent ac quantities)
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Transistor Amplifier
Voltage gain or voltage
amplification factor is v
out
/v
in

which is dependent on , R
C

and other physical parameters
of the transistor
Figure shows input and output
waveforms for the amplifier
circuit shown previously
Note the dc shift in the output
voltage waveform. i.e., when
v
in
= 0, v
out
= V
CEQ
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Transistor Amplifier
This
animation
shows the
working of
Common
Emitter
transistor
circuit
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Transistor Amplifier
Gain of the amplifier is usually expressed in decibels
(A
V
)
dB
= 20 log
10
| A
V
|
Usually a gain of 100 (i.e., 40 dB) can be obtained using single
transistor. For higher gain requirement, two or more amplifier
stages are to be cascaded
Overall gain is product of individual gains; But when expressed
in dB, overall gain is sum of individual gains (in dB)
VN V V V
A A A A ....... .
2 1
=
dB VN dB V dB V dB V
A A A A ) ( ....... ) ( ) ( ) (
2 1
+ + + =
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Transistor Amplifier
RC coupling
Fig shows CE amplifier
employing self bias
Additional components
are C
C
and C
E
C
C
is called coupling
capacitor used to
prevent dc component
from entering or leaving
amplifier stage
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Transistor Amplifier
C
E
is called emitter bypass capacitor used to bypass the
ac emitter current preventing it from flowing through R
E
If ac emitter current is allowed to pass through R
E
, then v
BE

reduces and hence output voltage reduces

Frequency response of amplifier
Its important to know the behavior of amplifier at different
frequencies
Gain is NOT constant at all frequencies depends on
various factors
Frequency response is a plot of gain versus frequency
Department of Electronics and Communication Engineering,
Manipal Institute of Technology, Manipal, INDIA
Transistor Amplifier
Figure shows frequency
response plot
At lower and higher
frequencies, gain is less
Gain attains const value
at mid frequencies
Bandwidth of amplifier is
range of frequencies over
which gain is not less
than 3 dB of maximum
gain
20 log | 0.707 A
VO
| = 20 log | A
VO
| 3
Department of Electronics and Communication Engineering,
Manipal Institute of Technology, Manipal, INDIA
Transistor Amplifier
Analysis of frequency response curve
At very low frequencies, reactance of coupling capacitors is
high, hence there is loss of signal voltage across capacitors,
resulting in reduced gain
Also at low frequencies, emitter bypass capacitor does not
fully bypass the ac emitter current, hence ac voltage drop
develops across R
E
, resulting in reduced gain
At very high frequencies, shunt capacitances due to wiring
and inter-layer junction capacitances will be prominent,
hence resulting in signal loss
At mid frequencies, gain is maximum and constant
Department of Electronics and Communication Engineering,
Manipal Institute of Technology, Manipal, INDIA
Transistor Amplifier
Classification of amplifiers:
Based on mode of operation:
Class A: collector current flows throughout the complete input
cycle (360
o
); Q-point is in the centre of active region (no distortion)
Class B: collector current flows during (positive or negative) half
cycle of input; Q-point is at just cut-off or just saturation
Class AB: collector current flows for more than half cycle, but less
than full cycle of input waveform; Q-point is near cut-off or near
saturation
Class C: collector current flows for less than half cycle of input
waveform; Q-point is in deep cutoff or deep saturation
(For classes B, AB and C, output is distorted or clipped)
Department of Electronics and Communication Engineering,
Manipal Institute of Technology, Manipal, INDIA
Tutorials
1. A three-stage amplifier circuit has first stage gain of 45 dB,
second stage gain of 50 dB and third stage gain of 5 dB.
What is the overall gain? If input to the first stage is 0.1mV,
what is the output of final stage?
2. An amplifier has maximum gain of 200 and bandwidth of
500 kHz. If lower cutoff freq is 50 Hz, what is the upper
cutoff freq and gain at this frequency?
3. Design a self bias circuit, given the following parameters:
I
C
=1mA, V
CC
=12V, V
CE
=V
CC
/2, V
B
=V
CC
/10, beta=100,
V
BE
=0.6V, R
2
=2K
Department of Electronics and Communication Engineering,
Manipal Institute of Technology, Manipal, INDIA
End of Module 3