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OUTLINE
INTRODUCTION

FLOORPLAN BACKGROUND
PROBLEM STATEMENT O-TREE

LOCAL SEARCH METHOD


MEMETIC ALGORITHM EMPIRICAL STUDIES ON THE MA

CONCLUSION
FUTURE SCOPE REFERENCES
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INTRODUCTION
Floorplanning is an important problem in Very Large scale Integrated-Circuit (VLSI) design automation as it

determines the performance, size, yield, and reliability of VLSI chips This presentation addresses Memetic Algorithm for VLSI Floorplanning problem, which quickly produces optimal solution for all the tested benchmark problems. MA is a hybrid genetic algorithm that uses an effective genetic search method to explore the search space and an efficient local search method to exploit information in the search space.
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Floorplan Background
VLSI is a process used to build electronic components such as microprocessors and memory chips comprising millions of transistors The first stage of the VLSI design process typically produces a set of indivisible rectangular blocks called

cells In a second stage, interconnection information is used to determine the relative positions of these cells The third stage, Floorplan optimization

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I/O Pads

Floorplan

Module a
Module b Block a Module c Chip Planning GND Block Pins Block b Block d VDD Block c

Module d

Block e

Module e Supply Network

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Example
Given: Three blocks with the following potential widths and heights Block A: w = 2, h = 2 Block B: w = 1, h = 2 or w = 2, h = 1 Block C: w = 1, h = 3 or w = 3, h = 1 Task: Floorplan with minimum total area enclosed
C A B

B A

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Example
Given: Three blocks with the following potential widths and heights Block A: w = 2, h = 2 Block B: w = 1, h = 2 or w = 2, h = 1 Block C: w = 1, h = 3 or w = 3, h = 1 Task: Floorplan with minimum total area enclosed

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Example
Given: Three blocks with the following potential widths and heights Block A: w = 2, h = 2 Block B: w = 1, h = 2 or w = 2, h = 1 Block C: w = 1, h = 3 or w = 3, h = 1 Task: Floorplan with minimum total area enclosed

Solution: Aspect ratios Block A with w = 2, h = 2; Block B with w = 2, h = 1; Block C with w = 1, h = 3 This floorplan has a global bounding box with minimum possible area (9 square units).
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Slicing floorplan representation is a rectangular


dissection obtained by repeatedly dividing each rectangle, starting with the entire chip area, into two smaller rectangles Horizontal or vertical cut line.
Slicing floorplan and two possible corresponding slicing trees

V c e f d a H b c d H H V a H b

V H d c f e H V f
9

e
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Non-slicing floorplans (wheels)

W b c e

b a
e c

a d d

W H

Wheel (4 objects cycled around a center object)

Nonsilicing representation contribute better results than slicing representation.


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PROBLEM STATEMENT
A module mi is a rectangular block with fixed height

hi and width wi, M = {m1,m2, . . . , mn} is a set of modules, and N is a net list specifying interconnections between the modules in M A floorplan F is an assignment of M onto a plane such that no module overlaps with another.

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PROBLEM STATEMENT
Minimize cost(F)
Area(F) = area of the smallest rectangle enclosing all the

modules Wire length(F)= total length of the wires fulfilling the interconnections specified by N Area - Estimated minimal area Wire length - Estimated minimal interconnection cost w1 and w2 are weights assigned to the area minimization objective and the interconnection minimization objective where 0 w1, w2 1, and w1 + w2 = 1.
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Why O-Tree Representation Method ?


Motivation
Simple representation of geometric relationship for non-

slicing floorplan Satisfy cost function that includes area and amount of interconnect Benefits of O-tree Representation Transformation between O-tree and constraint graph is O(n) One instance of O-tree maps to one placement. Can easily incorporate interconnect and area costs Fast deterministic algorithm for operation on O-Tree
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What is an O-tree?
A floorplan with n rectangular modules can be represented in a horizontal(vertical) O-tree of (n+1) bocks, of which n nodes correspond to n modules m1,m2,,mn and one node corresponds to left boundary of the problem.

There exists a directed edge from module m to mj iff xj = xi + wi so that there is no overlapping of modules where xi, xj are left edge coordinate of mi, mj and wi is width of mi. mi mj
xi
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wi

xj
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Encoding

(T, ) = (00110100011011, adbcegf)


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Horizontal O-tree

(00110100011011, adbcegf)
The root represents the left-boundary of the chip
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Admissible Floorplan
If no module can be shifted left or bottom without moving other modules in the Floorplan.
L-Compact: no block can

shift left from its original position with other components fixed B-Compact: no block can shift down from its original position with other components fixed LB-Compact: placement that is both L-Compact and BCompact A placement is admissible if it is LB-Compact
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Admissible O-tree

O-tree

is admissible if its corresponding floorplan is admissible Given an admissible O-tree, it is equal to the shortest path spanning tree.
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Local Search Method


Initially there is an floorplan encoded in an O-tree (T, ), the local search method finds a local optimal solution through systematically examining O-trees. 1) For each node mi in (T, ): a) delete m i from (T, ); b) insert mi in the position where we can get the smallest cost value among all possible insertion positions in (T, ) as an external node of the tree; 2) Output (T, ).
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Memetic Algorithm
Initialize population

While (Stopping criteria)


Evaluate fitness of each individual Select parents

Produce children
Apply local search

(This is additional step compared to GA. Local search is used optimize selected individuals so that it can lead to convergence faster) Advance to next generation
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MEMETIC ALGORITHM
MA is a hybrid GA that uses genetic search method to explore the search space and uses a local search method to exploit information in the search region.

The exploration and exploitation are balanced by a bias search strategy.

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MEMETIC ALGORITHM
Representation of individual
Fitness Function Initial Population

Genetic Operators
Local Search Description of the MA

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Representation of individual
an admissible oorplan represented by an O-tree

and encoded in a tuple (T, ) T is a 2n-bit string identifying the structure of the O-tree , and is a permutation of the nodes
Fitness function
f((T, )) = 1/ cost (F(T, ))

Initial population
Randomly generate a sequence of modules and

insert into the O-tree in the same order such that the cost is optimum for its insertion Repeat above to get each individual
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Genetic Operators

In GA, crossover is used for both exploration and exploitation, and mutation is used for exploration. In MA, the crossover and mutation operators are used only for exploration, or discovering new promising search regions by evolving memes. Meme : Sub tree
Crossover Mutations
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Crossover

One sub tree selected from one parent and remaining from other parent

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Mutation

One top level sub tree is identified and its order is changed

randomly.
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It randomly select a sub tree at any level, remove it and insert it back to O-tree.
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Local search
A Local search method discussed earlier is used.
Individuals optimized

satisfying

certain

criteria

is

Different individuals may lead to same optimum

point. Those individuals which are more closer to optimum(i.e. higher fitness) is better choice for optimization

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Strategy to bias the search


As the number of optima might grow exponentially

when the size of the problem increases. Hence, it is impossible for MA to exploit all the regions. A technique that is usually used to deal with the problem is to use a bias search strategy Instead of exploiting all the search points generated by the genetic operators, MA only exploits those search points (admissible floorplans) whose fitness value is equal to or greater than a threshold v and ignores those search points whose fitness value is less than v.
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Strategy to bias the search


If Fitness value >= threshold then exploit (optimize) it

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Algorithm for MA
1) t := 0; 2) generate an initial population P(t) of size PopSize; 3) evaluate all individuals in P(t) and find the best individual best 4) while the preset runtime is not up: a) t := t + 1; b) for each individual in P(t): i) this individual becomes the first parent p1; ii) select a second parent using roulette wheel selection p2; iii) probabilistically apply crossover to produce a child c1; iv) if fitness(c1) v, then optimize c1 using the local search method; v) if fitness(c1) fitness(p1), then p1 := c1; vi) if fitness(c1) fitness(best), then best := c1; vii) probabilistically apply the two mutations (picked up randomly) on c1 to produce a new individual f; viii) if fitness(f) v, then optimize f using the local search method; ix) if fitness(f) fitness(p1), then p1 := f; x) if fitness(f) fitness(best), then best := f. 5) output best.
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EMPIRICAL STUDIES ON THE MA


Two popular benchmarks are used here to
1. Study the performance of the MA 2. The Effectiveness of the Threshold Strategy

The benchmarks used in the empirical studies are two

popular MCNC (Microelectronics Center of North Carolina) benchmark problems for the VLSI Floorplanning problem: ami33 and ami49 ami33 has 33 modules, 123 nets, 480 pins, and 42 IO pads ami49 has 49 modules, 408 nets, 931 pins, and 42 IO pads.

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Performance of the MA

Improvements of MA Best Solution Over mDA (multistart Deterministic Algo) 1.10% to 2.94% Average Solution 0.36% to 2.46%

Over GA

1.55% to 4.23 %

1.85% to 5.56 %

mDA generates search points randomly, whereas MA generate using genetic operators.
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Dynamic Performance Comparison for benchmark ami33


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Dynamic Performance Comparison for benchmark ami49


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Tradeoff Between the Two Optimization Objectives

Observations 1. MA is Sensitive to configuration 2. Two Objectives are mutually Constrained with each other
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CONCLUSION
Presented

an MA for a non-slicing VLSI Floorplanning problema challenging optimization problem in VLSI design automation. The exploration and exploitation are balanced by a threshold bias search strategy. Experimental results have shown that the MA outperforms both the mDA and GA for the benchmark problems.

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Future Scope
Dynamic threshold bias search strategies
It is conjectured that if v can dynamically

change in the light of the status of the population of the MA, the performance of the MA could be further improved. Improving the crossover operator such that it can effectively preserve good memes contributing to both area and interconnection minimizations.

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References
P.N.

Guo, C.K. Cheng, and T. Yoshimura, " An O-Tree Representation of Nonslicing Floorplan and Its Applications, ACM/IEE Design Automation Conf. pp. 268-273, June 1999. Maolin Tang, and Xin Yao, A Memetic Algorithm for VLSI Floorplanning, IEEE TRANSACTIONS ON SYSTEMS, MAN, AND CYBERNETICS, VOL. 37, NO. 1, FEB 2007 P.-N. Guo, T. Takahashi, C.-K. Cheng, and T. Yoshimura, Floorplanning using a tree representation, IEEE Trans. Comput.Aided Design Integr. Circuits Syst., vol. 20, no. 2, pp. 281289, Feb. 2001. M. Rebaudengo and M. Reorda, GALLO: A genetic algorithm for floorplan area optimization, IEEE Trans. Comput.-Aided Design Integr. Circuits Syst., vol. 15, no. 8, pp. 943951, Aug. 1996.

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Thank You
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