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MPRG MPRG

Direct Digital Synthesis (DDS)



Dr. Jeffrey H. Reed
Mobile and Portable Radio
Research Group (MPRG)
Virginia Tech
Bradley Dept. of Electrical and
Computer Engineering
reedjh@vt.edu
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Overview
Introduction to Direct Digital
Synthesis
Approaches to DDS
Pulse output DDS
ROM lookup table
Impulse response of a filter
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Overview
Advanced techniques: Bandpass
signal generation
Sources of spurious signals and their
effects
Techniques used to minimize
spurious signals
Generation of Random Sequences
Summary and Future Trends
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Introduction to DDS
Direct digital synthesis (DDS) is the
process of generating deterministic
communication carrier/reference
signals directly in discrete time with the
use of digital hardware
Discrete time signals are then
converted into analog signals (for
transmission) using a D/A converter
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Need for DDS systems
Overcome the limitations of
analog synthesis
Speed, precision, size, flexibility,
stability, and ease of
implementation
Compatible with and desirable
for todays high speed digital
communication technology
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Early DDS Systems
First DDS designs date back to the early
70s
Tierney et. al. developed a technique for
generating audio signals
Used a Read Only Memory (ROM) to
store sine waves
Stored values were used to drive a D/A
followed by analog interpolation filter
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Early DDS Systems
Roke Manor laboratories in 1981
of the then Plessey companys
prototype DDS
Occupied several complete boards
of logic laid out on the bench
Clocked at 10MHz
Output frequency of up to 3MHz
Spurious responses about 40 dB
below the desired output
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Modern DDS Systems
Gained importance in the early 80s
with the widespread use of digital
communication systems
Have incorporated a lot of changes and
improvements making them a practical
alternative to analog signal sources
GHz frequencies possible, spurs of -60
to -80 dB or lower
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Analog Generation
Techniques
Direct Analog Synthesis (DAS)
Generate frequencies by mixing
frequencies from different crystal
and/or using their harmonics
Ideal situation with tuning
capabilities of LC oscillator and
stability and purity of a crystal
oscillator
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Characteristics
Advantages
High purity, low spurious content: better
than -80 dB
Fast switching: .1 - 20 s
Disadvantages
Bulky, expensive, high power
consumption
Not suitable for portable equipment
Used in medical and radar imaging,
spectroscopy and frequency hopping
systems
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Analog Generation
Techniques
) (t x
in
Phase
Detector
Loop Filter
Output
Voltage Controlled
Oscillator
Reference
signal
Amplifier
Gain =
Phase Locked Loop
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Analog Generation
Techniques
Advantages of PLL
fine frequency resolution
low levels of spurious outputs,
though not as low as DAS
comparatively low cost
Disadvantages
slow switching times due to loop
filter settling time
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Digital Signal
Generation
Output is smooth when a frequency
change is executed, no transients
Possible to achieve continuous phase
frequency switching
Crucial to frequency hopping spread
spectrum systems
Switching frequencies less than 1 s
possible
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Comparison of DDS with
Analog Generation
DDS overcomes most problems of
DAS and PLLs
Superior in terms of precision,
stability, ease of implementation,
flexibility, and size
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Properties of DDS
Precision
Accurately set the output frequency
significant for narrowband
modulation formats
Analog systems have poor
frequency resolution
Stability
DDS system parameters and output
frequency does not vary with time
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DDS Features
Ease of implementation
Basic structure easy to realize with
ROM, clock, and DAC
Implemented in hardware, software, or
combination of both
Easier to interface with computers for
control
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DDS Features
Possible to predict the performance of
the digital components
Size
DDS for sub Hz resolution can be
implemented as a fraction of the size of
an analog synthesizer
Disadvantages
Spurious frequency components in the
output signal
Bandwidth of the output signal
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Basic Approaches to DDS
Pulse output DDS
Generates square, sawtooth, and
pulse waveforms
ROM lookup table
Standard method
Can generate sinusoidal as well as
arbitrary waveforms
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Basic Approaches to DDS
Impulse response of a filter
Impulse response of an IIR filter
with poles on the unit circle for
sinusoidal generation
Impulse response of a FIR filter
for pulse generation
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Approach 1: Pulse Output
DDS
One of the simplest forms of DDS
Used to generate pulse, sawtooth,
or rectangular waveforms
Use these basic waveforms to
generate sinusoidal or other
waveform
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Pulse Output DDS
Frequency word A
r
added to
accumulator once every clock period
T
clk

Accumulator overflows and counter
resets on the average once every 2
N
/A
r
clock periods
Pulse: carry output of the accumulator
Rectangular waveform: MSB of the
accumulator
Sawtooth: output of the accumulator
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Pulse Output DDS
Accumulator
Output
2
N
-1
Carry
output
nT
MSB
O/P
Frequency Word F
r
Pulse output
N - Bit Adder
Output
Input
N - Bit
Storage
Register
F
clk
Clock
Square wave output
B
A
A+B
MSB
Carry
S(n)
Sawtooth Waveform
nT
nT
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Calculation of Output
Frequency
Accumulator overflows and
counter resets on the average
once every 2
N
/A
r
clock periods.
Repetition interval is 2
N
/A
r
(1/F
clk
)
Frequency is F
clk
A
r
/ 2
N
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Calculation of Output
Frequency
Frequency resolution is the
smallest possible change of A
r,

i.e., A
r
=1
Frequency resolution
AF= F
clk
/ 2
N
Output frequency will always be
multiples of F
clk
/ 2
N
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Approach 2: ROM
Lookup Table
Sine values are stored in a ROM and
periodically output through a D/A
converter
Contents of N bit accumulator is
incremented by A
r
every clock cycle
Output of the accumulator used to
increment the address lines of the
ROM
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ROM Lookup Table
Frequency of the output
waveform can be varied by
changing A
r

Output resolution can be
increased by increasing the
number of bits in the accumulator
It is possible to generate arbitrary
waveforms
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Disadvantages of ROM
Lookup Table Approach
Highest output frequency
is a fraction of the clock
frequency
Spurious components in
the output in the absence
of a very large ROM
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ROM Lookup Table
Phase
Increment
Value
Clock F
clk
2
F
F
N
clk r
out
A
=
2
N
clk F
F = A
ROM
Lookup
Table
D
A
C

Filter/
Amplifier
W s N

P
h
a
s
e

I
n
c
r
e
m
e
n
t

R
e
g
i
s
t
e
r

A
c
c
u
m
u
l
a
t
o
r

N

b
i
t
s

B = N-W

A
r
F
out
na

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Definitions of Variables
F
clk
= Clock frequency
F
out
= Output frequency
AF = Frequency resolution
N = Number of bits in the accumulator
W = Number of bits used to address the
ROM (W s N)
A
r
= Phase increment step size (number
added to the accumulator every clock cycle)
na = width of the ROM (ROM has 2
na

quantization levels)
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Modulation
Phase modulation (hence
frequency modulation) an be
directly included in the DDS
operation through dynamic
changes in the phase increment
step size.
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Example Modulation
Modulation Binary
Symbol
Phase LUT
Address
BPSK 0 0 0

1 2
N-1

QPSK 00 /4
N
2
8
1
|
.
|

\
|

01 7/4
N
2
8
7
|
.
|

\
|

10 3/4
N
2
8
3
|
.
|

\
|

11 5 /4
N
2
8
5
|
.
|

\
|


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Example MSK
Modulation Binary
Symbol
Frequency LUT Address
Accumulator
MSK 0 f
0
R
b
/4 r = r
0
r
0
/(4K)

1 f
0
+ R
b
/4 r = r
0
+ r
0
/(4K)



Where r
0
is the default accumulator value,
f
0
is the output wave frequency,
R
b
is the symbol rate, and
K is the number of cycles per symbol (f
o
/ R
b
).
r must be an integer, and so
r0
must be an integer multiple of 4K.
MSK signal is filtered through a Gaussian filter to create GMSK.
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BPSK Example 1
N W r na f
o
(kHz) f
clk
(kHz) K R
b
(ksps)
6 6 4 6 2.5 40 2 1.25

0 500 1000 1500 2000 2500 3000 3500 4000 4500
0
2
4
6
8
10
12
14
16
18
x 10
-5
Frequency (Hz)
1.E-06
1.E-05
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
0 1 2 3 4 5 6 7 8 9 10
Eb/No (db)
B
E
R
Theoretical BER
Actual BER
Example from Tom Rondeau and Bin Lee
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BPSK Example 2
N W r na f
o
(kHz) f
clk
(kHz) K R
b
(ksps)
10 9 8 8 2.5 320 2 1.25

0 500 1000 1500 2000 2500 3000 3500 4000 4500
0
0.5
1
1.5
2
2.5
x 10
-4
Frequency (Hz)
1.E-05
1.E-04
1.E-03
1.E-02
1.E-01
1.E+00
0 1 2 3 4 5 6 7 8 9 10
Eb/No (db)
B
E
R
Theoretical BER
Actual BER
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Example Product: AD9830
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Example Product: AD9953
65 MHz output possible with support for
FSK, QPSK, DQPSK, 16-QAM, and D16-QAM modulations
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Need for Phase
Truncation
Design DDS for: F
out
= 2.5MHz, AF = 1Hz
F
clk
should be 10MHz (F
out
s F
clk
/4)
N = log
2
(F
clk
/AF)=24
Size of ROM = 2
24
or 16 Mbytes (or
4Mbytes if only 1/4 cycle stored)!
W bits, (W < N, MSBs) are used to
address the ROM
2
F
F
N
clk r
out
A
=
2
N
clk F
F = A
Basic formulas:
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Effect of Phase Truncation
Accumulator
Output
Address
Lines of ROM
Angle
(Degrees)
000 00 45
001 00 45
010 01 135
011 01 135
100 10 225
101 10 225
110 11 315
111 11 315
A
c
c
u
m
u
l
a
t
o
r

S
i
z
e

N
=
3
,

R
O
M

S
i
z
e

W
=
2

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IIR filter that has poles placed on the
unit circle at e
je
0

Approach 3: Impulse
Response of a Filter
0
t
e
e
je

e
-je

1
2
1
1
1
1 0
Z b Z b 1
Z a a
) z ( H


+
=
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Filter Coefficients
Output frequency e
0
Cosine wave: h(n) = cos(e
0
T) u(n)
a
0
= 1, a
1
= cos(e
0
T)
b
1
= 2cos(e
0
T), b
2
= -1
Sine wave: h(n) = sin(e
0
T) u(n)
a
0
= 0, a
1
= sin(e
0
T)
b_1 = 2cos( e
0
T), b
2
= -1
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Effect of Coefficient
Quantization
Implemented as recursive filter on a
DSP
Accuracy of output frequency e
0

dependent on the accuracy of filter
coefficients
depends on accuracy of cos(e
0
T)
difficult to implement in finite
precision arithmetic
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Effect of Coefficient
Quantization
Uniform quantization of filter coefficients
Possible to obtain only certain output
frequencies (pole locations)
Pole locations more closely spaced around
t/2 radians than in the regions
corresponding to 0 and t radians
Re
-0.5 -1.0
Z plane
Im
0 rad. t rad.
0 0.5 1.0
Direct Form
Implementation (3 bits
+ sign bit)
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Summary of the
Approaches
Approach Advantages Disadvantages
Pulse output
DDS
Simple design
Can generate basic
waveforms like sawtooth,
square, and pulse
waveforms
Need additional
circuitry to generate
standard
communication
waveforms
ROM lookup
table
Best for generating
arbitrary waveforms
Spurious components
due to phase truncation
IIR filter Large frequency range
High spectral purity
Simple design
Coefficient
quantization can
change the pole
locations and hence the
output frequency
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Bandpass Signal
Generation
Used to generate waveforms above
Nyquist frequency
Sampled signals replicate at multiples
of the sampling frequency (F
out
nF
s
)
To obtain output frequencies beyond
the Nyquist frequency, the replicated
images can be filtered to extract the
desired image
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Bandpass Signal
Generation
Digital bandpass signal can be
obtained by zero padding by N-1
and bandpass filtering
f
s
0 -f
s

Filter
Response
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Roll off in the amplitude of replicated
images follows the sin(x)/x function
due to finite width pulses
Spurious harmonics generated by
DAC are generally much lower in
amplitude
Bandpass Signal
Generation
f
s
0 -f
s
Nf
s
-Nf
s

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Disadvantages of
Bandpass DDS
Spurious components inherent
in DDS signals do not decay
according to the sin(x)/x
function
Due to non-linear phase
truncation and timing jitter
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Disadvantages of
Bandpass DDS
Spurious signals make it harder to
separate the desired signal at
frequencies higher than the
Nyquist frequency
Higher output frequencies require
higher quality DACs
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Sources of Error in DDS
Signals
Errors are injected into the system
at various points
Causes spurious components in the
output spectrum
Accumu-
lator
ROM
Lookup
Table
DAC
E E
P
1
(n)
Timing Jitter
P
2
(n)
Phase
Truncation
P
3
(n)
Amplitude
Truncation
DAC Non-
linearities
E
P
4
(n)
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Phase truncation causes phase
modulation with a periodic sawtooth
waveform
Most of the time, the DDS is putting
out a frequency that is biased
On particular clock pulses, the ROM
input does not advance
ROM causes the D/A converter to
deliver the same voltage as on the
previous clock cycle
Effects of Phase
Truncation
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Effects of Phase
Truncation
Thus the phase is held back by 2t
/2
W
radians before continuing to
creep forward as before
time
p
h
a
s
e

Ideal change in
phase
Actual change in
phase
0
2t
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Effects of Phase Truncation
Extent of the spurs depend on the
values of N, W, and A
r

The first harmonic is generally the
strongest
Spurs move closer to the fundamental
as W decreases or amount of phase
truncation increases
Harder to filter out the spurs close to
the fundamental

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Phase Truncation Spurs
Output can be expressed as a series
of rectangular pulses
Compute the Fourier transform of
these pulses
0 1 2 3 4 5 6 7
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1
radians
A
m
p
l
i
t
u
d
e
Can get very
tedious
We will look at
some basic
analysis
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Phase Truncation Spurs
0 000 00 0
1 001
2 010 01 t/2
3 011
4 100 10 t
5 101
6 110 11 3t/2
7 111
A
r
=1, N=3, Y = 2
3
=8
W = 2, B = N-W = 1
2
( ) sin
2 2
r
W B
m
y m
t | A |
(
=
|
(

\ .
Output of DDS
can be expressed
as
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Phase Truncation Spurs
2 2
( ) sin sin
2 2 2 2
2 2
sin ( )
2 2
r r
W B N B B
B
r
N B
m m
y m
m
s m
t t
t

| A | | A |
( (
= =
| |
( (

\ . \ .
| |
A
| |
=
| |
\ .
\ .
where ( ) 1
2 2
r r
B B
m m
s m
A A
(
= s
(

2 2 2 2
( ) sin ( ) cos
2 2 2
B
r r
N N N
m m
y m s m
t t t A A
| | | |
=
| |
\ . \ .
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Phase Truncation Spurs
Largest spurious amplitude

Detailed calculation of spurious
components requires further
analysis
2 2 2 2
( ) sin ( ) cos
2 2 2
B
r r
N N N
m m
y m s m
t t t A A
| | | |
=
| |
\ . \ .
Desired Output Spurious Component
2 2 2
2 2
B
sp
N W
A
t t
s= =
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Timing Jitter
Even in the absence of phase
truncation (N = W), periodicities
appear in signal depending on the
value of A
r
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Timing Jitter
0, 2, 4, 6, 8, 10, 12, 14, 0, 2, 4, 6, 8, 10, 12, 14,
first period second period
N=4, A
r
= 2
0, 6, 12, 2, 8, 14, 4, 10, 0, 6, 12, 2, 8, 14, 4, 10, 0,
first
period
second
period
third
period
fourth
period
fifth
period
N=4, A
r
= 6
Accumu-
lator
Values
Perfectly
equal
periods
Different
period
lengths
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Location of Spurs
Time period of spurious components
due to periodic jitter alone


Example: N=4, A
r
= 6, W = 4, T
out
=
16/6T
clk

three periods of the fundamental
output needed to return to the
original state
) 2 , gcd(
2
N
r
N
clk
spur
T
k T
A
=
k is any integer
gcd = greatest common divisor
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Example contd.
Will create a harmonic at 1/3 of
the fundamental
Verify from formula:
Period of spurs = 2
4
/gcd(6,16)T
clk
=
16/2 = 8T
clk
= 3*T
out

Thus spur frequency at 1/3
fundamental and their harmonics
exist
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Location of Spurs
Component at 1/3 fundamental at
0.125 visible
Desired
1/3 desired
frequency
Folded Spectrum
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Tertiary Periodicities
Presence of a combination of the
above three sources of errors
could cause additive periodicities
which could result in strong
spurs
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Tertiary Periodicities
In the presence of more than one
independent set of periodicities,
the least common multiple (lcm)
of the independent periodicities is
another spur frequency
Spurs at a particular frequency
can be more pronounced than the
others
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Tertiary Periodicities
Spurs due to phase truncation and
timing jitters can superimpose and
cause stronger spurs
Example: F
clk
= 1, N = 5, A
r
= 7, na = 32,
F
out
= 0.2188
Figure(1): W = 5, spur due to timing
jitter alone at k*0.0312

Figure(2), W = 4, spur enhanced by
phase truncation = 0.2812 = 9*0.0312
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Tertiary Periodicities
Figure (1)
Desired
Spurs due to
timing jitter
Figure (2)
Phase truncation
spur superimposed
on spur due to
timing jitter
Desired
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Errors From D/A Converter
Inherent non-linearities
Difficult to manufacture high speed
D/A converters that are accurate
Difficult to predict and quantify the
errors accurately unlike the digital
sections of the DDS
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Experimental findings
as a rule of thumb, when
number of D/A converter bits
(D
a
) is greater than seven,
spurious outputs decrease
by 6dB per each additional
bit used
Errors From D/A
Converter
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W/na Ratio
00
01
10
4
3



1
2





11
Sampling and
quantizing a sine
wave for W = 3
Output of the ROM (na = 3)
corresponding to the 8
sampling points
0 0 0 6
0 0 0 5
0 0 1 7
0 1 0 0
0 1 1 1
0 1 1 2
0 1 0 3
0 0 1 4
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W/na Ratio
Choosing the right W/na ratio is
very important
For W = 3, only four distinct levels are
present
na = 2 bits will suffice
na = W-1 or W-2 is optimum
depending on whether the entire sine
wave or 1/4 of it is stored in the ROM
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Example
For W = 11, 1024 distinct levels
are present
na has to be at least 10 bits to
avoid repetition of values
If only 1/4 of the cycle is stored,
na has to be at least 9 bits
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Techniques for
Suppressing Spurs
Use of hybrid systems (PLL
filtering of harmonics)
DDS-PLL systems
ROM compression techniques
Taylor series expansions
Trigonometric expansions
Sunderland, Hutchison etc.
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Techniques for
Suppressing Spurs
Randomization (all harmonics
reduced)
E.g, Wheatleys procedure
PN sequence
Generation of random
sequences
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Hybrid Systems
DDS systems make a trade off between
the bandwidth and spectral purity
If F
clk
is reduced, Nyquist frequency is
reduced, hence reducing the bandwidth
Lower clock frequencies allow higher
resolution and better spectral purity for
a given number of bits in the
accumulator (N) and a given ROM size
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Hybrid Systems
ROM lookup table DDS
High switching frequencies
Low power consumption, small size
Resolution can be increased by
increasing N
However, for same spectral purity,
size of ROM needs to be increased
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DDS - PLL System
PLL
Relatively high switching time
between output frequencies
Consume more power
Larger in size
Very good spectral
characteristics at the output
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Phase Locked Loop
Synchronizing circuit
Synchronize output of a system
with reference frequency
Phase error at a minimum when
system is in lock
If phase error builds up, control
mechanism acts to reduce
phase error
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PLL Components
) (t x
in
) (t x
vco
Phase
Detector
Loop Filter
Output
Voltage Controlled
Oscillator
Reference
signal
Amplifier
Gain =
) (t e
d
) (t x
in
) (t e
vco
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PLL Operation
)] ( 2 cos[ ) ( t t f A t x
c c in
| t + =
)] ( 2 sin[ ) ( t t f A t x
c v vco
u t + =
Phase Detector Model
)] ( ) ( sin[ ) ( t t A A t e
v c d
u | =
Low Pass
Filter
(gain = 2)
) (t x
in
) (t x
vco
) (t e
d
) (
1
t e
d
)] ( 2 sin[ )] ( 2 cos[ ) (
1
t t f t t f A A t e
c c v c d
u t | t + + =
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Phase Error
Phase error, (t) = |(t) - u(t)
To uniquely identify the phase,
output of phase detector has to be
an odd function of the phase error
VCO output has to be in
quadrature to the PLL input
MPRG MPRG
80
Calculation of VCO Phase
( ) ( ) ( ) ( ) ( )
vco d d
e t e t f t e f t d
+

= - =
}
If f(t) is the impulse response of the loop
filter
Output frequency of VCO e
vco
(t)
) ( 2 t e K
dt
d
vco d
t
u
= = frequency output VCO
K
d
= VCO constant with units Hertz/volt
MPRG MPRG
81
) ( 2 t e K
dt
d
vco d
t
u
= = frequency output VCO
Substituting for e
vco
(t), we get
t u | t
t t
t t t u
d d t f A A K
d d t f e K
d e K t
t
v c d
d
t
d
t
vco d
) ( )] ( ) ( sin[ 2
) ( ) ( 2
) ( 2 ) (
=
=
=
} }
} }
}
+

+


Calculation of VCO Phase
MPRG MPRG
82
Calculation of VCO Phase
t u | u d d t f G t
t
) ( )] ( ) ( sin[ ) ( =
} }
+

v c d
A A K G t 2 = Define
Relationship between |(t) - u(t) does not
depend on the carrier frequency f
c

MPRG MPRG
83
Analysis of Linear Model
If phase error is small, a linear
approximation can be made
) ( ) ( )] ( ) ( sin[ t t t t u | u | ~
t u | u d d t f G t
t
) ( ) ( ) ( ) ( =
} }
+

Taking the Laplace transform
| |
s
s F
s s s
) (
) ( ) ( ) ( O u = O
MPRG MPRG
84
Analysis of Linear Model
) (
) (
) (
) (
1
) (
) (
) (
s GF s
s GF
s H
s
s F
G
s
s F
G
s
s
+
=
+
=
u
O
= H(s) function transfer PLL
Relating phase error to input phase
) (
) ( 1
) (
) ( ) (
) (
) (
s GF s
s
s H
s
s s
s
s
+
= =
u
O u
=
u
+
MPRG MPRG
85
Steady State Phase Error
Using final value theorem for
Laplace transform
Steady state phase error
) ( ) (
lim lim
0
s sA t a
s t
=
( )
) (
) (
) ( 1 ) ( ) (
2
0
0 0
lim
lim lim
s GF s
s
s
s H s s s A
s
s s
ss
+
u =
u = + = +


MPRG MPRG
86
Steady State Phase Error
Assuming phase deviation of the form
0
2
2 ) ( u t t | + A + = ft Rt t
f Rt
dt
d
A + =
|
t 2
1
Corresponding frequency deviation in
Hertz is
If R=0 and Af 0, frequency step is
applied
MPRG MPRG
87
Steady State Phase Error
First order system (F(s)=1)
For R=0 and Af 0
Perfect second order system

Imperfect second order system

G
f
ss
A
= +
t 2
s
a
s F + =1 ) (
0 = +
ss
a s
a s
s F
+
+
= ) (
G
f
ss
A
= +
t

2
MPRG MPRG
88
Costas Loop
Demodulated
Output
Voltage Controlled
Oscillator
Amplifier
Gain =
Low Pass
Filter
) (t x
in
) (
,
t x
I vco
) (t e
) (t y
I
Loop
Filter
Low Pass
Filter
90
0

) (
,
t x
Q vco
) (t y
Q
MPRG MPRG
89
Costas Loop Operation
| | ) ( 2 cos ) ( ) ( t t f t m A t x
c c in
| t + =
m(t)=message signal
| | ) ( ) ( cos ) ( ) ( t t t m A t y
c I
u | =
| | ) ( ) ( sin ) ( ) ( t t t m A t y
c Q
u | =
| | ) ( 2 cos ) (
,
t t f t x
c I vco
u t + =
| | ) ( 2 sin ) (
,
t t f t x
c Q vco
u t + =
MPRG MPRG
90
Costas Loop Operation
| |
| | BPSK NRZ for ) ( ) ( 2 sin
2
1
) ( ) ( 2 sin ) (
2
1
) ( ) ( ) (
2
2 2
t t A
t t t m A
t y t y t e
c
c
Q I
u |
u |
=
=
=
e(t) = Loop control signal
Assuming phase error is small
| | ) ( ) ( ) (
2
t t A t e
c
u | ~
Operation similar to
basic PLL
MPRG MPRG
91
DDS - PLL System
Complementary characteristics of
DDS and PLLs led to development
of hybrid structures
Retain the good qualities of
DDS as well as PLLs
Filtered output of DDS is used to
generate the reference frequency
for the PLL
MPRG MPRG
92
DDS - PLL System
DDS
) (t x
in
) (t x
vco
Phase
Detector
Loop Filter
Output
Voltage Controlled
Oscillator
Reference
signal
Amplifier
Gain =
) (t e
d
) (t x
in
) (t e
vco
Bandpass
Filter
Optional
Divider/
Interpolator
MPRG MPRG
93
DDS - PLL System
Optional divider may be used to divide
the DDS output to improve its noise
and spurious characteristics
Output of the PLL F
out
is related to the
reference frequency F
ref
as: F
out
= N
F
ref
Output frequency can be varied by
changing F
ref
of DDS
MPRG MPRG
94
DDS - PLL System
Advantages
Has very high resolution and high
switching speeds
Spectral purity of the output is
largely defined by the spectral purity
of the PLL subsystem
Higher than that of the DDS sub-
system
MPRG MPRG
95
DDS - PLL System
Disadvantages
More complex and bulkier
than individual systems
PLL has some finite settling
time
MPRG MPRG
96
Example DDS Chip
MPRG MPRG
97
Example: Two DDS Chips

AD9830 50-MHz C-DDS.
AD9850 125 MHz C-DDS
http://www.analog.com/library/analogDialogue/archives/30-3/single_chip.html
MPRG MPRG
98
Comparison of DDS Chips
Feature/Specification AD9850 AD9830
Maximum clock frequency 125 MHz 50 MHz
Maximum output Nyquist-frequency bandwidth 62.5 MHz 25 MHz
Frequency tuning word resolution 32 bits 32 bits
Phase tuning word resolution 5 bits 12 bits
Supply voltage +3.3 V or +5 V +5 V
Power dissipation @ max. operating conditions 155/380 mW 265 mW
Worst-case narrowband SFDR (50-kHz
window) @ max. clock
72 dBc 72 dBc
Wideband SFDR (Nyquist) @ 20-MHz Aout 58 dBc 50 dBc
Wideband SFDR (Nyquist) @ 40-MHz Aout 54 dBc N/A
Control interface Parallel/serial Parallel
Unique additional features
Internal high-speed
comparator registers
Two frequency four
phase registers
Package style 28-pin SSOP 48-pin TQFP
Price (100s) $14.55 $11.70
MPRG MPRG
99
Randomization
Spurs occur because of
periodicities in the output signal
Adding minimal noise can destroy
the periodicities
The spurs are minimized at the
cost of generating a much higher
noise floor
MPRG MPRG
100
Randomization
Optimal procedures do not increase
the total energy contained in the spurs
Wheatleys procedure
Sub-optimal procedures can increase
the total noise energy
Using Pseudo Noise (PN) sequences
to remove periodicities
MPRG MPRG
101
Randomization
Randomization is done by
changing one or more bits of
Output of the accumulator
Frequency setting word ( A
r
)
Output of the ROM
MPRG MPRG
102
Wheatleys Procedure
Accumulator
Random
Number
Generator
ROM
N W na
+
-
DAC
X
2
N

N
Z
2
Overflow
] 1 , 0 [ A e
r
X
MPRG MPRG
103
Wheatleys Procedure
Optimal Procedure
At each overflow of the accumulator,
add a random number to accumulator
and subtract previous value of
Average of X(i) X(i 1) = 0
No net noise added
Average output frequency does not
change
Not easy to implement in high speed
logic
MPRG MPRG
104
Effect of Wheatleys
Procedure
Basic DDS Wheatleys Procedure
MPRG MPRG
105
Effect of Wheatleys
Procedure
F
clk
= 1, N = 9, W = 5, A
r
= 7,
F
out
= 0.0137
Wheatleys procedure shows a
few dB improvement
Noise floor is generated
Better improvements can be seen
on larger systems and longer runs
MPRG MPRG
106
ROM Compression
Techniques
Main sources of spurs in output
signal - phase truncation
Values stored in ROM are
repeated at the input to the D/A
converter
Impractical to have a very large
sized ROM
MPRG MPRG
107
ROM Compression
Techniques
Solution: Compress more
information in ROM and use that
information to generate a more
perfect sine wave
Most techniques based on
interpolation of the sine wave
Simple compression approach
Store only sine wave
MPRG MPRG
108
Sampling the Sine
Wave
1/4 of the sine wave stored and
replicated with sign inversion
Sine wave has to be sampled correctly
to exploit symmetry
1 2
3 4
| A
4
3
1
2
| A
N
2
2t
= | A
MPRG MPRG
109
ROM Compression
Techniques
Taylor Series Expansion
Use of trigonometric identities
Hutchison Algorithm
Sunderland Algorithm
MPRG MPRG
110
Taylor Series Expansion
If u is any angle and Au is a small
increment then

If Au is sufficiently small, the higher
order terms can be ignored
If sin(u
1
) and sin(u
2
) are stored in
the ROM, in-between values can be
generated using the Taylor series
...
! 3
) )( cos(
! 2
) )( sin(
) cos( ) sin( ) sin(
3 2
+
A

A
A + = A +
u u u u
u u u u u
MPRG MPRG
111
Taylor Series Expansion
Series expansion can be implemented
in a dedicated DSP, FPGA, or
combinatorial logic up to desired
number of terms
Using W = 2 bits, N =
12, and two terms of
the series expansion,
results in remarkable
improvements
MPRG MPRG
112
Effect of Increasing the
Number of Terms in the
Series Expansion
4

t
e
r
m
s

7

t
e
r
m
s

MPRG MPRG
113
Affect on the Frequency
Spectrum
Desired Output
Desired Output
MPRG MPRG
114
Use of Trigonometric
Identities
Use trigonometric identities to
interpolate between two values of the
sine function
Most of these methods work well only if
the increment from the known angle is
very small
Need additional circuitry to perform
interpolation
MPRG MPRG
115
Hutchison Algorithm
Partition the values of the sine function (of
the first quadrant) into coarse ROM and
fine ROM
Coarse ROM contains values of sine
function for a certain number of angles at a
fixed step size
Fine ROM has values of sine function for
angles in between those contained in the
coarse ROM
MPRG MPRG
116
Hutchison Algorithm
Any angle u can be decomposed as u ~ a+b
sin(a) is contained in the coarse ROM and
sin(b) is contained in fine ROM
sin(u ) = sin(a) cos(b) + cos(a) sin(b)
Example
Coarse ROM has sine values from 0
0
- 90
0
in
steps of 10
0
Fine ROM has values from 1
0
- 9
0
To evaluate sin(55), a = 50, b = 5
MPRG MPRG
117
Sunderland Algorithm
Partition the values of the sine function
(of the first quadrant) into 3 sub-ROMs
Any angle u can be decomposed as u ~
a+b+c
sin(u ) = sin(a+b)cos(c) + cos(a+b)sin(c )
= [sin(a) cos(b) + cos(a) sin(b) ]cos(c)
+ [cos(a) cos(b) - sin(a) sin(b) ] sin(c )
MPRG MPRG
118
Sunderland Algorithm
Modification to allow two ROMS
(or one ROM with phase shift)
If b and c are sufficiently small
sin(u ) ~ sin(a) + b cos(a) + c
cos(a) - b c sin(a)
MPRG MPRG
119
Use of DDS in Digital
Communication
Used to generate signals for paging
radios, mobile telephones, and multi-
mode radios
Spread spectrum frequency hopping
systems require fast switching with good
spectral purity
Used for creating custom and arbitrary
waveforms
Essential for software radios
MPRG MPRG
120
Use of DDS in Digital
Communication
Digitally generated signals with
the help of multirate filters can be
used to perform digital modulation
and pulse shaping
MPRG MPRG
121
Pulse Shaping
Used to minimize intersymbol interference
(ISI) and bandwidth
Nyquist Criteria
Intersymbol interference can be eliminated
by using special pulse shapes
Magnitude of the impulse response of the
pulse shaping filter should be zero at
multiples of the sampling interval
can satisfy the Nyquist criteria
MPRG MPRG
122
Pulse Shaping
h
p
(kT
s
) = C, k = 0
= 0, k = 0
k is an integer, T
s
is the sampling interval
h
p
can have any non-zero value between the
sampling intervals
Infinitely long pulse shapes can satisfy the
Nyquist criteria
Sampling Points
time
C
T
s

4 positive pulses
MPRG MPRG
123
Raised Cosine Filter

Satisfies the Nyquist criteria for
eliminating ISI commonly used in
pulse shaping
Ideal raised cosine pulse
Infinite duration in time domain
Practical applications
MPRG MPRG
124
Raised Cosine Filter

Results in side lobes in the
frequency spectrum
Interpolating at the final stage
minimizes the computation up
stream in the processing.
MPRG MPRG
125
Raised Cosine Filter
Impulse response
(

|
|
.
|

\
|
=
A
A
2
0
0
0
) 4 ( 1
) 2 cos(
2
) 2 sin(
2 ) (
t f
t f
t f
t f
f t h
e
t
t
t

MPRG MPRG
126
Frequency Spectrum
1 ) ( = f H
e
|
|
.
|

\
|
|
|
.
|

\
|

+ =
A
f
f f
2
) | (|
cos 1 2 / 1
1
t
= 0
|f | < f
1

f
1
s |f | s B
|f | > B

f
A
= B - f
0
, f
1
= f
0
- f
A
, r = f
A
/f
0

f
o
= 6dB Bandwidth of the raised cosine filter
B = absolute bandwidth of the filter
r = roll off factor determines the width of the
transition band in the frequency spectrum
r = 0, pulse becomes rectangular in the frequency
domain
MPRG MPRG
127
Use of Random
Sequences
Dithering
Minimizing spurious components in
DDS signals
Spread spectrum systems
Spread data in direct
sequence spread spectrum
systems
MPRG MPRG
128
Use of Random
Sequences
Choose the carrier frequency for
frequency hopping spread
spectrum systems
Scramble data for security and bit
synchronizers
MPRG MPRG
129
Generation of Random
Sequences
PN sequence
Maximal length sequence
properties and generation
Gold codes
Generation and properties
MPRG MPRG
130
Types of Random
Sequences
An ideal binary random sequence
Infinite sequence of independent,
identically distributed, random
variables each taking on values 0 or
1 with probability 0.5
Pseudo-noise (PN) sequences
Finite length sequences, which
closely approximate an ideal random
sequence
MPRG MPRG
131
Applications of PN
Sequences
Spread Spectrum Systems
Users share the same frequency
band
Separated from each other by using
different spreading codes
properties of the codes determine
how well the user's are separated
MPRG MPRG
132
Applications of PN
Sequences
Data scramblers
At transmitter multiply the PN
sequence by the data to randomize
data and help maintain
synchronization
Also used for security purposes,
where the PN code is not universally
known
MPRG MPRG
133
Generation of PN Sequences
y(n)
z
-1

X(n)
y(n-1)
y(n-2) y(n-m)
h
1
h
2

h
m-1

h
m

Binary Digital Linear Feedback Shift Register

=

+ =
m
k
k
k
Z h D h
1
1 ) (

=
=
m
k
k
k n y h n y
1
) ( ) (
z
-1

z
-1

MPRG MPRG
134
Generation of PN Sequences
Different sets of h gives rise to different
connection polynomial h(D)
m = degree of the polynomial
State of the PN sequence generator is
defined as the contents of the shift
register
s(n) = [y(n-1) y(n-2) ....... y(n-m)]

=
=
m
k
k
k n y h n y
1
) ( ) (

=

+ =
m
k
k
k
Z h D h
1
1 ) (
MPRG MPRG
135
Maximal Length
Sequences
Sequences have the maximum possible
period ( N = 2
m
-1)
Shift register will generate a maximal length
sequence only if its connection polynomial
h(D) is primitive
A necessary but not sufficient condition for
a connection polynomial h(D), of degree m,
to be primitive is that it be irreducible
MPRG MPRG
136
Maximal Length
Sequences
A polynomial is said to be irreducible if
it cannot be factored into the product of
polynomials with binary coefficients
and degrees of at least 1
h(D) = 1 + D + D
4
is irreducible
h(D) = 1 - D
4
is reducible
MPRG MPRG
137
Properties of Maximal
Length Sequences
Different settings of h gives rise to
different kinds of sequences
Maximal length sequences are common
Number of 1s in a period of the
sequence is 2
m-1

Number of 0s in a period of the
sequence is 2
m-1
-1
MPRG MPRG
138
Properties of Maximal
Length Sequences
In a period of the sequence, there should
be
Sequence of consecutive m 1s, and (m-1) 0s
2
m-k-2
sequences of consecutive k 1s and 0s, for
1 s k s m-2
No sequences of consecutive (m-1) 1s or
consecutive m 0s
Periodic autocorrelation function
R(n) = 1, for n = 0
R(n) =1/m, otherwise
MPRG MPRG
139
Gold Codes
Constructed by forming the modulo-2
sum of two preferred maximum
sequences of equal length
pn sequence
generator 1
pn sequence
generator 2
Code 1
Code 2
Code 3
Clock
Gold code generator
MPRG MPRG
140
Gold Codes
Preferred m-sequences are maximum
length sequences that have certain
specific desirable correlation properties
Though constructed from a maximal
sequence code, it is not a maximal
sequence code
MPRG MPRG
141
Properties of Gold Codes
A different Gold code is generated
by shifting the one of the sequence
relative to the other
Gold codes allow construction of
families of 2
m
-1 codes from pairs of
m stage shift registers
MPRG MPRG
142
Properties of Gold Codes
Gold code are useful because of the large
number of codes they supply although
they require only one pair of feedback tap
sets
Multiple register gold code generator
can generate
(2
m
- 1)
r
non- maximum length sequences
r maximum length sequences
r = number of registers, m = register length
MPRG MPRG
143
Properties of Gold Codes
Gold codes can be chosen so that over
a set of codes available from a given
generator, the cross-correlation
between the codes is uniform and
bounded
m odd: maximum value of the cross
correlation function between any pair of
Gold sequences is R
max
= \(2 N)
m even: R
max
= \(N)
MPRG MPRG
144
Summary
DDS systems rapidly gaining importance
Digital communication and software
radios
Advantageous in terms of size, switching
frequency, resolution, stability and
accuracy
Available as convenient ASICs
MPRG MPRG
145
Summary
Various techniques used to generate
DDS signals
ROM lookup table most commonly used
Techniques used to minimize spurs
Hybrid architectures, randomization,
ROM compression
MPRG MPRG
146
Summary
Applications
digital communication systems, spread
spectrum systems, digital modulation,
and pulse shaping
Future Trends
Higher clock speeds
Lower spur levels
MPRG MPRG
147
References
Dixon, Robert C, Spread spectrum systems with
commercial applications,Third edition,Wiley
Interscience, 1994
Gilmore Robert, Kornfeld, Hybrid PLL/DDS frequency
synthesis, Proceedings RF Technology Expo. 90, pp.
419 - 436, January 1990
Goldberg, Bar-Giora DDS part 1, Reviewing various
techniques for synthesiszing signals, Microwaves and
RF, pp. 181 - 185, May 1996
Goldberg, Bar-Giora, DDS part 2, Enhancing the
performance of DDS signal sources, Microwaves and
RF, pp. 110-116, June 1996
MPRG MPRG
148
References
Goldberg, Bar-Giora, Digital techniques in frequency
synthesis, McGraw-Hill, 1996
Henry T. Nicholas, III, Henry, Samueli, An analysis of the
output spectrum of direct digital frequency synthesizers in
the presence of phase-accumulator truncation, 41st
Annual Frequency Control Symposium, 1987
Tierney, Joseph., Rader, Charles M., Gold, Bernard., A
digital frequency synthesizer, IEEE Transactions on Audio
and Electroacoustics, vol. AU-19, no. 1, pp. 48 - 57, March,
1971
Viterbi, Andrew, J., CDMA, Principles of spread spectrum
communication, Addison Wesley Longman, Inc, Reading,
MA, 1995
Wheatley, lll, C E., Spurious suppression in direct digital
synthesizers, Proceedings 35
th
Annual Frequency Control
Symposium, pp. 428 - 435, May 1981

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