Processors
EAX, EBX, ECX, EDX: general purpose registers EBP: Base pointer ESP: Stack pointer ESI, EDI: Index register
Microcontrollers
Support for peripherals inside uController Limited number of pins Dedicated purpose
Controller families:
68H12: Motorola 68H11, 68HC12, 8051: Intel 8051, 8052, 80251, PIC: Microchip PIC16F628, 18F452, 16F877, AVR: Atmel ATmega128, ATtiny28L, AT90S8515,
Rita51J
8051
Motes
Microcontroller Families
68H12: Motorola 68H11, 68HC12, 8051: Intel 8051, 8052, 80251, PIC: Microchip PIC16F628, 18F452, 16F877, AVR: Atmel ATmega128, ATtiny28L, AT90S8515,
Typical 8051s
32 input / output lines. Internal data (RAM) memory - 256 bytes. Up to 64 kbytes of ROM memory (usually flash) Three 16-bit timers / counters 9 interrupts (2 external) with two priority levels. Low-power Idle- and Power-down modes
Pin-Out of an 8051
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8051 Components
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Ports
Accessing Ports in C
void main (void) { unsigned int i; unsigned char j; while (1) { for (j=0x01; j< 0x80; j<<=1) { P1 = j; for (i = 0; i < 10000; i++) { wait (); } } for (j=0x80; j> 0x01; j>>=1) { P1 = j; for (i = 0; i < 10000; i++) { wait (); } } } } /* Delay var */ /* LED var */ /* Loop forever */ /* Blink LED 0, 1, 2, 3, 4, 5, 6 */ /* Output to LED Port */ /* Delay for 10000 Counts */ /* call wait function */
/* Blink LED 6, 5, 4, 3, 2, 1 */ /* Output to LED Port */ /* Delay for 10000 Counts */ /* call wait function */
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Summary
Ports
Input/Output of uController
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Interrupts & Timers Communication Analog to digital (A/D) conversation Pulse Width Modulation
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Todays Topics
Interrupts Timers
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Interrupts
Definition of Interrupt Event that disrupts the normal execution of a program and causes the execution of special instructions
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Interrupts
Program
time t
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Interrupts
Interrupt
Program
time t
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Interrupts
Interrupt
Program
time t
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Interrupt Handling
Code that deals with interrupts: Interrupt Handler or Interrupt Service Routines (ISRs)
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Interrupt Handling
Code that deals with interrupts: Interrupt Handler or Interrupt Service Routines (ISRs)
Possible code:
Interrupt number
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Interrupts
fahr= (cent * 9 ) +32 5
Interrupt
Program
mov R1, cent mul R1, 9 div R1, 5 add R1, 32 mov fahr, R1
time t
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Interrupts
Interrupt
Program
mov R1, cent
Program
mul R1, 9
time t
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Interrupts
Interrupt
Program
mov R1, cent
Restore Context
mul R1, 9
time t
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Interrupts
Interrupt
Program
mov R1, cent
Restore Context
eg pop R1
mul R1, 9
time t
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Interrupt Overheads
Interrupt arrives Complete current instruction Save essential register information Vector to ISR Save additional register information Execute body of ISR Restore other register information Return from interrupt and restore essential registers Resume task
UBC 104 Embedded Systems
Interrupt Latency
Interrupt Termination
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Interrupt Latency
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Interrupts
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Interrupt Priorities
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Interrupt Priorities
Priorities can be adapted by programs Original 8051 provides 1bit per interrupt to set the priority
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External Interrupts
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External Interrupts
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External Interrupts
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External Interrupts
Edge-triggered
trigger point
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Timer
A timer is a counter that is increased with every time an instruction is executed e.g. 8051 with 12MHz increases a counter every 1.000 s
General 8051 has 3 timer: 2 16-bit timer 1 16-bit timer with extrafunctionality (introduced with the 8052)
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Timer Control
Timer/Counter Mode Control Register TMOD
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Timer Code
void TimerInit(void) {
// Timer 2 is configured as a 16-bit timer, // which is automatically reloaded when it overflows // This code (generic 8051/52) assumes a 12 MHz system osc. // The Timer 2 resolution is then 1.000 s // Reload value is FC18 (hex) = 64536 (decimal) // Timer (16-bit) overflows when it reaches 65536 (decimal) // Thus, with these setting, timer will overflow every 1 ms
= = = = =
// // // // //
2 2 2 2 2
control register high byte reload capt. reg. high byte low byte reload capt. reg. low byte
ET2 = 1; TR2 = 1; }
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Interrupt Flags
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Summary: Interrupts
Definition of Interrupt: Event that disrupts the normal execution of a program and causes the execution of special instructions Handling can be enabled/disabled Prioritized Internal or External External Interrupts:
Level-triggered
threshold
trigger point
Edge-triggered
Level-triggered Edge-triggered
trigger point
t
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Real-Time Systems
predictable
in terms of values and time
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No interrupt
Decision on what job execute are made at specific time instants chosen a priori before the system starts operation A schedule of jobs is created off-line and used at run time The scheduler dispatches jobs according to the stored schedule at each scheduling decision time Clock-driven scheduling has minimal overhead during run time
Start
Set timer
Invoke Scheduler
Cyclic Executive
#define TASK_MAX 4 typedef void (func_ref)(void); int delay[TASK_MAX]; func_ref task_ref[TASK_MAX]; void cyclic_executive() { int task= 0;
while(1) { settimer(delay[task]); taskref[task](); task= (task==TASK_MAX) ? task+1 : 0; clear(time_flag); while (time_flag) enterIdleMode(); }
UBC 104 Embedded Systems
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IdleMode
UBC 104 Embedded Systems
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Inflexibility
Incorporating Aperiodic/Sporadic Tasks, or very long period tasks I/O only by polling
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Endless Loops
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Endless Loops
Interrupt handler are run-to-completion tasks The majority of generic tasks are endless loops
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Endless Loops
Interrupt handler are run-to-completion tasks The majority of generic tasks are endless loops Example Code:
void ExampleTask(void) { while(1) { waitForActivation; doTask; } }
UBC 104 Embedded Systems
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Idle Mode
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Idle Mode
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Idle Mode
8051s implement an idle mode which consumes less power from Pont: Atmel 89S53
11mA 2mA
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Idle Mode
8051s implement an idle mode which consumes less power from Pont: Atmel 89S53
11mA 2mA
Example Code:
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Summary
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