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Basics of computer

Lecture 08

COA by Athar Mohsin

The Register
• Registers are used in computer systems as places to store a
wide variety of data, such as
– addresses, program counters, or data necessary for program execution.
• A register is a hardware device that stores binary data.
• Registers are located on the processor so information can be
accessed very quickly
– Data processing on a computer is usually done on fixed size binary
words that are stored in registers.
• Therefore, most computers have registers of a certain size. Common sizes
include 16, 32, and 64 bits.
• The number of registers in a machine varies from architecture to architecture,
but is typically a power of 2, with 16 and 32 being most common.
– Registers contain data, addresses, or control information.
– Some registers are specified as "special purpose" and may contain only
data, only addresses, or only control information.
– Other registers are more generic and may hold data, addresses, and
control information at various times.

COA by Athar Mohsin

The Register
• Information is written to registers, read from registers, and
transferred from register to register.
• In modern computer systems, there are many types of
specialized registers:
– registers to store information,
– registers to shift values,
– registers to compare values, and registers that count.
• There are "scratchpad" registers that store temporary values,
– index registers to control program looping,
– stack pointer registers to manage stacks of information for processes,
– status registers to hold the status or mode of operation (such as
overflow, carry, or zero conditions), and
– general purpose registers that are the registers available to the
COA by Athar Mohsin
The Input/Output Subsystem
• Input and output (I/O) devices allow us to communicate with the
computer system.
– I/O is the transfer of data between primary memory and various I/O
– Input devices such as keyboards, mice, card readers, scanners, voice
recognition systems, and touch screens allow us to enter data into the
– Output devices such as monitors, printers, plotters, and speakers allow us to
get information from the computer.
• A computer communicates with the outside world through its
input/output (I/O) subsystem.
– I/O devices connect to the CPU through various interfaces.
• I/O can be memory-mapped- where the I/O device behaves like
main memory from the CPU’s point of view.
• Or I/O can be instruction-based, where the CPU has a specialized
I/O instruction set.

COA by Athar Mohsin

• These devices are not connected directly to the CPU.
– Instead, there is an interface that handles the data transfers.
– This interface converts the system bus signals to and from a format
that is acceptable to the given device.
• The CPU communicates to these external devices via
input/output registers. The exchange of data is performed in
two ways.
– In memory-mapped I/O, the registers in the interface appear in the
computer's memory map and there is no real difference between
accessing memory and accessing an I/O device.
• this is advantageous from the perspective of speed, but it uses up
memory space in the system.
– With instruction-based I/O, the CPU has specialized instructions that
perform the input and output.
• This does not use memory space, it requires specific I/O instructions,
which implies it can be used only by CPUs that can execute these
specific instructions.

COA by Athar Mohsin

Isolated and Memory mapped I/O

• There are two completely different methods of interfacing

– Isolated or direct I/O and
– Memory mapped I/O
• For isolated or direct I/O
– IN and OUT instructions transfer data between memory and I/O
• For memory mapped I/O
– This is treated as a memory location in the memory map
– Dose not uses IN and OUT instructions
– The instructions that transfers the memory to processor is used

COA by Athar Mohsin

Direct I/O
• Memory mapped I/O can be used with any microprocessor
system but x86 family allows to setup separate address
• The separate address space for input and output port is
called direct I/O
• The advantage of direct I/O is that none of the system
memory space is used for ports
• The disadvantage is that only specialized IN and OUT
instructions are used for input and output the data

COA by Athar Mohsin
Memory mapped I/O
• When a decoder is used which
translates memory addresses to FFFFFh
chip select signals for port
devices then it is called memory
mapped I/O
• The advantage of memory
mapped I/O is that any
instruction which references I/O
memory can be used to input
data from or output data to port
• The disadvantage is that some
of the system memory space is
used for port and it is not
available for memory
Memory + I/O

COA by Athar Mohsin

• In memory mapped I/o , port devices are
addressed as if they are memory devices
• Any instruction that refers to memory can
theoretically be used to read or write to a port
• Since the device occupies the system memory
space hence not available for storing data

COA by Athar Mohsin

Memory Organization

• Computer memory consists of a linear array of addressable

storage cells that are similar to registers.
• Memory can be byte-addressable, or word-addressable, where a
word typically consists of two or more bytes.
• Memory is constructed of RAM chips, often referred to in terms of
length × width.
– If the memory word size of the machine is 16 bits, then a 4M × 16
RAM chip gives us 4 megabytes of 16-bit memory locations.

COA by Athar Mohsin

The memory
• An address is always represented by an unsigned
– A 4 bits is a nibble, and 8 bits is a byte.
• Normally, memory is byte-addressable, which means
that each individual byte has a unique address.
– Some machines may have a word size that is larger than a
single byte.
• For example, a computer might handle 32-bit words, but still
employ a byte-addressable architecture.
– In this situation, when a word uses multiple bytes, the byte with the
lowest address determines the address of the entire word.
– It is also possible that a computer might be word-addressable, which
means each word has its own address

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Confused in bits and bytes?
• Take example:
– Memory is similar to a street full of apartment buildings.
• Each building (word) has multiple apartments (bytes), and each
apartment has its own address.
• All of the apartments are numbered sequentially (addressed), from 0
to the total number of apartments in the complex.
• The buildings themselves serve to group the apartments.
• In computers, words do the same thing.
– Words are the basic unit of size used in various instructions.
• For example, you may read a word from or write a word to memory,
even on a byte-addressable machine.

COA by Athar Mohsin

Byte / word addressable
• If an architecture is byte-addressable, and the
instruction set architecture is larger than 1 byte, the
issue of alignment must be addressed.
– For example, if we wish to read a 32-bit word on a byte-
addressable machine, we must make sure that:
• the word was stored on a natural alignment boundary, and
• the access starts on that boundary.
– This is accomplished, in the case of 32-bit words, by
requiring the address to be a multiple of 4.
– Some architectures allow unaligned accesses, where the
desired address does not have to start on a natural

COA by Athar Mohsin

Memory address space
• The 8088 can access any two FFFFE
consecutive bytes as a word of data FFFFD
– The lower addressed byte is the least FFFFC
significant byte of the word
– The higher addressed byte is the most
significant byte of the word

Address Memory 5
00725h 0101 0101 =55h
0000 0010 =02h 2
Collectively represents the word =5502h or 0

COA by Athar Mohsin

= (0101010100000010)2
Storing a word of data
• To permit efficient use of memory
– The word of data (16 bits) can be stored at even or odd addressed word
– The least significant bit of the address determine the type of word
• If the bit is 0, the word is at an even address boundary corresponds to two
consecutive byte located at even address

Address Memory

00725h 0101 0101 =55h

Collectively represents the word =5502h or
00724h 0000 0010 =02h
= (0101010100000010)2

The Least Significant byte of the word is stored at 00724h, so it an even

address boundry
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Aligned and misaligned words
• A word of data stored at an
even address boundary Aligned
– 00000, 00002,00004 misaligned
– said to be aligned words,
located at an address that is 00008h Byte 8
multiple of 2 00007h Byte 7
• A word of data stored at an 00006h Byte 6
odd address boundary like: 00005h Byte 5
– 00001, 00003, 00005 00004h Byte 4
– said to be misaligned words 00003h Byte 3
00002h Byte 2
00001h Byte 1
00000h Byte 0

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• What is the data word shown bellow?
– Express the result in hex form
– Is it stored at an even or odd addressed word boundary
– Is it aligned or misaligned word of data
The MSB of word is stored at 0072Ch:

11111101 = FDh
Address The LSB is stored at 0072Bh
10101010 = AAh
0072Ch 11111101 Combining both give the word
0072Bh 10101010
11111101 10101010 = FDAAh
Expressing the address of least significant byte
0072Bh = 0000 0000 0111 0010 1011
As the right most bit (LSB) is logic 1, the word is
stored at an odd addressed boundary in memory,
COA by Athar Mohsin
so it is a misaligned word
Aligned and misaligned word
• The double word is another data Address Physical
that can be processed memory
– D/Word corresponds to four 00008h Byte 8
consecutive bytes of data stored in
memory 00007h Byte 7 DWords 5
• Pointer is an example of D/Word
00006h Byte 6
– A two word address, used to DWords 4
access data or code in memory 00005h Byte 5
– The word of this pointer that is
stored at higher address is called 00004h Byte 4 DWords 1
» Segment base address
– The word at the lower address is 00003h Byte 3
» The offset 00002h Byte 2 DWords 0
– D/word can also be aligned or 00001h Byte 1
• Aligned words are located at an 00000h Byte 0
address multiple of 4
• Misaligned words are located at Aligned Dword
odd addressed boundary

misaligned Dword
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Aligned and misaligned word
• The storage of pointer in memory Addres memory
Memory in hex

– Higher addressed word 3B

represents , segment base, stored 00007h 0011 1011
at even address bdry 00006h 00006h 0100 1100

– The most significant byte of the

word is at 0007h and is equals to 00005h 0000 0000
00111011 = 3Bh 65
00004h 0110 0101
– Its least significant byte is at the
address 00006h that is equals to
01001100 = 4Ch
– Combining both
• We get segment base address Storing a 32 bit pointer in memory
– 0011101101001100= 3B4C
Address memory
– The offset of the pointer is the
lower addressed word 0000Bh A0
• Its least significant byte is stored
at 00004 and contain 01100101 0000Ah 00
• Its MSB is stored at 00005 and
00009h 55
contains 00000000
– Combine both i.e 0065h 00008h FF
• Complete DWord = 3B4C0065
• Since it start at 00004h so it is
COA by Athar Mohsin
An example
The memory
• Memory is often referred to using the notation L x W (length x
– For example, 4M x 16 means the memory is 4M long (it has 4M = 22 x 220
= 222 words) and it is 16 bits wide (each word is 16 bits).
– The width (second number of the pair) represents the word size.
• To address this memory, we need to be able to uniquely
identify 212 different items, which means we need 212 different
– Since addresses are unsigned binary numbers, we need to count from 0
to (212 – 1) in binary.
– How many bits does this require?
• To count from 0 to 3 in binary (for a total of 4 items), we need 2 bits.
• To count from 0 to 7 in binary (for a total of 8 items), we need 3 bits.
• To count from 0 to 15 in binary (for a total of 16 items), we need 4 bits.

COA by Athar Mohsin

The memory
• Main memory is usually
larger than one RAM chip.
– Consequently, these chips
are combined into a single
memory module to give the
desired memory size.
• For example, suppose you
need to build a 32K x 16
memory and all you have are
2K x 8 RAM chips.
• You could connect 16 rows
and 2 columns of chips
together as shown

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The memory
• Each row of chips addresses 2K words (assuming
the machine is word-addressable),
– but it requires two chips to handle the full width.
• Addresses for this memory must have 15 bits (there
are 32K = 25 x 210 words to access).
• But each chip pair (each row) requires only 11
address lines (each chip pair holds only 211 words).
– In this situation, a decoder would be needed to decode the
leftmost 4 bits of the address to determine which chip pair
holds the desired address. Once the proper chip pair has
been located, the remaining 11 bits would be input into
another decoder to find the exact address within the chip

COA by Athar Mohsin

The memory
• A single shared memory module causes
sequentialization of access.
• Memory interleaving,
– splits memory across multiple memory modules (or banks),
can be used to help relieve this.
• With low-order interleaving,
– the low-order bits of the address are used to select the bank;
• high-order interleaving,
– the high-order bits of the address are used.

COA by Athar Mohsin

Memory interleaving
• High-order interleaving, the more intuitive organization,
distributes the addresses so that each module contains
consecutive addresses, as we see with the 32 addresses

• Low-order interleaved memory places consecutive words of

memory in different memory modules.

• With the appropriate buses using low-order interleaving, a read

or write using one module can be started before a read or write
using another module actually completes (reads and writes can
be overlapped).
COA by Athar Mohsin