DC BiasingBJTs
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Biasing
Biasing: The DC voltages applied to a transistor in
order to turn it on so that it can amplify the AC signal.
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Operating Point
The DC input
establishes an
operating or
quiescent point
called the Q-point.
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
The Three States of Operation
Active or Linear Region Operation
BaseEmitter junction is forward biased
BaseCollector junction is reverse biased
Cutoff Region Operation
BaseEmitter junction is reverse biased
Saturation Region Operation
BaseEmitter junction is forward biased
BaseCollector junction is forward biased
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
DC Biasing Circuits
Fixed-bias circuit
Emitter-stabilized bias circuit
Collector-emitter loop
Voltage divider bias circuit
DC bias with voltage feedback
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Fixed Bias
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
The Base-Emitter Loop
From Kirchhoffs voltage
law:
Solving for base current:
+V
CC
I
B
R
B
V
BE
= 0
B
BE CC
B
R
V V
I
Since I
E
= ( + 1)I
B
:
Solving for I
B
:
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Collector-Emitter Loop
From Kirchhoffs voltage law:
0
CC
V
C
R
C
I
CE
V
E
R
E
I
Since I
E
I
C
:
) R (R I V V
E C C CC CE
Also:
E BE B R CC B
C C CC E CE C
E E E
V V R I V V
R I - V V V V
R I V
E
R
C
R
CC
V
C
I
CE
V 0 V
E
E
E
R
V
I
BE B E
V V V
E E C C CC CE
R I R I V V
) R (R I V V
I I
E C C CC CE
C E
Load Line Analysis
Cutoff: Saturation:
mA 0 I
V V
C
CC CE
V 0 V
CE
E
R
C
R
CC
V
C
I
Where I
B
<< I
C
:
C
I
B
I
C
I
C
I'
Knowing I
C
= I
B
and I
E
I
C
, the loop
equation becomes:
0 R I V R I R I V
E B BE B B C B CC
Solving for I
B
:
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Collector-Emitter Loop
Applying Kirchoffs voltage law:
I
E
+ V
CE
+ I
C
R
C
V
CC
= 0
Since I
C
I
C
and I
C
= I
B
:
I
C
(R
C
+
RE
) + V
CE
V
CC
=0
Solving for V
CE
:
V
CE
= V
CC
I
C
(R
C
+ R
E
)
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Base-Emitter Bias Analysis
Transistor Saturation Level
E C
CC
Cmax Csat
R R
V
I I
Load Line Analysis
Cutoff: Saturation:
mA 0 I
V V
C
CC CE
V 0 V
CE
E
R
C
R
CC
V
C
I
Csat
CEsat
sat
I
V
R
CEO
CC
cutoff
I
V
R
Saturation current:
To ensure saturation:
Emitter-collector resistance
at saturation and cutoff:
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Switching Time
Transistor switching times:
d r on
t t t
f s off
t t t
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
Troubleshooting Hints
Approximate voltages
V
BE
.7 V for silicon transistors
V
CE
25% to 75% of V
CC
Test for opens and shorts with an ohmmeter.
Test the solder joints.
Test the transistor with a transistor tester or a curve tracer.
Note that the load or the next stage affects the transistor operation.
Copyright 2009 by Pearson Education, Inc.
Upper Saddle River, New Jersey 07458 All rights reserved.
Electronic Devices and Circuit Theory, 10/e
Robert L. Boylestad and Louis Nashelsky
PNP Transistors
The analysis for pnp transistor biasing circuits is the same
as that for npn transistor circuits. The only difference is that
the currents are flowing in the opposite direction.