2. Every Cell needs 64 preambles. 3. To generate the needed 64 preamble for each cell, we use cyclic shift(CS): 4. We need a larger CS for a larger cell radius, since the larger the cell radius, the longer the transmission delay 5. From 4, we need more root sequences to generate the needed 64 preambles for a larger cell radius. 6. But too many root sequences used in a cell is not good because sequences obtained from cyclic shifts of different ZC sequences are not orthogonal. 7. Each cell, then must have a different RootSequenceIndex to avoid the reception of false preambles in adjacent eNodeBs.
2 PrachCS and rootSeqIndex o PrachCS defines the number of cyclic shifts (in terms of number of samples) used to generate multiple preamble sequences from a single root sequence o Example based on PrachCS=12 -> number of cyclic shifts: 119 Root sequence length is 839 so a cyclic shift of 119 samples allows ROUNDDOWN (839/119)= 7 cyclic shifts before making a complete rotation (signatures per root sequence) o 64 preambles are transmitted in the PRACH frame. If one root is not enough to generate all 64 preambles then more root sequences are necessary To ensure having 64 preamble sequences within the cell it is necessary to have ROUNDUP (64/7)= 10 root sequences per cell
3 Parameters Related To RSI
Parameter Name Allowed Range - Engineering unit recomned values Parameter Description NCs Configuration(Zero correlationZone config) 0 to 15 12 parameter used to calculate cyclic shifts of the root Zadoff-chu sequence in the cell
High speed flag TRUE -high Speed , Fasle other wise FALSE Defines the use of restricted set of cyclic shifts of the Zadoof chu root sequence used for high speed moving UE 4 ALU Algorithm RootSequenceIndex
LA6.0.1, rootSequenceIndex (or RSI) is only derived from rootSequenceIndex when bit 24 of LteCell::spare4 is set to 0.
When bit 24 of LteCell::spare4 is set to 1, the RSI is derived automatically as follows
RSI = C1 + mod(floor(PCI/3)N, C2),
Also note that if auto RSI is used (i.e. bit 24 of LteCell::spare4 is set to 1), parameter rootSequenceIndex will not be synched up with the actual RSI value 5 ALU Parameter list 6 3GPP Allocation of sequence