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extract the correct data from biomedical

sensors by using data acquisition systems.

7.1Understand the data acquisition
7.2 Define the type data acquisition
7.3Understand the data acquisition


Data acquisition system

Analog-to-digital converter (ADC)
Digital-to-Analog Converter (D/A)
General Purpose Interface Bus (GPIB)
Sample Rate
Single-ended Input (SE)
Serial Communication Data Acquisition Systems
Parallel Port and Serial port Data Acquisition Systems
Data logger


In computer data processing, data acquisition is the sampling of
real world physical conditions and conversion of the resulting
samples into digital numeric values that can be manipulated by a
Sometimes DAQ, data acquisition typically involves the conversion
of analog signals and waveforms into digital values and processing
the values to obtain desired information. The components of data
acquisition systems include:
Sensors that convert physical parameters to electrical signals.
Signal conditioning circuitry to coerce sensor signals into a form that
can be converted to digital values.
Analog-to-digital converters, which convert conditioned sensor
signals to digital values.


DAQ hardware is what usually interfaces between the signal and a PC. It could be in
the form of modules that can be connected to the computer's ports (parallel, serial,
USB) or cards connected to slots (PCI, ISA, PCI-E) in the mother board.
Usually the space on the back of a PCI card is too small for all the connections
needed, so an external breakout box is required. The cable between this Box and the
PC is expensive due to the many wires, the required shielding, and because it is
DAQ-cards often contain multiple components (multiplexer, ADC, DAC, TTL-IO, high
speed timers, RAM). These are accessible via a bus by a micro controller, which can
run small programs. The controller is more flexible than a hard wired logic, yet
cheaper than a CPU so that it is alright to block it with simple polling loops.
For example: Waiting for a trigger, starting the ADC, looking up the time, waiting for
the ADC to finish, move value to RAM, switch multiplexer, get TTL input, let DAC
proceed with voltage ramp. As 16 bit ADCs, DACs, OpAmps and sample and holds
with equal precision as of 2007 only run at 1 MHz, even low cost digital controllers
like the AVR32 have about 100 clock cycles for bookkeeping in between.

Reconfigurable computing may deliver high speed

for digital signals. Digital signal processors spend a
lot of silicon on arithmetic and allow tight control
loops or filters. The fixed connection with the PC
allows for comfortable compilation and debugging.
Using an external housing a modular design with
slots in a bus can grow with the needs of the user.
High speed binary data needs special purpose
hardware called Time to digital converter and high
speed 8 bit ADCs called oscilloscopes, which are
typically not connected to DAQ hardware, but
directly to the PC.
Also notable is that not all DAQ hardware has to run
permanently connected to a PC, for example
intelligent stand-alone loggers and controllers, which
can be operated from a PC, yet they can operate
completely independent of the PC


DAQ software is needed in order for the DAQ Hardware to work with a PC.
This can come in at least three flavors: applications that register directly
from the hardware, low-level software driver (usually packaged with the
DAQ hardware) to allow developing higher level applications to register data
coming from the hardware and off-the-shelf applications
Driver software that usually comes with the DAQ hardware or from other
vendors, allows the operating system to recognize the DAQ hardware and
programs to access the signals being read by the DAQ hardware. A good
driver offers high and low level access. So one would start out with the high
level solutions offered and improves down to assembly instructions in time
critical or exotic applications.
Off-the-shelf applications include interface for programming means to log,
analyze and display the acquired data. Examples of this kind of software are
MATLAB and LabVIEW, both providing a high level graphical programming

An analog-to-digital converter (abbreviated ADC, A/D or A to D)
is a device which converts continuous signals to discrete digital
numbers. The reverse operation is performed by a digital-to-analog
converter (DAC).
Typically, an ADC is an electronic device that converts an input
analog voltage (or current) to a digital number proportional to the
magnitude of the voltage or current. However, some non-electronic
or only partially electronic devices, such as rotary encoders, can
also be considered ADCs. The digital output may use different
coding schemes, such as binary, Gray code or two's complement


In electronics, a digital-to-analog converter (DAC or D-to-A) is a device for

converting a digital (usually binary) code to an analog signal (current, voltage or
electric charge).
An analog-to-digital converter (ADC) performs the reverse operation
A DAC converts an abstract finite-precision number (usually a fixed-point binary
number) into a concrete physical quantity (e.g., a voltage or a pressure). In particular,
DACs are often used to convert finite-precision time series data to a continuallyvarying physical signal.
A typical DAC converts the abstract numbers into a concrete sequence of impulses
that are then processed by a reconstruction filter using some form of interpolation to
fill in data between the impulses. Other DAC methods (e.g., methods based on Deltasigma modulation) produce a pulse-density modulated signal that can then be filtered
in a similar way to produce a smoothly-varying signal.
By the NyquistShannon sampling theorem, sampled data can be reconstructed
perfectly provided that its bandwidth meets certain requirements (e.g., a baseband
signal with bandwidth less than the Nyquist frequency). However, even with an ideal
reconstruction filter, digital sampling introduces quantization error that makes perfect
reconstruction practically impossible. Increasing the digital resolution (i.e., increasing
the number of bits used in each sample) or introducing sampling dither can reduce
this error


The resolution of the converter indicates the number of discrete values it can
produce over the range of analog values. The values are usually stored
electronically in binary form, so the resolution is usually expressed in bits. In
consequence, the number of discrete values available, or "levels", is usually a
power of two. For example, an ADC with a resolution of 8 bits can encode an
analog input to one in 256 different levels, since 28 = 256. The values can
represent the ranges from 0 to 255 (i.e. unsigned integer) or from -128 to 127
(i.e. signed integer), depending on the application.
Resolution can also be defined electrically, and expressed in volts. The voltage
resolution of an ADC is equal to its overall voltage measurement range divided
by the number of discrete intervals as in the formula:


Q is resolution in volts per step (volts per output code),

EFSR is the full scale voltage range = VRefHi VRefLow,
M is the ADC's resolution in bits.
N is the number of intervals, given by the number of available levels
(output codes), which is: N = 2M

Example 1
Full scale measurement range = 0 to 10 volts
ADC resolution is 12 bits: 212 = 4096 quantization levels (codes)
ADC voltage resolution is: (10V - 0V) / 4096 codes = 10V / 4096 codes 0.00244
V/code 2.44 mV/code

Example 2
Full scale measurement range = -10 to +10 volts
ADC resolution is 14 bits: 214 = 16384 quantization levels (codes)
ADC voltage resolution is: (10V - (-10V)) / 16384 codes = 20V / 16384 codes
0.00122 V/code 1.22 mV/code

Example 3
Full scale measurement range = 0 to 8 volts
ADC resolution is 3 bits: 23 = 8 quantization levels (codes)
ADC voltage resolution is: (8 V 0 V)/8 codes = 8 V/8 codes = 1 V/code = 1000

Sampling rate

Sampling rate
The analog signal is continuous in time and it is necessary to convert this to a
flow of digital values. It is therefore required to define the rate at which new
digital values are sampled from the analog signal. The rate of new values is
called the sampling rate or sampling frequency of the converter.
A continuously varying bandlimited signal can be sampled (that is, the signal
values at intervals of time T, the sampling time, are measured and stored) and
then the original signal can be exactly reproduced from the discrete-time values
by an interpolation formula. The accuracy is limited by quantization error.
However, this faithful reproduction is only possible if the sampling rate is higher
than twice the highest frequency of the signal. This is essentially what is
embodied in the Shannon-Nyquist sampling theorem.
Since a practical ADC cannot make an instantaneous conversion, the input
value must necessarily be held constant during the time that the converter
performs a conversion (called the conversion time). An input circuit called a
sample and hold performs this taskin most cases by using a capacitor to
store the analog voltage at the input, and using an electronic switch or gate to
disconnect the capacitor from the input. Many ADC integrated circuits include
the sample and hold subsystem internally.


The General Purpose Interface Bus (GPIB), also called
IEEE 488
method of communicating with stand-alone instruments,
such as multimeters and oscilloscopes.
many products for controlling instruments with the GPIB.
The most direct method is to install a plug-in GPIB board
in your computer and
connect your instrument directly to this board with a
GPIB cable.

Serial Peripheral Interface Bus

The Serial Peripheral Interface Bus or SPI bus is a
synchronous serial data link standard named by
Motorola that operates in full duplex mode. Devices
communicate in master/slave mode where the master
device initiates the data frame. Multiple slave devices
are allowed with individual slave select (chip select)
lines. Sometimes SPI is called a "four wire" serial bus,
contrasting with three, two, and one wire serial buses.

The SPI bus can operate with a single master device and with
one or more slave devices.
If a single slave device is used, the SS pin may be fixed to logic
low if the slave permits it. Some slaves require the falling edge
(high->low transition) of the slave select to initiate an action
such as the MAX1242 by Maxim, an ADC, that starts
conversion on said transition. With multiple slave devices, an
independent SS signal is required from the master for each
slave device.
Most slave devices have tri-state outputs so their MISO signal
becomes high impedance ("disconnected") when the device is
not selected. Devices without tristate outputs can't share SPI
bus segments with other devices; only one such slave could
talk to the master, and only its chipselect could be activated.

Data Transmission

A typical hardware setup using two shift registers to form an inter-chip circular buffer
To begin a communication, the master first configures the clock, using a frequency less
than or equal to the maximum frequency the slave device supports. Such frequencies are
commonly in the range of 1-70 MHz.
The master then pulls the slave select low for the desired chip. If a waiting period is
required (such as for analog-to-digital conversion) then the master must wait for at least
that period of time before starting to issue clock cycles.
During each SPI clock cycle, a full duplex data transmission occurs:
the master sends a bit on the MOSI line; the slave reads it from that same line
the slave sends a bit on the MISO line; the master reads it from that same line
Not all transmissions require all four of these operations to be meaningful but they do
Transmissions normally involve two shift registers of some given word size, such as eight
bits, one in the master and one in the slave; they are connected in a ring. Data is usually
shifted out with the most significant bit first, while shifting a new least significant bit into the
same register. After that register has been shifted out, the master and slave have
exchanged register values. Then each device takes that value and does something with it,
such as writing it to memory. If there is more data to exchange, the shift registers are
loaded with new data and the process repeats.
Transmissions may involve any number of clock cycles. When there is no more data to be
transmitted, the master stops toggling its clock. Normally, it then deselects the slave.
Transmissions often consist of 8-bit words, and a master can initiate multiple such
transmissions if it wishes/needs. However, other word sizes are also common, such as 16bit words for touchscreen controllers or audio codecs, like the TSC2101 from Texas
Instruments; or 12-bit words for many digital-to-analog or analog-to-digital converters.
Every slave on the bus that hasn't been activated using its slave select line must disregard
the input clock and MOSI signals, and must not drive MISO. The master must select only
one slave at a time.

Parallel Bus Interface

The Parallel Bus Interface or PBI is a 50-pin port found
on some Atari 8-bit XL computers. It provides
unbuffered, direct connection to the system bus lines
(address, data, control), running at the same speed as
the 6502 CPU.
The 600XL and 800XL computers, along with the
unreleased 1400XL and 1450XLD had a PBI interface.
The XE systems came with the Enhanced Cartridge
Interface (ECI), a functionally similar connection.

parallel port

A parallel port is a type of interface found on computers (personal and

otherwise) for connecting various peripherals. In computing, a parallel port
is a parallel communication physical interface. It is also known as a printer
port or Centronics port. The IEEE 1284 standard defines the bi-directional
version of the port. This transmits particular amount of bits in parallel at the
same time. This is opposite to serial transition where one bit will be
transmitted at a time.

Before the advent of USB, the parallel interface was adapted to access a
number of peripheral devices other than printers. Probably one of the
earliest devices to use parallel were dongles used as a hardware key form
of software copy protection. Zip drives and scanners were early
implementations followed by external modems, sound cards, webcams,
gamepads, joysticks and external hard disk drives and CD-ROM drives.
Adapters were available to run SCSI devices via parallel. Other devices
such as EPROM programmers and hardware controllers could be
connected parallel.

A DB-25 parallel printer

port, as on IBM-PC
style, and a few other
types of computers.

Micro ribbon 36 pin

female, such as on
printers and on some
(particularly industrial
and early- and pre-1980s
personal) computers.

Serial port
Serial communication is a popular means of transmitting
data between a computer and a peripheral device such
as a printer, a plotter, or a programmable instrument.
Serial communication uses a transmitter to send data,
one bit at a time, over a single communication line to a
This method of communication is common when
transferring data at low rates or over long distances.
For instance, serial data can be transferred via modems,
over standard telephone lines.

Serial communication is popular because

most computers have one or two serial
A limitation of serial communication,
however, is that a serial port can
communicate with only one device.
To accommodate several devices, must
use a board with multiple serial ports or a
serial port multiplexer box.


USB (Universal Serial Bus) is a specification to establish communication

between devices and a host controller (usually personal computers),
developed and invented Intel. USB is intended to replace many varieties of
serial and parallel ports. USB can connect computer peripherals such as
mice, keyboards, digital cameras, printers, personal media players, flash
drives, and external hard drives. For many of those devices, USB has
become the standard connection method. USB was designed for personal
computers, but it has become commonplace on other devices such as
smartphones, PDAs and video game consoles, and as a power cord
between a device and an AC adapter plugged into a wall plug for charging.


The Electronics Industries Association (EIA) standard RS-232-C[1] as of 1969 defines:

Electrical signal characteristics such as voltage levels, signaling rate, timing and slew-rate of signals, voltage
withstand level, short-circuit behavior, and maximum load capacitance.
Interface mechanical characteristics, pluggable connectors and pin identification.
Functions of each circuit in the interface connector.
Standard subsets of interface circuits for selected telecom applications.
The standard does not define such elements as
character encoding (for example, ASCII, Baudot code or EBCDIC)
the framing of characters in the data stream (bits per character, start/stop bits, parity)
protocols for error detection or algorithms for data compression
bit rates for transmission, although the standard says it is intended for bit rates lower than 20,000 bits per second.
Many modern devices support speeds of 115,200 bit/s and above
power supply to external devices.
Details of character format and transmission bit rate are controlled by the serial port hardware, often a single
integrated circuit called a UART that converts data from parallel to asynchronous start-stop serial form. Details of
voltage levels, slew rate, and short-circuit behavior are typically controlled by a line-driver that converts from the
UART's logic levels to RS-232 compatible signal levels, and a receiver that converts from RS-232 compatible
signal levels to the UART's logic levels.

RS232 DB9 pinout

DEC MMJ pinout

RS232 DB25 pinout

RS-232 signals and pin assignments

Commonly-used signals are:
Transmitted Data (TxD)
Data sent from DTE to DCE.
Received Data (RxD)
Data sent from DCE to DTE.
Request To Send (RTS)
Asserted (set to logic 0, positive voltage) by DTE to prepare DCE to receive data. This may require
action on the part of the DCE, e.g. transmitting a carrier or reversing the direction of a half-duplex
channel. For the modern usage of "RTS/CTS handshaking," see the section of that name.
Ready To Receive (RTR)
Asserted by DTE to indicate to DCE that DTE is ready to receive data. If in use, this signal appears
on the pin that would otherwise be used for Request To Send, and the DCE assumes that RTS is
always asserted; see RTS/CTS handshaking for details.
Clear To Send (CTS)
Asserted by DCE to acknowledge RTS and allow DTE to transmit. This signaling was originally used
with half-duplex modems and by slave terminals on multidrop lines: The DTE would raise RTS to
indicate that it had data to send, and the modem would raise CTS to indicate that transmission was
possible. For the modern usage of "RTS/CTS handshaking," see the section of that name.
Data Terminal Ready (DTR)
Asserted by DTE to indicate that it is ready to be connected. If the DCE is a modem, this may "wake
up" the modem, bringing it out of a power saving mode. This behaviour is seen quite often in modern
PSTN and GSM modems. When this signal is de-asserted, the modem may return to its standby
mode, immediately hanging up any calls in progress.
Data Set Ready (DSR)
Asserted by DCE to indicate the DCE is powered on and is ready to receive commands or data for
transmission from the DTE. For example, if the DCE is a modem, DSR is asserted as soon as the
modem is ready to receive dialing or other commands; DSR is not dependent on the connection to
the remote DCE (see Data Carrier Detect for that function). If the DCE is not a modem (e.g. a null
modem cable or other equipment), this signal should be permanently asserted (set to 0), possibly by
a jumper to another signal.
Data Carrier Detect (DCD)
Asserted by DCE when a connection has been established with remote equipment.
Ring Indicator (RI)
Asserted by DCE when it detects a ring signal from the telephone line


EIA-485 only specifies electrical characteristics of the driver and the receiver. It does not specify or recommend
any data protocol. EIA-485 enables the configuration of inexpensive local networks and multidrop communications
links. It offers high data transmission speeds (35 Mbit/s up to 10 m and 100 kbit/s at 1200 m). Since it uses a
differential balanced line over twisted pair (like EIA-422), it can span relatively large distances (up to 4000 feet or
just over 1200 meters).
In contrast to EIA-422, which has a single driver circuit which cannot be switched off, EIA-485 drivers need to be
put in transmit mode explicitly by asserting a signal to the driver. This allows EIA-485 to implement linear
topologies using only two wires. The equipment located along a set of EIA-485 wires are interchangeably called
nodes, stations and devices. [1]
The recommended arrangement of the wires is as a connected series of point-to-point (multidropped) nodes, a line
or bus, not a star, ring, or multiply-connected network. Ideally, the two ends of the cable will have a termination
resistor connected across the two wires. Without termination resistors, reflections of fast driver edges can cause
multiple data edges that can cause data corruption. Termination resistors also reduce electrical noise sensitivity
due to the lower impedance, and bias resistors (see below) are required. The value of each termination resistor
should be equal to the cable impedance (typically, 120 ohms for twisted pairs).
Star and ring topologies are not recommended because of signal reflections or excessively low or high termination
impedance. But if a star configuration is unavoidable, such as when controlling multiple pan-tilt-zoom video
cameras from a central video surveillance hub, special EIA-485 star/hub repeaters are available which
bidirectionally listen for data on each span and then retransmit the data onto all other spans.
Somewhere along the set of wires, pull up or pull down resistors are established to Fail-safe bias each data
line/wire when the lines are not being driven by any device. This way, the lines will be biased to known voltages
and nodes will not interpret the noise from undriven lines as actual data; without biasing resistors, the data lines
float in such a way that electrical noise sensitivity is greatest when all device stations are silent or unpowered


A data logger (also datalogger or data recorder) is an electronic device that records data over
time or in relation to location either with a built in instrument or sensor or via external instruments
and sensors. Increasingly, but not entirely, they are based on a digital processor (or computer).
They generally are small, battery powered, portable, and equipped with a microprocessor, internal
memory for data storage, and sensors. Some data loggers interface with a personal computer and
utilize software to activate the data logger and view and analyze the collected data, while others
have a local interface device (keypad, LCD) and can be used as a stand-alone device.
Data loggers vary between general purpose types for a range of measurement applications to
very specific devices for measuring in one environment or application type only. It is common for
general purpose types to be programmable however many remain as static machines with only a
limited number or no changeable parameters. Electronic dataloggers have replaced chart
recorders in many applications.
One of the primary benefits of using data loggers is the ability to automatically collect data on a
24-hour basis. Upon activation, data loggers are typically deployed and left unattended to
measure and record information for the duration of the monitoring period. This allows for a
comprehensive, accurate picture of the environmental conditions being monitored, such as air
temperature and relative humidity.
Due to the technology involved in manufacturing some of the higher-end dataloggers, they can be
quite expensive.