!
Objective to efficiently reduce DC voltage
The DC equivalent of an AC transformer
Iin
+
Vin
Iout
DCDC Buck
Converter
+
Vout
Lossless objective: Pin = Pout, which means that VinIin = VoutIout and
Vout
I in
Vin
I out
2
R1
+
Vin
+
R2
Vout
R2
Vout Vin
R1 R2
Vout
R2
R1 R2 Vin
If Vin = 39V, and Vout = 13V, efficiency is only 0.33
Unacceptable except in very low power applications
Switch closed
Switch open
39
+
39Vdc
Rstereo
0
DT
T
Open, 0Vdc
Rstereo
L
+
39Vdc
Rstereo
lossless
L
+
39Vdc
Rstereo
dv ( t )
dt
t
1 o t
i ( t )dt
which leads to v ( t ) v ( to )
C
to
Since the capacitor is in periodic steady state, then the voltage at time t o is the same as the voltage one
period T later, so
v ( to T ) v ( to ), or
t
1 o T
v ( to T ) v ( to ) 0
i ( t )dt
C
to T
i ( t )dt 0
to
to
the average current through a capacitor operating in periodic steady state is zero
Now, an inductor
di ( t )
dt
which leads to
t
1 o t
i ( t ) i ( to )
v ( t )dt
L
to
Since the inductor is in periodic steady state, then the voltage at time t o is the same as the voltage one
period T later, so
i ( to T ) i ( to ), or
t
1 o T
i ( to T ) i ( to ) 0
v ( t )dt
L
to T
v ( t )dt 0
to
to
the average voltage across an inductor operating in periodic steady state is zero
Since KVL and KCL apply at any instance, then they must also be valid
in averages. Consider KVL,
v(t )
0, v1 ( t ) v2 ( t ) v3 ( t ) v N ( t ) 0
Around loop
t
t
t
t
t
1 o T
1 o T
1 o T
1 o T
1 o T
v1 ( t )dt
v2 ( t )dt
v3 ( t )dt
v N ( t )dt
(0)dt 0
T
T
T
T
T
to
to
to
to
to
i (t )
Out of node
0,
i1 ( t ) i2 ( t ) i3 ( t ) i N ( t ) 0
i(t ) C
dv ( t )
dt
di ( t )
dt
Buck converter
+ vL
iL
iin
Iout
Vin
iC
+
Vout
iin
Vin
Iout
Iout
L
C
+
Vout
0A
10
+ (Vin Vout)
iL
Iout
Vin
(iL Iout)
+
Vout
vL L
diL
,
dt
vL Vin Vout ,
Vin Vout L
diL
,
dt
dt
L
for DT seconds
11
iL
Iout
Vin
(iL Iout)
+
Vout
vL L
diL
,
dt
vL Vout ,
Vout L
diL
,
dt
diL Vout
dt
L
!
Since the average voltage across L is zero
I in
I out
D
13
diL Vout
vL Vout ,
dt
L
Switch open,
Vout
A / sec
L
iL
Imax
Iavg = Iout
Vin Vout
A / sec
L
Imin
DT
dt
L
Periodic finishes
a period where it
started
(1 D)T
T
14
I is unchanged
Lowering Iout (and, therefore, Pout ) moves the circuit
toward discontinuous operation
15
Lower f
Raise f
Lower L
Raise L
17
Sawtooth
V
2T
2
1
V
V
V
2
2
3T
Vrms t dt
t dt
t
3
3
0
T T
T
3
T
0
0
V
Vrms
3
18
Using the power concept, it is easy to reason that the following waveforms
would all produce the same average power to a resistor, and thus their rms
values are identical and equal to the previous example
V
-V
V
Vrms
3
19
Now, consider a useful example, based upon a waveform that is often seen in
DC-DC converter currents. Decompose the waveform into its ripple, plus its
minimum value.
i (t )
Imax Imin
the ripple
i (t )
Imax
I avg
Imin
+
the minimum value
I avg
Imax Imin
2
Imin
0
20
2
I rms
Avg i (t ) I min 2
2
2
I rms
Avg i2 (t ) 2i (t ) I min I min
2
2
I rms
Avg i2 (t ) 2 I min Avg i (t ) I min
2
I rms
I max I min 2
2I
3
I max I min I 2
min
min
2
2
I PP
2
2
I rms
I min I PP I min
21
2
I rms
2
I PP
I
I
I avg PP I PP I avg PP
3
2
2
2
I rms
2
2
I PP
I PP
2
I avg I PP
I avg
I avg I PP
3
2
2
I rms
2
I PP
2
I PP
2
I avg
2
I PP
2
2
I rms I avg
i (t )
I avg
2
I PP
4
I avg
I max I min
2
I PP I max I min
12
22
1 2
1
2
I pp I out
I 2
12
12
iL
Iavg = Iout
0
2
2
I Lrms
I out
1
2
2I out 2 4 I out
12
3
2
I Lrms
I out
3
Use max
23
Iout
L
C
Iout
iC = (iL Iout)
(iL Iout)
Iout
1
2
2 I out 2 02 1 I out
12
3
Use max
I
I Crms out
3
24
iin
Iout
L
C
(iL Iout)
2Iout
Iout
0
2Iout
Iout
0
Use max
Take worst case D for each
I rms
2
I out
3
25
!
Worst-case load ripple voltage
Iout
0
Iout
iC = (iL Iout)
C charging
T/2
During the charging period, the C voltage moves from the min to the max.
The area of the triangle shown above gives the peak-to-peak ripple voltage.
1 T
Q 2 2 I out T I out I out
V
C
C
4C
4Cf
Raising f or L reduces the load voltage ripple
26
Voltage ratings
iL
iin
Switch Closed
Iout
C sees Vout
Vin
iC
+
Vout
iL
Switch Open
Vin
Iout
L
C
iC
+
Vout
27
!
There is a 3rd state discontinuous
Iout
MOSFET
Vin
L
DIODE
Iout
+
Vout
vL = (Vin Vout)
Switch
closed
vL = Vout
Switch open
iL
Vout
A / sec
L
0
(1 D)T
Vout
Vout 1 D
2 I out
1 D T
Lonset
Lonset f
Vout 1 D
Lonset
2 I out f
Then, considering the worst case (i.e., D 0),
Vout
L
2 I out f
use max
30
Impedance matching
Iout = Iin / D
Iin
+
Source
DCDC Buck
Converter
Vin
Vout = DVin
V
Rload out
I out
Iin
+
Vin
Equivalent from
source perspective
Requiv
Vout
V
Vout
R
D
Requiv in
load
I in I out D I out D 2
D2
Isc
Rload
Voc
I-V characteristic of 6.44 resistor
29V
6.44
4.5 A
130W
2
r
esi
st
or
55W
4 or
4
.
6 si st
re
R
Requiv load , D
D2
Rload
2
0.56
Requiv
6.44
33
ipanel
Vpanel
+ vL
iL
Iout
L
C
iC
+
Vout
BUCK DESIGN
9A
10A
250V
5.66A
Our components
200V, 250V
16A, 20A
40V
10A
40V
Likely worst-case buck situation
10A
Our L. 100H, 9A
Our C. 1500F, 250V, 5.66A p-p
Our D (Diode). 200V, 16A
Our M (MOSFET). 250V, 20A
35
BUCK DESIGN
10A
0.033V
1500F 50kHz
Our L. 100H, 9A
Our C. 1500F, 250V, 5.66A p-p
Our D (Diode). 200V, 16A
Our M (MOSFET). 250V, 20A
36
BUCK DESIGN
40V
200H
2A
50kHz
Our L. 100H, 9A
Our C. 1500F, 250V, 5.66A p-p
Our D (Diode). 200V, 16A
Our M (MOSFET). 250V, 20A
37