EI 7th SEM
Anant Shrivastava
INTRODUCTION
tinyAVRs
1-8 kB program memory
8-20-pin package
Limited peripheral set
megaAVRs
4-256 kB program memory
28-100-pin package
Extended instruction set and peripheral set
Application specific AVRs
megaAVRs with special features not found
on the other members of the AVR family,
such as LCD controller, USB controller,
advanced PWMAnant
etc.
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Device Architecture
Data RAM
Flash, EEPROM, and SRAM are all integrated onto a
single chip, removing the need for external memory
(though still available on some devices).
Program Memory
Program instructions are stored in non-volatile Flash
memory. Although they are 8-bit MCUs, each
instruction takes 16 bits with an 8-bit opcode followed
by 8 bits of data or an address to be modified by the
previous instruction. So the flash memory is actually
addressed in a 16-bit fashion.
Internal Data Memory
The data address space consists of the register file, I/O
registers, and SRAM. The AVRs have 32 single-byte
registers and are classified
8-bit RISC devices.
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Features
MORE FEATURES
Synchronous/Asynchronous Serial Peripherals
(UART/USART)
Serial Peripheral Interface Bus (SPI)
Universal Serial Interface (USI) for Two/Three-Wire
Synchronous Data Transfer
Brownout Detection
Watchdog Timer (WDT)
Multiple Power-Saving Sleep Modes
Lighting and motor control (PWM Specific) Controller
models
10-Bit A/D Converters, with multiplex of up to 16
channels
A variety of serial interfaces, including
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