GENERAL INTRODUCTION

and
FABRICATION OF MOSFET

Dr. Arti Noor,

M. Tech Division, CDAC Noida.
Email : artinoor@cdacnoida.in

14-9-2009 Lecture-1
 

Course Outline:
• Basic MOS Theory : Introduction, Basic MOS Model,
MOS inverter, MOS Circuit Layout & Simulation.
• Combinational MOS Logic Design : Static and Dynamic
MOS Design.
• Sequential MOS Logic Design.
• Interconnect & Clock Distribution.
• BiCMOS Logic Circuits.

Details are given in Handout.

LAB TOOLS
Tanner Tools.
Mentor Graphics Tools.
Lecture-1
 

TEXT BOOKS:
1. Kang & Leblebigi “CMOS Digital IC Circuit Analysis &
Design”- McGraw Hill, 2003.

2. Rabey, “Digital Integrated Circuits Design”, Pearson

Education, Second Edition, 2003.

References:
• Weste and Eshraghian, “Principles of CMOS VLSI design”
Addison-Wesley, 2002.

• Additional reading from selected journals / papers.

Lecture-1
 

Course Objectives:
Students should be able to :
 Derive basic analytical MOS circuit equations.
 Locate information not presented in class, in the library.
 Analyze circuits using both analytical and CAD tools.
 Use a design flow to design a CMOS integrated circuit in a team
environment.
 Interpret a design specification.
 Design test benches that can prove that a design meet a
specification.
 Identify regions where circuit models are valid.

Lecture-1
 

Course Objectives

• For students to learn IC design using

state-of-art design flows and CAD tools.

Lecture-1
 

Lets get started…

• We will review (learn for first time?) MOS

physics (in detail).

• Why MOSFET’s?
– CMOS circuits dissipate power only when switching
(they do use power when not switching, but is much
less than other circuits).

– This allows for more circuits to be placed on one die.

Lecture-1
SIMPLIFIED VLSI DESIGN FLOW VIEW IN
THREE DOMAINS

Lecture-1
 

Introduction

IC technologies :

• NMOS
• PMOS
• CMOS
• SOI
• BiCMOS
• GaAs

Lecture-1
 

Basic Fabrication Steps:

• Wafer Processing.
• Mask making.
• Photolithography.
• Oxidation.
• Diffusion.
• Etching.
• Poly-gate formation.
• Metallization.

Lecture-1
 

Basic Fabrication Steps:

Wafer Processing : single crystal wafer, diameter
70 mm to 200 mm, thickness less than 1mm, front face
polished, scratch free mirror finish.

Lecture-1
 

Basic Fabrication Steps:

Mask making :
• After complete design the drawing is broken into
subsequent IC processing steps.
• These steps are called mask levels.
• Electron beam machine known as pattern
generator is used for mask making.
• The interface is CIF between layout and mask
machine.
• Mask machine transfers design features directly on
photosensitive glass plate using CIF.

Lecture-1
 

Basic Fabrication Steps:

Photolithography : The process used to transfer a

pattern on wafer is called lithography. The process
has 6 steps.

1. Photoresist Coating.
2. Pre baking.

Lecture-1
 

Basic Fabrication Steps:

3. Alignment and exposing.

Lecture-1
 

Basic Fabrication Steps:

4. Development.
5. Post baking.

Lecture-1
 

Basic Fabrication Steps:

6. Etching Removal of photoresist.

Lecture-1
 

Basic Fabrication Steps:

Wafer after Removal of photoresist.

Lecture-1
 

Basic Fabrication Steps:

Oxidation : The purpose of SiO2 layer is

1. acts as component in MOS.

2. acts as mask against diffusion.
3. used to isolate the devices
4. provides electrical isolation in multilevel
metallization.
Several techniques : thermal oxidation, wet
oxidation, CVD, Plasma oxidation.
LOCOS Oxidation for isolation.
Lecture-1
 

Basic Fabrication Steps:

Diffusion : The purpose is to alter the type of conductivity

by diffusing impurities.

Goal :
1. Control of impurity concentration.
2. Uniformity.
3. Reproducibility.

Two techniques : Furnace diffusion and Ion

Implantation.

Lecture-1
 

Basic Fabrication Steps:

Metallization :

• Is done to provide low resistance interconnects.

• Common method is evaporation and sputtering.

• In high vacuum chamber the metal is deposited by

evaporation with subsequent condensation on
substrate target.

Lecture-1
 

Basic NMOS Fabrication Steps:

Formation of SiO2 and then photoresist coating

Lecture-1
 

Basic NMOS Fabrication Steps:

Photo-mask and then etching of selected area.

Lecture-1
 

Basic NMOS Fabrication Steps:

The wafer is then placed into an oxidation furnace and
thin oxide (the gate oxide) is grown to cover the etched
region

Lecture-1
 

Basic NMOS Fabrication Steps:

A layer of poly-crystalline silicon is deposited all over the
wafer.
This layer is then patterned and etched to form the gate
of transistor.

Lecture-1
 

Basic NMOS Fabrication Steps:

An n-type dopant is introduced into the opened regions

and diffused into the wafers.

Lecture-1
 

Basic NMOS Fabrication Steps:

Oxide is deposited using Low Pressure Chemical Vapor
Deposition (LPCVD) and is used for top coat protection.

Lecture-1
 

Basic NMOS Fabrication Steps:

A layer of aluminum is deposited all over the wafer and
patterned and etched to form the interconnecting layers
and the connections to channel Metal Oxide
Semiconductor.

Lecture-1
 

N-Well CMOS Fabrication Steps

Lecture-1
 

N-Well CMOS Fabrication Steps (contd.)

Lecture-1
 

N-Well CMOS Fabrication Steps (contd.)

Lecture-1
 

N-Well CMOS Fabrication Steps (contd.)

Lecture-1
 Next Class Topic

Design Rules and MOS Transistor

Lecture-1