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Microprocessors and

Microcontrollers
-Module 1Basheer V P
Asst. Professor
Department of Electronics and
Communication Engineering
A Ameen Engineering College

Module-1
Software architecture of the INTEL
8086
Address space & Data organization
Memory segmentation and addressing
Data Types
Registers
Stack
I/O space
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Software Model of the 8086


Microprocessors

Purpose of developing the software model is


to aid the programmer in understanding the
operation of the microprocessor system
from a software point of view.
To be able to program a processor,

No need to know all of its hardware,


interconnections etc.
But important to the programmer to know the
various registers and to know their purpose,
functions, operating capabilities and limitations.
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Software Model of the 8086


Microprocessors

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Software Model of the 8086Description

----For the detailed description of the


different elements of the software
architecture, refer the same note of
hardware architecture.----

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Memory segmentation and


addressing
Need for Segmentation

To implement Harvard architecture


Easy to debug
Same Interfacing ICs can be used
To avoid overlap of stack with normal memory
Compatible with 8085

for reference:
Von Newman architecture
Single pool of memory, no separate Program Memory & Data
Memory.

Harvard architecture
Separate Program Memory & Data Memory.)
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Segmented Memory

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Four Segments

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Segments, Segment
Registers & Offset
Registers

4 Segments in 8086
Code Segment (CS)

Data Segment (DS)SEGMENT


Stack Segment (SS)
Extra Segment (ES)

Code

SEGMEN
T
REGISTE
R

Instruction
Pointer (IP)

DSR

Source Index
(SI)

ESR

Destination
Index (DI)

SSR

Stack Pointer
(SP) / Base
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Segment
Extra
Segment
Stack
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REGISTER

CSR

Segment
Data

OFFSET

Segment : Offset
Address
Logical Address is specified as segment:offset
Physical address is obtained by shifting the
segment address 4 bits to the left and adding
the offset address.
Thus the physical address of the logical address
A4FB:4872 is:
A4FB0
+ 4872
A9822
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Memory Address
Generation
The BIU has a dedicated adder for
determining physical memory addresses.
Offset Value (16 bits)

Segment Register (16 bits)

0000

Adder

Physical Address (20 Bits)

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Address space &


Data organization
Address space :
The 8086 supports 1Mbyte of external
memory
The memory space is organized as
individual bytes of data stored at
consecutive addresses over the address
range 0000016 to FFFFF16 (or 00000H to
FFFFFH)

Memory address sp

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Data organization
8086 can access any two consecutive
bytes as a word of data.
The lower-addressed byte is the least
significant byte and the higheraddressed byte is the most significant
byte

Storing a word in memory


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Aligned and misaligned


data word
Even address boundary: A word at an even address boundary
corresponds to two consecutive bytes , with
the least byte located at an even address.
Also called aligned word

Odd address boundary: A word at an odd address boundary


corresponds to two consecutive bytes , with
the least byte located at an odd address.
Also called misaligned word
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Aligned and misaligned


data word

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Aligned and misaligned double


words of data

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Storing double word in


memory

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Data Types
Different data types supported by 8086
are,
Integer (Unsigned and Signed)
BCD (Unpacked and Packed) and
ASCII Codes.

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Data Types
Unsigned
byte
integer
0 - 255
Unsigned word integer
0 65,535

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Data Types

-128 - +127

Signed
integers
-32,768 - +32,767

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Data Types

Unpacked BCD

Binary Coded
Decimal (BCD)

Packed BCD

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American Standard Code for


Information Interchange (ASCII)

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The Stack
The stack is used for temporary storage of
information such as data or addresses.
When a CALL is executed, the 8086 automatically
PUSHes the current value of CS and IP onto the
stack.
Other registers can also be pushed
Before return from the subroutine, POP
instructions can be used to pop values back from
the stack into the corresponding registers.
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The Stack
SP contains an offset value that points to a location
in the current stack segment.
The address obtained from the contents of SS and SP
(SS:SP) is the physical address of the last storage
location in the stack to which data were pushed. This
memory address is known as top of the stack.
At the start up, the value in SP is initialized to FFFE.
Combining this value with the current value in SS
gives the highest addressed word location in the
stack (SS:FFFE)- that is the bottom of the stack.
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The Stack
Data transferred to and from the stack are
word wide not byte wide.
Each time a word is to be pushed on to the
stack, SP is decremented by 2, and then
contents of the register are written in to the
stack.
During the pop operation, the co tents are
first popped off to the register and then SP is
automatically incremented by 2.
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The Stack

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Example for PUSH

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Example for POP

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The I/O address space


8086 has separate memory and I/O address
spaces.
The I/O address space is the place where I/O
interfaces such as printer etc are implemented.
I/O address space is from 0000 to FFFF (64K).
Therefore I/O addresses are 16 bits long.
Eight locations from 00F8 to 00FF are reserved
by Intel Corporation.
The rest of the locations can be used by the
user.
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The I/O address space

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