Digital Electronics

Electronics Technology
Landon Johnson
Multiplexers
Demultiplexers

Mux/Demux Competencies
47. Given 2 logic symbols, the student will identify the
multiplexor and demultiplexor with 100% accuracy.
48. Given four different input combinations to an 8
to 1 multiplexor, the student will state the output
logic levels for each input combination with 100%
accuracy.
49. Given four different input combinations to a 1 to
8 demultiplexor, the student will state the output
logic levels for each input combination with 100%
accuracy.
50. Given a Boolean equation the student will draw a
multiplexor circuit that will implement this function with
100% accuracy.
51. Given a Boolean equation the student will draw a
demultiplexor circuit that will implement this function
with 100% accuracy.

Mux/Demux Vocabulary
MULTIPLEXER (aka DATA SELECTOR)- circuit that can select one of
a number of inputs and pass the logic level of that input to the output.
DEMULTIPLEXER (aka DATA DISTRIBUTOR)- circuit that depending on
the status of its select inputs will channel its data input to one of several
outputs.
SELECT INPUTS (aka ADDRESS LINES)- used by the mux to determine
which data inputs will be switched to the output.

if 2 N input lines N select lines

BASIC TWO-INPUT MULTIPLEXER

I1
DATA
INPUT S

Z I 0 S I1 S
I0

S
SELECT INPUT

FOUR-INPUT MULTIPLEXER
I0

I1

I2

I3

S1

S0

8-to-1 ENCODER

MULTIPLEXER LOGIC DIAGRAM

Takes one of many inputs and funnels it to an output Z.
Take the selector lines convert to a decimal number and this is the
input funneled to the output.
Strobe is active low enable
D
A
T
A
I
N
P
U
T
S

I0
I1
I2

74151

I3

Z
_
Z

MUX

I4
I5
I6
I7
E

SELECT LINES

MULTIPLEXER APPLICATIONS
DATA ROUTING
PARALLEL-TO-SERIAL CONVERSION
OPERATION SEQUENCING
IMPLEMENT LOGIC FUNCTION OF A
TRUTH TABLE

LOGIC FUNCTION GENERATION

+5

I0
I1
I2
I3
I4
I5
I6
I7
E

74151

Z ABC ABC ABC

MUX

TEST
FILL IN THE TABLE
1

I0

0
1
0
1
0

I1
I2
I3
I4
I5

1
0

I6
I7

f(ABC)
MUX

TEST
FILL IN THE TABLE
1

I0

0
1
0
1
0

I1
I2
I3
I4
I5

1
0

I6
I7

f(ABC)
MUX

TEST
FILL IN THE TABLE
L
M
N
O

I0
I1
I2
I3
S

B
P

I0

I1

I0
I1

Y
S

A
S

TEST
FILL IN THE TABLE
L
M
N
O

I0
I1
I2
I3
S

B
P

I0

I1

I0
I1

Y
S

A
S

TEST
WRITE A BOOLEAN EXPRESSION FOR THE
CIRCUIT

1
0
1
1

I0
I1
I2
I3
S

f(AB)

A B A B AB
1

DEMULTIPLEXER
1-of-8 DECODER

DEMULTIPLEXER LOGIC DIAGRAM

Logic circuit that depending on the status of its select inputs will funnel
its data input to one of several data outputs.
Separate enable inputs (useful for cascading decoders) into AND gate
which must be high to enable the decoder outputs.
O0
O1
O2
O3

E3
E2
E1

74138
DEMUX
1-OF-8 DECODER

O4
O5
O6
O7

SELECT LINES

LOGIC FUNCTION GENERATION

74138

O0

O1
O2
O3

+5
E3

O4
O5
O6
O7

E2
E1
A

NAND- any low in gives a high out

f(ABC)

LAB 35. A SECURITY MONITORING SYSTEM

TEST
NAME THE CIRCUIT
O0
O1
O2
O3
E3

O4
O5

E2

O6
O7

E1
A

TEST
NAME THE CIRCUIT
I0
I1
I2
I3
I4
I5
I6
I7
E

TEST
STATE THE BOOLEAN
+5
EXPRESSION

A BC ABC ABC

I0
I1
I2

74151

I3

MUX

I4
I5
I6
I7
E

S
C

TEST
STATE THE BOOLEAN
EXPRESSION
O0

O1
O2
O3

+5
E3

O4
O5
O6
O7

E2
E1
A

A BC ABC ABC

74138

f(ABC)