t1 : PC MAR
t 2 : MEMORY MDR
t3 : PC 1 PC
MDR IR
t1 : IR MAR
t 2 : MEMORY MDR
t3 : MDR IR
t1 : PC MDR
t 2 : Saved Address MAR
Routine Address PC
t 3 : MDR MEMORY
t1 : IR MAR
t 2 : MEMORY MDR
t 3 : MDR R1 R1
Instruction Cycle
Each phase decomposed into sequence of elementary
micro-operations (fetch, indirect, and interrupt cycles)
Execute cycle
One sequence of micro-operations for each opcode
Need to tie sequences of micro-operations together
Assume new 2-bit register
Instruction cycle code (ICC) designates which part of
cycle the processor is in:
00: Fetch
10: Execute
01: Indirect
11: Interrupt
Functional Requirements
Define basic elements of processor
Describe micro-operations processor performs
Determine functions control unit must perform
Registers
Control Unit
Types of Micro-operation
Sequencing
Causes the processor to step through a series of micro-operations
Execution
Causes the performance of each micro-operation
Clock
One micro-instruction (or set of simultaneous micro instructions)
per clock pulse.
Instruction register
Op-code of the current instruction
Determines which micro-instructions are performed
Flags
Determines the status of the processor
Results of previous ALU operations
PROCESSOR ORGANIZATION
Organization is how features are
implemented
Control signals, interfaces, memory
technology.
e.g. Is there a hardware multiply unit or is it
done by repeated addition
Internal Organization
Usually a single internal bus
Using single bus simplifies & saves space
Gates control movement of data onto and off
the bus
Control signals control data transfer to and
from external systems bus
Temporary registers needed for proper
operation of ALU
CPU Clock
Clock
Repetitive sequence of pulses
Useful for measuring duration of micro-ops
Must be long enough to allow signal
propagation
Different control signals at different times
within instruction cycle
Need a counter with different control signals
for t1, t2 etc.
Hardwired Implementation
Control unit inputs
Flags and control bus
Each bit means something
Instruction register
Op-code causes different control signals for
each different instruction
Decoder takes encoded input and produces
single output
n binary inputs and 2n outputs
Hardwired Logic
Logic Gates Hardwired Internally
Functions predefined
Truth Tables
Boolean Logic used to define timing
Connect Instructions
Unique logic for each set of op-codes
URL Reference
http://en.wikipedia.org/wiki/Micro-operation
http://www.vocw.edu.vn/content/m10780/lat
est/
http://en.wikipedia.org/wiki/Control_unit
Review Questions
A single micro-operation generally
involves?
A transfer between registers, transfer between
a register and an external bus, or a simple
ALU operation.