FIR filters

ELG6163
Miodrag Bolic

Outline
FIR filters

Structures
Polyphase FIR filters
Parallel polyphase FIR
Decimated FIR

Implementations of FIR filters

Sequential application specific

processor
A processor tuned only for a particular
application
Can be used for low-power
implementations
Word lengths can be adjusted to the current
problem.
Example: FIR filter
3

Direct form FIR filter

Copied from [Wanhammer99]

Transposed FIR

Copied from [Wanhammer99]

Assignment
Design an N-tap transposed linear-phase FIR
filter as a sequential application specific
processor. Use only one multiplier and show
how processing time can be decreased twice.
Hint: design a transposed FIR filter structure
as in the previous slide but allow for
generating the sums in reversed order PSN-1,
PSN-2, , PS1, y(n).
6

Copied from [Wanhammer99]

General purpose processor

architecture
FIR example
We will study RISC architectures
Single-cycle processor
Implementation of add and load instructions

Pipelined implementation
Why do all instructions have the same number
of cycles
7

Example: Digital Filtering

The basic FIR Filter equation is

y[n] h[k ].x[n k ]

Where h[k] is an array of constants

y[n]=0;

In C language

For (n=0; n<N;n++)

{
For (k = 0;k<N;k++)
//inner loop

y[n] = y[n] + h[k]*x[n-

k];}
Copied from Rony Ferzli: http://www.fulton.asu.edu/~karam/eee498/

Only Multiply
and
Accumulate
(MAC) is
needed!

MAC using General Purpose Processor (GPP)

R0

11
12
3

11
X

R1

24

R2
44

Clr

;Clear Accumulator A

Clr

; Clear Accumulator B

Mov

*R0, Y0 ; Move data from memory location 1 to register Y0

Mov

*R1,X0

; Move data from memory location 2 to register X0

Mpy

X0,Y0,
A

;X0*Y0 ->A

Add

A,B

;A + B -> B

Inc

R0

;R0 + 1 -> R0

Inc

R1

;R1 + 1 -> R1

Dec

;Dec N (initially equals to 3)

Tst

;Test for the value

Jnz

Loop

;Different than zero loop again

Copied from Rony

Ferzli:
http://www.fulton.as
u.edu/~karam/eee498/

Loop

MAC using DSP

Harvard Architecture allows multiple
memory reads
11
12
3

11

24

R2
44

2
3

Clr

;Clear Accumulator A

Rep

; Rep N times the next instruction

MAC

*(R0)+, *(R1)+, A

; Fetch the two memory locations pointed by R0 and R1, multiply

them together and add the result to A, the final result is stored back in
A

Mov

A, *R2

; Move result to memory

10
Copied from Rony Ferzli: http://www.fulton.asu.edu/~karam/eee498/

11

Copied from [DSPPrimer-Slides]