EC1503: VLSI Design

References
-S. M. Kang & Y. Leblebici, CMOS digital Integrated circuits
design and analysis, Tata McGraw Hill, 2003.
-N. Weste & D. Harris, CMOS VLSI Design, Pearson
Education.
-J. M Rabaey, Digital Integrated Circuits, Prentice Hall India,
2003.
-Douglas A Pucknell & Kamran Eshraghian, Basic VLSI
Design, Prentice Hall India, 2005.
-Wayne Wolf, Modern VLSI Design: system on Silicon,
Pearson Education, 2005

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 Syllabus
VLSI design methodologies: VLSI design flow, design hierarchy, Concepts of Regularity,
Modularity and Locality, VLSI design styles, Design Quality and Computer Aided Design.
MOS Transistor theory: Operation and characteristics, Threshold voltage, Body effect, Sub
threshold conduction, Channel length modulation, mobility variation, Tunneling, Drain punch
through and Hot electron effect
CMOS: CMOS/SOI technology, CMOS/Bulk technology, latch up in bulk CMOS and its
prevention
Principles of Digital VLSI Design using CMOS: Principles of circuit design using pass
transistors and transmission gates
Basic circuit concepts and performance estimation: Introduction, Resistance Estimation
Capacitance Estimation and switching characteristics of CMOS gates BiCMOS Logic
circuits: Bipolar junction transistor (BJT) structure and operation, Dynamic behavior of BJTs
Dynamic CMOS logic and clocking: Introduction, static CMOS design, Pseudo-NMOS
circuits, Domino CMOS structure and design, Erasable PROMs and flash memories
Chip input and output (I/O) circuits: ESD protection, Input circuits, Output circuits,
L(di/dt) noise and VLSI Packaging technology

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Introducti
on
Lecture #
1
 Outline
0 Why integrated circuits?
0 Moores Law
0 Present scenario: limitations
0 What next?
0 New metrics to map IC evolution
0 Fundamental design metrics
0 Summary

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Discrete Transistors and
Circuits
The transistor started to be used in the late 1940s
Electronic engineers began to design complex circuits
using discrete components transistors, resistors, capacitors
Performance and other problems were noticed due to
the number of separate components
Circuits were unreliable and heavy
High power consumption long time to assemble
Expensive to produce
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The Solution Integrated
Circuits
Build entire circuit on a wafer of silicon
Use masking and spraying techniques in manufacture
Pure silicon wafers made from large crystals of silicon
Areas of silicon doped with suitable elements e.g. Be
Conductive tracks made from aluminium
Use this technique to produce other components e.g.
capacitors and resistors on the same wafer

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 Problems solved
Reduced inter-device distance and interconnect lengths
faster circuits or higher speed
Lightweight circuits suitable for space travel
Cheaper assembly cost after recovery of R&D costs
Identical circuit properties better matching
Less power required less heat dissipated
Lesser area/ volume better compactness & portability
On chip interconnects higher reliability

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 Moores Law
Gordon Moore (Fairchild Semiconductors/Intel) noticed a trend in IC manufacture
Every 2 years the number of components on an area of silicon doubled, published in 1965

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 The Current Limitations:
How small can a component
become?
Circuits cannot be reduced beyond atomic size
Reliability reduces as size decreases
Lithographic techniques become more complex as the
size of components becomes smaller than the
wavelength of light
Speed of electrical signals is finite
This suggests that Moores Law will finally end

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 Lateral Thinking
We may meet the lower size limit of a transistor:
the abilities of the transistor itself will have to
improve instead
To improve the performance of devices, new
technologies are in development:
Light operated transistors
Electro-optical polymers and more are showing
new techniques for achieving the ever higher
performance demanded by industry and
consumers
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 New metrics
When Moores law is no longer valid:
how to measure trends?
Component density?
No it would be fairly constant
Performance?
Yes but which metric?
Switching rate?
Individual or bulk?
Rise time?
Access time or read/ write time?
Other measurable attributes

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 Thus
Moores law will eventually reach its inevitable
conclusion
Technology will continue to advance
ICs with improved properties will be manufactured
Another metric will need to be chosen to allow the
future trends to be mapped and predicted
The complexity of current IC design means this choice
will be difficult

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 Fundamental Design
Metrics
0 Cost
0 NRE (fixed) costs - design effort
0 RE (variable) costs - cost of parts, assembly,
test
0Functionality and Testability
0Reliability, robustness
0 Noise margins, Noise immunity
0 Performance
0 Speed (delay), Power consumption; energy
consumption
0 Time-to-market
 Cost of Integrated
Circuits
0 NRE (non-recurring engineering) costs
0 Fixed cost to produce the design
0 design effort
0 design verification effort
0 mask generation
0 Influenced by the design complexity and designer
productivity
0 More pronounced for small volume products
0 Recurring costs proportional to product volume
0 silicon processing
0 also proportional to chip area
0 assembly (packaging)
0 test
fixed cost
cost per IC = variable cost per IC + -----------------
volume
 Recurring Costs
cost of packaging cost of die + cost of die test +
variable cost =
----------------------------------------------------------------
final test yield
cost of wafer
cost of die = -----------------------------------
dies per wafer die yield
(wafer diameter/2)2 wafer diameter
dies per wafer = ----------------------------------
---------------------------
die area 2 die area

die yield = (1 + (defects per unit area die area)/)-

 Yield Example
Example
wafer size of 12 inches, die size of 2.5 cm2, 1 defects/cm2,
= 3 (measure of manufacturing process complexity)
252 dies/wafer (remember, wafers round & dies square)
die yield of 16%
252 x 16% = only 40 dies/wafer die yield !

Die cost is strong function of die area

proportional to the third or fourth power of the die area
Functionality &Testability
0 Correct functioning of system correct
functioning of chip used.
0 Thus chips should possess high testability.
0 This requires:
0 Generation of good test vectors.
0 Reliable test fixtures at speed.
0 Design of testable chips.
0 Additional circuitry for self-test to be included
more area and less speed

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 Summary
0 The number of transistors on a given area of Silicon
doubles almost every 18 months (Moores law)
0 Use of ICs have resulted in:
- Better reliability - Faster speed
- Compactness - Lesser power requirement
and portability and dissipation
0 Cost of IC includes the fixed design cost and variable
costs.
0 Functionality and testability are another important
metrics.
0 Self test circuitry is built on the chip for testing.

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 In the next lecture
0 We shall continue to study the other quality
metrics:
0 Functionality
0 Reliability and robustness
0 Performance
0 Speed
0 Power and energy consumption
0 Some other metrics
Reading Assignments: Rabaey: topic 1.2-1.3
Kang: topic 1.9
Weste: topic 10.4

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