Configuring GPIO

MSP430 GPIO Ports

GPIO = General
Purpose
Bit
Input/Output
8-bit I/O ports
1 to 12 ports, depending
on family and pin-count
Each pin is individually
controllable
Input pins can generate
interrupts
Controlled by memory-
mapped registers:
IN
P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0
OUT
DIRI/O Port 1 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
REN
 MSP430 digital I/O features

Independently programmable individual I/Os

Any combination of input or output

Individually configurable P1 and P2 interrupts. Some devices may

include additional port interrupts.

Independent input and output data registers

Individually configurable pullup or pulldown resistors

PxDIR (Pin Direction): Input or Output
P1IN.7
P1OUT.7
P1DIR.7
1

7 6 5 4 3 2 1 0
P1IN
P1OUT
P1DIR 1
PxDIR.y: 0 = input Register example:
1 = output P1DIR |= 0x80;

Each bit in each PxDIR register selects the direction of the corresponding I/O pin, regardless
of the selected function for the pin.
 GPIO Output
P1IN.7
P1OUT.7
1
1
P1DIR.7
1

7 6 5 4 3 2 1 0
P1IN x
P1OUT 1
P1DIR 1

PxOUT.y: 0 = low Register example:

1 = high P1OUT |= 0x80;
Each bit in each PxOUT register is the value to be output on the
corresponding I/O pin when the pin is configured as I/O function, output
direction.
Launchpad Pins for LEDs/Switches
Launchpad LED
F5529 G2553 FR5969
Color
Red LED
LED1 P1.0 P1.0 P4.6 (with
Jumper)
Green
LED2 P4.7 P1.6 P1.0
LED
Button 1
P2.1 P1.3 P4.5
Button 2 P1.1 P1.1
Dual role of Output Registers (PxOUT)
Each bit in each PxOUT register is the value to be output on the corresponding
I/O pin when the pin is configured as I/O function, output direction.
Bit = 0: Output is low
Bit = 1: Output is high

If the pin is configured as I/O function, input direction and the pullup or
pulldown resistor are enabled; the corresponding bit in the PxOUT register
selects pullup or pulldown.
Bit = 0: Pin is pulled down
Bit = 1: Pin is pulled up

Each bit in each PxREN register enables or disables the pull-up or

pulldown resistor of the corresponding I/O pin.
The corresponding bit in the PxOUT register selects if the pin contains a
pullup or pulldown.
Bit = 0: Pullup or pulldown resistor disabled
Bit = 1: Pullup or pulldown resistor enabled
 GPIO Input (Resistors)
P1IN.7
n
up/dow
P1OUT.7
P1DIR.7
P1REN.7 Enable resistor

6 Input
Input pins
pins are
are4held
held in
in high-impedance
3high-impedance1(Hi-Z)
(Hi-Z) state,
state, so
so


7 5 2 0
they
they can
can react
react to
to 00 or
or 11
P1IN x

When
When notnot driven,
driven, Hi-Z
Hi-Z inputs
inputs may
may float
float up/down
up/down

P1OUT 1 prevent
prevent this
this with
with pullup/pulldown
pullup/pulldown resistors
resistors
P1DIR 0
PxREN
PxREN enables
enables resistors
resistors
P1REN 1 PxOUT
PxOUT selects
selects pull-up
pull-up (1)(1) or
or -down
-down (0)
(0)

Lower
Lower cost
cost devices
devices may
may notnot provide
provide up/down
up/down resistors
resistors
for
for all
all ports
ports
 Controlling GPIO Ports

Most pins on MCUs are multiplexed to provide

you with greater flexibility which peripherals

do you want to use in your system
 Pin Flexibility
7 6 5 4 3 2 1 0
P1IN
Most
Most pins
pins on
on MCUs
MCUs areare multiplexed
multiplexed toto provide
provide
P1OUT you
you with
with greater
greater flexibility
flexibility
P1DIR
Often,
Often, two
two (or
(or more)
more) digital
digital peripherals
peripherals are
are
connected
connected to to the
the pin
pin in
in this
this case,
case, some
some families
families
P1REN
use
use PxDIR
PxDIR toto select
select between
between them,
them, while
while others
others
P1DS have
have multiple
multiple PxSEL
PxSEL registers
registers P1SEL.1
P1SEL

PxSEL = 0
IN / OUT

Peripheral
(e.g. Timer) PxSEL = 1
GPIO Summary: F5529 vs FR5969 vs G2553
PA PB PC PD
PJ*
P1
P2 P3 P4 P5 P6 P7 P8 (4-bit )

PxIN
PxOUT F55
F5529
PxDIR All FR4133 F5529 (P8 x3-bits) &
FR5969 FR4133 (P8 x12-bits) FR59
PxREN Four
(only)
PxDS Devices
PxSEL support
PxIV Ports 1 and
PxIES 2 FR5969
PxIE (only)
PxIFG

F5529/FR4133 only (80-

Each numbered port has 8 bits, unless noted otherwise
pin)
At reset, all I/O pins
FR5969 only (48-pin) are set to
*
4-bits
PJ: input shared with JTAG
pins
You should initialize all pins (to
P1:prevent floatingwith
4-bits shared inputs)
JTAG pins
G2553 only (20-pin) (G2553)
 Programming MSP430
#include "msp430.h"
volatile unsigned int i; // volatile to prevent optimization
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
P1DIR |= 0x01; // Set P1.0 to output direction
for (;;)
{
P1OUT = 0x01; // Toggle P1.0 using exclusive-OR
i = 50000; // Delay
do (i--);
while (i != 0);
}
}
 Exercise

Write a test program to toggle the leds on

the Launchpad alternately
 Programming Techniques
Set all the bits of P1OUT to 1
P1OUT = 0xFF;

On the other hand we can also take the new register full of 1s and make it
all zeros again (this will make all pins in port 1 to become LOW):

Set all the bits of P1OUT to 0

P1OUT = 0x00;
 Bit manipulation
Lets suppose P1OUT is all 0 except position 0 (bit 0), which
contains a 1, as follows:

If we want to set bit 1 of the register to 1, this would be

represented as follows in binary:

P1OUT |= 0x02;
This results in adding the 1 to position 1, while leaving
the register as it was elsewhere
 MSP430 header
MSP430 header includes the exact definitions for the bits up to 16 bits:

Consider the statement

P1OUT |= BIT0

This statement is equivalent to

P1OUT |= 0x0001;
 Some examples

Make P1.4 High(1)

P1OUT I= BIT4

Make P1.4 and P1.6 both high(1)

P1OUT I= BIT4 + BIT6

Make P3.2 Low(0)

P3OUT I= ~BIT2
 Toggle LEDs
This is convenient with elements such as LEDs since it provides a toggle
without needing to check what was the previous value.

P1OUT = BIT4; \\ Toggle P1.4

 Writing MSP430 program
Stop the Watchdog Timer
Setup the Oscillators and clocks
Setup The I/O pins.
Setup the rest of the modules to be used.
Start the application specific code
 Test
#include <msp430f5529.h>

int main(void) {
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
P4DIR |= BIT7; // Set P4.7 to output direction
P2REN |= BIT1;
P2OUT |=~ BIT1;

while(1) {
if ((P2IN & BIT1)) { // If button is open(P2.1 HIGH)
P4OUT = P4OUT | BIT7; // ... turn on LED
} // or P4OUT |= BIT7;
else {
P4OUT = P4OUT & ~BIT7;// ... else turn it off.
// or P4OUT &= ~BIT7
}
}
}

MSP430 Clocks
 What Clocks Do You Need?

Fast Clocks CPU, Communications, Burst

Processing
Low-power RTC, Remote, Battery, Energy
Harvesting
Accurate Stable over /V, Communications,
RTC, Sensors
Failsafe Robustkeeps system running in
case of failure
Cheap goes without saying

or some combination of these

features?
 MSP430 Lots of Options

Variety of osc sources on-chip (cheap, reliable) and

off-chip (accurate)
Rich selection of oscillator sources routed to internal
clocks
Many clock dividers enhance the available clock
frequencies
 MSP430 Clock Options
Typical
Name Description Used-by
Speed
MCLK Master Clock CPU Fast
SMCL Sub-Master Periphera
Fast
K Clock ls
ACLK
Auxiliary Periphera
Slow
Clocks FastClock
or ls
Slow WDT Timer RTC Serial
Clock
All MSP430 devices
ACLK
provide at least 3 SMCLK
clocks MCLK
Tune system
peripherals by
CPU ADC GPIO LCD
choice of clock:
Fast =
Performance
 Typical Clock Sources
Frequency
` V R 1 2 D

VLO ~10 KHz

ACLK

REFO 32768 Hz

LF: < 50 KHz

XT1 HF: 4-Max SMCLK
MHz

XT2 4-40 MHz

100 KHz to MCLK

DCO
CPU Max
MODOS 5 MHz MODOSC
C 5 MHz / 128
*Note: This is a general description, please refer to datasheet/UsersGuide for complete details regarding your device
 Typical Clock Sources
G2553 F552 FR41 FR59
Frequency Value- 9 33 69
line USB FRAM FRAM
VLO ~10 KHz
REFO 32768 Hz
LF: < 50 KHz
XT1 HF: 4-Max
MHz
XT2 4-40 MHz
100 KHz to
DCO
CPU Max
MODOS
C 5 MHz

(MODCL 5 MHz / 128
K)

*Note: This is a general description, please refer to datasheet

Clock Source Details (F5529)
Frequency Precision Current
Startup
/ Commen
ts
Use as Ultra
Very Low
VLO ~10 KHz 60nA Low Power
(40%)
tick
Med/High 3A Trimmed to
REFO 32768 Hz 3.5%
(3.5%) 25S
LF: < 50 KHz 75nA
Crystal or
XT1 HF: 4-Max High 500-1k Ext Clock
MHz mS
260A
Crystal or
XT2 4-40 MHz High (12MHz)
Ext Clock
400S
Calibrate
100 KHz to 60A
DCO Low/Med with
CPU Max 200nS Constant/FLL
Used by
MODOS 5 MHz
Med N/A FLASH or
C 5 MHz / 128 ADC
 MSP430 Clock Modules
MSP430
Module Clock Module Name
Device Family

BCS Basic Clock System F1xx / F2xx

BCS+ Basic Clock System + F2xx / G2xx

FLL+ Frequency Locked Loop + F4xx

UCS Unified Clock System F5xx / F6xx

CS Clock System FR5xx / FR6xx

Clock System
CS FR2xx / FR4xx
(slightly different than FR5xx/6xx version)

CCS Compact Clock System L092

 MSP430 Clock Modules
MSP430
Module Clock Module Name
Device Family

BCS Basic Clock System F1xx / F2xx

BCS+ Basic Clock System + F2xx / G2xx

FLL+ Frequency Locked Loop + F4xx

UCS Unified Clock System F5xx / F6xx

CS Clock System FR5xx / FR6xx

Clock System
CS FR2xx / FR4xx
(slightly different than FR5xx/6xx version)

CCS Compact Clock System L092

F5xx: Unified Clock System (UCS)

UCS
UCS is is available
available on
on F5xx/F6xx
F5xx/F6xx devices
devices

Six
Six independent
independent clock
clock sources
sources
Low
Low Frequency
Frequency
LF
LF XT1
XT1 32768
32768 Hz
Hz
crystal
crystal
VLO
VLO 10
10 kHz
kHz
REFO
REFO 32
32 kHz
kHz
High
High Frequency
Frequency
HF
HF XT1
XT1 44 32
32 MHz
MHz
crystal
crystal
XT2
XT2 44 32
32 MHz
MHz
crystal
crystal
DCO
DCO FLL
FLL
calibration
calibration

FLL
FLL references
references (divisible,
(divisible, too)
too)
LFXT1
LFXT1 // XT1
XT1
REFO
REFO
XT2
XT2
 Selecting various clocks
UCS module supplies
Five selectable clock sources
Three selectable clock signals
ACLK
MCLK
SMCLK