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INTRODUCTION OF

MICROPROCESSOR
Introduction
A computer is a programmable machine that
receives input, stores and manipulates data//
information, and provides output in a useful
format.
1.1 DIAGRAM OF A COMPUTER
SYSTEM
A computer is a programmable machine that receives input, stores and
manipulates data//information, and provides output in a useful format.

Diagram Of A Computer System


1.1 BLOCK DIAGRAM OF A BASIC
COMPUTER SYSTEM
Basic computer system consist of a Central processing unit (CPU),
memory (RAM and ROM), input/output (I/O) unit.

Address bus

ROM RAM I/O I/O


CPU interface devices

Data bus Control


bus

Block diagram of a basic computer system 4


BASIC COMPONENT OF
MICROCOMPUTER
1. CPU - Central Processing Unit
the portion of a computer system that carries out the
instructions of a computer program
the primary element carrying out the computer's functions.
It is the unit that reads and executes program instructions.
The data in the instruction tells the processor what to do.

Pentium D dual core processors


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2. Memory
physical devices used to store data or programs (sequences of
instructions) on a temporary or permanent basis for use in an
electronic digital computer.
Computer main memory comes in two principal varieties:
random-access memory (RAM) and read-only memory (ROM).
RAM can be read and written to anytime the CPU commands
it, but ROM is pre-loaded with data and software that never
changes, so the CPU can only read from it.
ROM is typically used to store the computer's initial start-up
instructions.
In general, the contents of RAM are erased when the power to
the computer is turned off, but ROM retains its data
indefinitely.
In a PC, the ROM contains a specialized program called the
BIOS that orchestrates loading the computer's
operating system from the hard disk drive into RAM whenever 6
the computer is turned on or reset.
3. I/O Unit

Input/output (I/O), refers to the communication between an


information processing system (such as a computer), and the
outside world possibly a human, or another information
processing system.
Inputs are the signals or data received by the system, and
outputs are the signals or data sent from it
Devices that provide input or output to the computer are
called peripherals
On a typical personal computer, peripherals include input
devices like the keyboard and mouse, and output devices such
as the display and printer. Hard disk drives, floppy disk drives
and optical disc drives serve as both input and output devices.
Computer networking is another form of I/O.
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EVOLUTION OF MICROPROCESSOR

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DATA SIZE

Nibble 4 bit

Byte 8 bit

Word 16 bit

Long word 32 bit

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FETCHING & EXECUTION CYCLES
Fetching Cycles
The fetch cycle takes the instruction required
from memory, stores it in the instruction
register, and
moves the program counter on one so that it
points to the next instruction.
Execute cycle

The actual actions which occur during the


execute cycle of an instruction.
depend on both the instruction itself and the
addressing mode specified to be used to access 10
the data that may be required.
FETCHING AN INSTRUCTION
Step 1
Instruction pointer (program counter) hold the address
of the next instruction to be fetch.

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FETCHING AN INSTRUCTION (cont.)
Step 2

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FETCHING AN INSTRUCTION (cont.)
Step 3

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FETCHING AN INSTRUCTION (cont.)
Step 4

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FETCHING AN INSTRUCTION (cont.)

Step 5

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FETCHING AN INSTRUCTION (cont.)
Step 6

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INTERNAL STRUCTURE AND BASIC
OPERATION OF MICROPROCESSOR

Address bus
ALU Register
Section
Data bus

Control and timing


section Control bus

Block diagram of a microprocessor 17


ARITHMETIC AND LOGIC UNIT
(ALU)
The component that performs the arithmetic and
logical operations
the most important components in a
microprocessor, and is typically the part of the
processor that is designed first.
able to perform the basic logical operations (AND,
OR), including the addition operation.
The inclusion of inverters on the inputs enables

the same ALU hardware to perform the


subtraction operation (adding an inverted
operand), and the operations NAND and NOR.
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CONTROL UNIT
The circuitry that controls the flow of information
through the processor, and coordinates the
activities of the other units within it.
In a way, it is the "brain within the brain", as it

controls what happens inside the processor,


which in turn controls the rest of the PC.
On a regular processor, the control unit performs

the tasks of fetching, decoding, managing


execution and then storing results.

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INTERNAL STRUCTURE OF
CONTROL UNIT

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REGISTER SETS
The register section/array consists completely of
circuitry used to temporarily store data or
program codes until they are sent to the ALU
or to the control section or to memory.

The number of registers are different for any


particular CPU and the more register a CPU have
will result in easier programming tasks.

Registers are normally measured by the number of


bits they can hold, for example, an "8-bit register"
or a "32-bit register". 21
REGISTER IN MOTOROLA 68000
MICROPROCESSOR
31 16 15 8 7 0
D0
D1
D2
D3 DATA REGISTERS
D4
D5
D6
D7
31 16 15 8 7 0
A0
A1
A2
A3 ADDRESS REGISTERS
A4
A5
A6
A7

USER STACK POINTER


A7 STACK POINTER
SUPERVISOR STACK POINTER

PC PROGRAM CONTER 22
15 8 7 0
SYSTEM BYTE USER VYTE SR STATUS REGISTER
ACCUMULATOR
a register in which intermediate arithmetic and
logic results are stored.
example for accumulator use is summing a list of
numbers.
The accumulator is initially set to zero, then each
number in turn is added to the value in the
accumulator.
Only when all numbers have been added is the result
held in the accumulator written to main memory or
to another, non-accumulator, CPU register.

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CONDITION CODE REGISTER (CCR)
an 8 bit register used to store the status of CPU,
such as carry, zero, overflow and half carry.

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Flag Name Description
Indicates that the result of a mathematical or logical operation was
Z Zero flag
zero.

Indicates that the result of an operation produced an answer greater


than the number of available bits. (This flag may also be set before a
C Carry flag
mathematical operation as an extra operand to certain instructions,
e.g. "add with carry".)

Masks the XIRQ request when set. It is set by the hardware and
X Extend flag
cleared by the software as well is set by unmaskable XIRQ.

Indicates that the result of a mathematical operation is negative. In


some processors, the N and S flags have different meanings: the S
N Negative/ Sign flag flag indicates whether a subtraction or addition has taken place,
whereas the N flag indicates whether the last operation result is
positive or negative.

Indicates that the result of an operation has overflowed according to


V Overflow Flag the CPU's word representation, similar to the carry flag but for
signed operations.

Interrupts can be enabled or disabled by respectively setting or


I interrupts clearing this flag. Modifying this flag may be restricted to programs 25
executing in supervisor mode
PROGRAM COUNTER (PC)
a 16 bit register, used to store the next
address of the operation code to be fetched
by the CPU.
Not much use in programming, but as an
indicator to user only.
Purpose of PC in a Microprocessor
to store address of tos (top of stack)
to store address of next instruction to
be executed.
count the number of instructions.
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to store base address of the stack.
INTERNAL STRUCTURE OF PC

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STACK POINTER (SP)
The stack is configured as a data structure
that grows downward from high memory
to low memory.
At any given time, the SP holds the 16-bit
address of the next free location in the
stack.
The stack acts like any other stack when
there is a subroutine call or on an
interrupt. ie. pushing the return address
on a jump, and retrieving it after the
operation is complete to come back to its 28
original location.
BUS SYSTEM
a subsystem that transfers data between
computer components inside a computer or
between computers.

4 PCI Express bus card slots (from top to bottom: x4, x16, x1 and x16),
compared to a traditional 32-bit PCI bus card slot (very bottom).

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BUS SYSTEM CONNECTION

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DATA BUS
The data bus is 'bi-directional'
data or instruction codes from memory or
input/output.are transferred into the
microprocessor
the result of an operation or computation is sent
out from the microprocessor to the memory or
input/output.
Depending on the particular microprocessor,
the data bus can handle 8 bit or 16 bit data.

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ADDRESS BUS
The address bus is 'unidirectional', over which
the microprocessor sends an address code to the
memory or input/output.
The size (width) of the address bus is specified by

the number of bits it can handle.


The more bits there are in the address bus, the
more memory locations a microprocessor can
access.
A 16 bit address bus is capable of addressing
65,536 (64K) addresses.
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CONTROL BUS
The control bus is used by the microprocessor to
send out or receive timing and control signals in
order to coordinate and regulate its operation
and to communicate with other devices, i.e.
memory or input/output.

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MICRO PROCESSOR CLOCK
Also called clock rate, the speed at which a microprocessor
executes instructions. Every computer contains an internal
clock that regulates the rate at which instructions are
executed and synchronizes all the various computer
components.
The CPU requires a fixed number of clock ticks (or clock
cycles) to execute each instruction. The faster the clock, the
more instructions the CPU can execute per second. Clock
speeds are expressed in megahertz (MHz) or gigahertz
((GHz).
Some microprocessors are superscalar, which means that
they can execute more than one instruction per clock cycle.
Like CPUs, expansion buses also have clock speeds. Ideally,
the CPU clock speed and the bus clock speed should be the
same so that neither component slows down the other. In
practice, the bus clock speed is often slower than the CPU
clock speed, which creates a bottleneck. This is why new 34
local buses, such as AGP, have been developed.
8085
The Intel 8085 is an 8-bit
An Intel 8085AH processor.
microprocessor introduced by
Intel in 1977. Produced
From 1977 to
1990s
It was binary-compatible with
Intel and
the more-famous Intel 8080 but Common
manufacturer(s)
several

required less supporting others

hardware, thus allowing simpler 3,5 and


and less expensive Max. CPU clock rate
6MHz

microcomputer systems to be
Instruction set pre x86
built.
Package(s) 40 pin DIP

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Intel 8085
INTEL 8085 PIN
CONFIGURATIO
N

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Signals and I/O Pins
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INTEL 8085 CPU BLOCK DIAGRAM

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THE 8085 AND ITS BUSES

The 8085 is an 8-bit general purpose microprocessor that


can address 64K Byte of memory.
It has 40 pins and uses +5V for power. It can run at a
maximum frequency of 3 MHz.
The pins on the chip can be grouped into 6 groups:
Address Bus.

Data Bus.

Control and Status Signals.

Power supply and frequency.

Externally Initiated Signals.

Serial I/O ports.


THE ADDRESS AND DATA BUS
SYSTEMS
The address bus has 8 signal lines A8 A15 which are
unidirectional.
The other 8 address bits are multiplexed (time shared) with
the 8 data bits.
So, the bits AD0 AD7 are bi-directional and serve as
A0 A7 and D0 D7 at the same time.
During the execution of the instruction, these lines

carry the address bits during the early part, then


during the late parts of the execution, they carry the
8 data bits.
In order to separate the address from the data, we can
use a latch to save the value before the function of the
bits changes.
THE CONTROL AND STATUS
SIGNALS
There are 4 main control and status signals. These are:
ALE: Address Latch Enable. This signal is a pulse

that become 1 when the AD0 AD7 lines have an


address on them. It becomes 0 after that. This signal
can be used to enable a latch to save the address bits
from the AD lines.
RD: Read. Active low.

WR: Write. Active low.

IO/M: This signal specifies whether the operation is a

memory operation (IO/M=0) or an I/O operation


(IO/M=1).
S1 and S0 : Status signals to specify the kind of

operation being performed. Usually not used in small


systems.
FREQUENCY CONTROL SIGNALS

There are 3 important pins in the frequency control group.


X0 and X1 are the inputs from the crystal or clock
generating circuit.
The frequency is internally divided by 2.

So, to run the microprocessor at 3 MHz, a clock

running at 6 MHz should be connected to the X0


and X1 pins.

CLK (OUT): An output clock pin to drive the clock of the


rest of the system.

We will discuss the rest of the control signals as we get to


them.
A CLOSER LOOK AT THE 8085
ARCHITECTURE

Now, lets look at some of its features with more


details.
THE ALU

In addition to the arithmetic & logic circuits, the


ALU includes an accumulator, which is a part of
every arithmetic & logic operation.

Also, the ALU includes a temporary register used


for holding data temporarily during the execution
of the operation. This temporary register is not
accessible by the programmer.
THE FLAGS REGISTER
There is also a flag register whose bits are affected by the arithmetic
& logic operations.
S-sign flag

The sign flag is set if bit D7 of the accumulator is set after an

arithmetic or logic operation.


Z-zero flag

Set if the result of the ALU operation is 0. Otherwise is reset.

This flag is affected by operations on the accumulator as well


as other registers. (DCR B).
AC-Auxiliary Carry

This flag is set when a carry is generated from bit D3 and

passed to D4 . This flag is used only internally for BCD


operations.
P-Parity flag

After an ALU operation, if the result has an even # of 1s, the

p-flag is set. Otherwise it is cleared. So, the flag can be used to


indicate even parity.
CY-carry flag

This flag is set when a carry is generated from bit D7 after an

unsigned operation.
OV-Overflow flag

This flag is set when an overflow occurs after a signed

operation.
Now, Let us see how the different units and bus
systems stay connected:
Chip Selection
A15- A10 Circuit

8085
CS
A15-A8

ALE
A9- A0 1K Byte
AD7-AD0 Latch Memory
A7- A0 Chip

WR RD IO/M D 7- D 0
RD WR
MORE ON THE 8085 MACHINE
CYCLES

The 8085 executes several types of instructions


with each requiring a different number of
operations of different types. However, the
operations can be grouped into a small set.
The three main types are:
Memory Read and Write.

I/O Read and Write.

Request Acknowledge.

These can be further divided into various


smaller operations (machine cycles).
OPCODE FETCH MACHINE CYCLE

The first step of executing any instruction is the Opcode


fetch cycle.
In this cycle, the microprocessor brings in the
instructions Opcode from memory.
To differentiate this machine cycle from the very

similar memory read cycle, the control & status


signals are set as follows:
IO/M=0, s0 and s1 are both 1.

This machine cycle has four T-states.


The 8085 uses the first 3 T-states to fetch the opcode.

T4 is used to decode and execute it.

It is also possible for an instruction to have 6 T-states in


an opcode fetch machine cycle.
MEMORY READ MACHINE CYCLE

The memory read machine cycle is exactly the


same as the opcode fetch except:
Itonly has 3 T-states
The s0 signal is set to 0 instead.
THE MEMORY READ MACHINE
CYCLE
To understand the memory read machine cycle, lets
study the execution of the following instruction:
2000H 3E
MVI A, 32
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In memory, this instruction looks like:
2001H

The first byte 3EH represents the opcode for loading a

byte into the accumulator (MVI A), the second byte is


the data to be loaded.
The 8085 needs to read these two bytes from memory before
it can execute the instruction. Therefore, it will need at
least two machine cycles.
The first machine cycle is the opcode fetch discussed

earlier.
The second machine cycle is the Memory Read Cycle.
MACHINE CYCLES VS. NUMBER OF
BYTES
IN THE INSTRUCTION
Machine cycles and instruction length, do not have a direct
relationship.
To illustrate, lets look at the machine cycles needed to
execute the following instruction.
STA 2065H 32H 2010H
This is a 3-byte instruction requiring 4 machine 65H 2011H
cycles and 13 T-states. 20H 2012H
The machine code will be stored

in memory as shown to the right


This instruction requires the following 4 machine cycles:
A Opcode fetch to fetch the opcode (32H) from location 2010H, decode it
and determine that 2 more bytes are needed (4 T-states).
A Memory read to read the low order byte of the address (65H) (3 T-states).
A Memory read to read the high order byte of the address (20H) (3 T-states).
A memory write to write the contents of the accumulator into the memory
location.
THE MEMORY WRITE OPERATION

In a memory write operation:


The 8085 places the address (2065H) on the
address bus
Identifies the operation as a memory write
(IO/M=0, s1=0, s0=1).
Places the contents of the accumulator on the
data bus and asserts the signal WR.
During the last T-state, the contents of the
data bus are saved into the memory location.
MEMORY INTERFACING

There needs to be a lot of interaction between the


microprocessor and the memory for the exchange
of information during program execution.
Memory has its requirements on control
signals and their timing.
The microprocessor has its requirements as
well.

The interfacing operation is simply the matching


of these requirements.
MEMORY STRUCTURE & ITS
REQUIREMENTS

Data Lines
ROM
RAM
Input Buffer WR

Address CS
Lines

Address CS
Lines

Output Buffer RD

Output Buffer RD
Date
Lines
Data Lines

The way of interfacing the above two chips to the


microprocessor is the same.
However, the ROM does not have a WR signal.
INTERFACING MEMORY

Accessing memory can be summarized into the following three


steps:
Select the chip.

Identify the memory register.

Enable the appropriate buffer.

Translating this to microprocessor domain:


The microprocessor places a 16-bit address on the

address bus.
Part of the address bus will select the chip and the other

part will go through the address decoder to select the


register.
The signals IO/M and RD combined indicate that a

memory read operation is in progress. The MEMR signal


can be used to enable the RD line on the memory chip.
ADDRESS DECODING

The result of address decoding is the


identification of a register for a given address.
A large part of the address bus is usually
connected directly to the address inputs of the
memory chip.
This portion is decoded internally within the
chip.
What concerns us is the other part that must
be decoded externally to select the chip.
This can be done either using logic gates or a
decoder.
PUTTING ALL OF THE CONCEPTS
TOGETHER:
BACK TO THE OVERALL
PICTURE
Chip Selection
A15- A10 Circuit

8085
CS
A15-A8

ALE
A9- A0 1K Byte
AD7-AD0 Latch Memory
A7- A0 Chip

WR RD IO/M D 7- D 0
RD WR
CONTROL AND STATUS SIGNALS.

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INTERRUPT SIGNALS
8085 p has several interrupt signals as shown in the following table.

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