FET Small-Signal

Analysis
 FETSmallSignalModel

Transconductance

TherelationshipofVGS(input)toID(output)iscalledtransconductance.

Thetransconductanceisdenotedgm. ID
gm
VGS

Transfer
Curve
GraphicalDeterminationofgm
 MathematicalDefinitionofgm

ID
gm
VGS

2IDSS VGS
gm 1
VP VP

Usingdifferentialcalculus

MaximumgmatVGS=0V: 2IDSS VGS

gm0 gm gm0 1
VP
VP

EffectofIDongmfor
VGS ID VGS ID
1 gm gm0(1 ) gm0
VP IDSS VP IDSS
 FETImpedance

InputImpedanceZi:
Zi
Verylargetoassumeinputterminal
approximateanopencircuit

OutputImpedanceZo: 1
Zo rd
yos
yos:admittanceequivalentcircuit
parameterlistedonFET
specificationsheets.

VDS
rd
ID VGS constant
FETSpecification
FETACEquivalentCircuit
 JFETFixedBiasConfiguration

Theinputisonthegateandtheoutputisonthedrain.
 JFETFixedBiasConfiguration

Onceagain:samestepasBJTtoredrawthenetworktoACequivalentcircuit.

Capacitorshortcircuit
DCbatteriesVGGandVDDaresettozerovoltsbyashortcircuit
equivalent
ACEquivalentCircuit
ACEquivalentCircuit
 Impedances

InputImpedance: OutputImpedance:

Zo RD || rd
Zi RG
Zo RD
rd 10RD
 VoltageGain

Vo
Av gm(rd || RD)
Vi

Vo
Av gmRD
Vi rd 10RD
 PhaseRelationship

ACSamplifierconfigurationhasa180degreephaseshiftbetweeninputandoutput.
 Example

Fixedbiasconfigurationhasanoperatingpointdefined
byVGSQ=2VandIDQ=5.625mA,withIDSS=10mAandVP=
8V.Thevalueofyosisprovidedas40S.Determine:
a) gm
b) Zi
c) Zo
d) AV
e) AVignoringtheeffects
ofrd
Solution
 JFETCSSelfBiasConfiguration

ThisisaCSamplifierconfigurationthereforetheinputisonthegateandtheoutputison
thedrain.
ACEquivalentCircuit
 Impedances

InputImpedance:
Zi RG
OutputImpedance:
Zo rd || RD Zo RD
rd 10RD
 VoltageGain

Av gm(rd || RD)

Av gmRD
rd 10RD
 PhaseRelationship

ACSamplifierconfigurationhasa180degreephaseshiftbetweeninputandoutput.
 JFETCSSelfBiasConfigurationUnbypassedRs

IfCsisremoved,itaffectsthegainofthecircuit.
ACEquivalentCircuit
 Impedances

InputImpedance:

OutputImpedance:
Impedances
VoltageGain
VoltageGain
Example
Solution
Solution
 JFETCSVoltageDividerConfiguration

ThisisaCSamplifierconfigurationthereforetheinputisonthegateandtheoutputison
thedrain.
ACEquivalentCircuit
 Impedances

InputImpedance: Zi R1 || R2 OutputImpedance:

Zo rd || RD
Zo RD
rd 10RD
 VoltageGain

Av gm(rd || RD)

Av gmRD
rd 10RD
 JFETSourceFollower(CommonDrain)Configuration

InaCDamplifierconfigurationtheinputisonthegate,buttheoutputisfromthesource.
ACEquivalentCircuit
 Impedances

InputImpedance: Zi RG OutputImpedance:

1
Zo rd || RS ||
gm
1
Zo RS ||
gm rd 10RS
 VoltageGain

Vo gm(rd || RS)
Av
Vi 1 gm(rd || RS)

Vo gmRS
Av
Vi 1 gmRS rd 10RS
 PhaseRelationship

ACDamplifierconfigurationhasnophaseshiftbetweeninputandoutput.
 JFETCommonGateConfiguration

Theinputisonsourceandtheoutputisonthedrain.
ACEquivalentCircuit
 Impedances

ApplyingKirchhoffsvoltagelawaroundtheoutputperimeterandKirchhoffscurrent
lawatnodea::
 Impedances

InputImpedance:

rd RD Zi RS || ( 1 )
Zi RS || gm rd 10RD
1 g mrd

OutputImpedance:

Zo RD || rd Zo RD
rd 10RD
 VoltageGain

ApplyingKirchhoffscurrentlawatnodeb::

RD
g mRD
Vo rd
Av
Vi RD
1 rd

Av gmRD
rd 10RD
 PhaseRelationship

ACGamplifierconfigurationhasnophaseshiftbetweeninputandoutput.
 DepletionTypeMOSFETs

1. DMOSFETshavesimilarACequivalentmodels.

2. TheonlydifferenceisthatVSGQcanbepositiveforn
channeldevicesandnegativeforpchanneldevices.

3. Thismeansthatgmcanbegreaterthangm0.
DMOSFETACEquivalentModel
 Find
VGSQandIDQ
Example
Determinegmandcomparetogm0
rd
FindZi,Zo,Av
 EnhancementTypeMOSFETs

TherearetwotypesofEMOSFETs:

nMOSornchannelMOSFETs
pMOSorpchannelMOSFETs
 EMOSFETACEquivalentModel

Forwardtransferadmittance

gmandrdcanbefoundinthespecificationsheetfortheFET.
EMOSFETCSDrainFeedbackConfiguration
ACEquivalentCircuit
 Impedances

InputImpedance: RF rd || RD OutputImpedance:
Zi
1 gm(rd || RD)

RF
Zo RF || rd || RD
Zi
1 gmRD RF rd || RD, rd 10RD
Zo RD
RF rd || RD, rd 10RD
 Thecalculation
From Kirchoff' s Current Law at point D,
Vo
Ii gmVGS VGS Vin
rd RD
and
Ii Vi Vo
RF
We ' ll find that,

Ii

Vi rd R D Ii gmVi
RF
rearrangin g ,
Vi 1 gmrd R D I i RF rd R D
so,
RF
Zi
1 gmRD RF rd || RD, rd 10RD
 Zo RF|| rd|| RD

Zo RD
RF rd|| RD,rd 10RD
FromKirchoff' s CurrentLawatpointD,
Vo
Ii gmVGS VGS Vin
rd RD
and
Ii Vi Vo
RF
We' ll findthat,
Vi Vo gmVGS Vo
RF rd RD
rearrangin
g,
1 1 1
Vo Vi gm
rd RD RF RF
so,
1 1
R gm R gm
Vo F F
AV gm rd RD R

Vi 1 1
F

rd RD R 1
F rd RD R
F

gmRD RF rd|| RD,rd 10R D
 The AC analysis of E-MOSFET
Therelationsh
ipbetweenoutputcurrent
and
controllin
g voltageisasbelow;
ID k VGS VGS Th
2

Weknowthatgm isdefinedby theslopeofdrain

characteristics,
ID
gm
VGS
Thederivation
ofaboveequationwilldetermine
gm
at theoperating
point;

gm
ID

d
VGS dVGS

k VGS VGS Th
2

2k VGSQ VGS Th

Remember that, the biasing arrangement are limited for E-MOSFET

 VoltageGain

Av gm(RF || rd || RD)

Av gmRD
RF rd || RD, rd 10RD
 PhaseRelationship

ThisisaCSamplifierconfigurationthereforeithas180degreephaseshiftbetweeninput
andoutput.
 Do it
Determine input and output and also AV
impedance for k=0.3X10-3
EMOSFETCSVoltageDividerConfiguration
ACEquivalentCircuit
 Impedances

InputImpedance:
Zi R1 || R2

Zo rd || RD
OutputImpedance:

Zo RD
rd 10RD
 VoltageGain

Av gm(rd || RD)

Av gmRD
rd 10RD
 Phase Relationship

This is a CS amplifier configuration therefore it has 180-degree phase shift

between input and output.
Solution
E-MOSFET CS Voltage-Divider Configuration
AC Equivalent Circuit
 Impedances

Input Impedance: Zi R1 || R2 [Formula 9.52]

Zo rd || RD
Output Impedance: [Formula
Zo RD
9.53] rd 10RD
[Formula 9.54]
 Voltage Gain

Av gm(rd || RD) [Formula 9.55]

Av gmRD [Formula 9.56]

rd 10RD
Summary Table
Summary Table
 Try yourself
Design a self-bias network that have
gain of 10. The device should be biased
at VGSQ=1/3VP
Solution
To be continued