Analog and Digital VLSI Design

EEE F313/INSTR F313

Lecture 8: MOS Operation

 MOS as a Switch
For PMOS
Assert low switch
VG (A) VT, PMOS is on, else it will be off (open circuit)
it may be written as: y x. A

For NMOS
Assert high switch
VG (A) 0, NMOS is on, else it will be off (open circuit)
it may be written as: y x. A
 MOS Capitance
A
Vg < 0 -- C
t
MOS ox

Polysilicon Gate ox

Silicon di oxide insulator

+ + + + + + + +
+ - + - + - + +
+ + - + - - + +
p body - -

Accumulation
 MOS as a Capacitor
For 0<V <V , electrons (minority) are attracted,
G T

and holes are repelled, so negative charges

are created by acceptor ions (immobile) =>
depletion region is formed

For V >V , hole density further reduces and

G T

due to the law of mass-action, electron

density now starts increasing
 IV Characteristics
Idealized model

Too many effects are neglected

In Linear region, Ids depends on

How much charge is in the channel?
How fast is the charge moving?
 MOS Current Equation

For an nMOS: I f (V ,V )
ds gs ds

Inversion charge/area: Q C (V V V ( x))

n ox gs t

Charge is carried by e-

()
=

 nMOS I-V
6
2.5
5

4
2

= 0 V <
3

2 1.5

Cut off 1
1
0
0 0.5 1 1.5 2 2.5

= V >
2 V <
Linear, Resistive

2 V >
= V >
2
Saturation
 nMOS I-V
If Vds << (Vgs -Vt )

Voltage dependent linear resistor (Vgs)

When Vds is moderately high

Voltage dependent linear resistor (Vgs, Vds)

When, Vds >= (Vgs -Vt )

Voltage dependent current source

 Non-ideal Effects
Subthreshold conduction
Ids is not zero for Vgs<Vt

Channel length modulation

Ids depends upon Vds beyond saturation

Velocity saturation
The drift velocity saturates at some electric field (Ec)
 Non Ideal Effects
Mobility Degradation
- + - +
G
S D

- - n+- -- -- -- - -- --- - -- -- -- -- -- -- - - - - - - - n+ - -
+ +
+ + p- Body + - + +
+ + - + + -
+ + + + - + - - + + + +
+ +
- -
> eff
 Non Ideal Effects
Tunneling Leakage gate current
G

n+ - - - - - - - - - - - - - -- n+
 Non Ideal Effects
Body effect

= 0 + ( + )

Vt0 threshold voltage is at the body potential

 Non Ideal Effects
Temperature Dependence
Transistor characteristics influenced by temperature
e.g. mobility, Vt

Geometry Dependence
Mismatch between assumed and actual sizes

Parasitics
 CKV

Thank You