ELECTRONICS
BASICS
LOW LOW
t0 t1 t0 t1
• Analog
– Continuous
– Can take on any values in a given range
– Very susceptible to noise
• Digital
– Discrete
– Can only take on certain values in a given range
– Can be less susceptible to noise
Advantages Over Analog
• Programmability
• Predictable accuracy
• Maintainability
• Processed more efficiently and reliably
• Compact storage
• Does not affected by noise as well as analog
values
Example
0 1 2 3 VCC
K_L0 K_L1 K_L2 K_L3
4 5 6 7
K_L4 K_L5 K_L6 K_L7
8 9 * #
K_L8 K_L9 K_L10 K_L11
DEADLOCK CONTROL D4 RELAY
1N4148 4V
B1
VCC 120V
K_L[11..0] ACTUATOR
KEY_ENCODER Q1 R1
R2
COD[3..0] C[3..0] Z BC547 12k 120V
1k
GS GS
K_L[11..0] D1
GND
ON-OFF-CONTROL
ENCODER RA
100MEG
A key-coded deadbolt
What digital electronics do you use?
• Computer
• CD & DVD players
• IPod
• Cell phone
• HDTV
• Digital cameras
What are digital electronics?
• Sound is an analog signal.
• On a CD, digital sound is
encoded as 44.1 kHz, 16 bit
audio.
– The original wave is 'sliced' 44,100
times a second - and an average
amplitude level is applied to each
sample.
– 16 bit means that a total of 65,536
different values can be assigned,
or quantized to each sample.
• DVD-Audio can be 96 or 192
kHz and up to 24 bits resolution
ADC
1
0
1.4V Analog 0
Sample and
To 1
hold 1
Digital 0
0
1
Time
Level
Serial and Parallel Data
Data can be transmitted by either serial transfer or parallel
transfer.
1 0 1 1 0 0 1 0
t0 t1 t2 t3 t 4 t5 t6 t7
Computer Modem
1
Computer Printer
0
0
t0 t1
Floyd, Digital © 2009 Pearson Education, Upper Saddle River, NJ
Serial communication between computers.
Parallel communication between a computer and a
printer.
A Computer is…
• A digital electronics device
that combine hardware and
software to accept the
input of data, process
and store the
data, and
produce some
useful output.
Digital Electronics
• Consists of numbers
representing quantities used in
arithmetic operations.
– Binary system, “Base 2”
- 1,0 (bits - binary digits)
- On/Off, Yes/No
Digital Technology Metrics
Kilo, Mega, Giga, what comes next?
Binary Digits
• The two digits in the binary system, 1 and 0, are called bits,
which is a contraction of the words binary digit.
How to represent 0 and 1?
1
ASCII
Digital Waveforms
1 1
f , T
T f
Periodic Pulse
• The duty cycle (D ) is defined as the ratio of the pulse width (tw )
to the period (T ) and can be expressed as a percentage.
tW
D 100%
T
Nonperiodic Pulse
123
1111011
= 123
Binary Numbers
• Each binary digit (called bit) is either 1 or 0
• Bits have no inherent meaning, can represent
– Unsigned and signed integers
– Characters
Most Least
– Floating-point numbers Significant Bit Significant Bit
– Images, sound, etc. 7 6 5 4 3 2 1 0
1 0 0 1 1 1 0 1
• Bit Numbering 27 26 25 24 23 22 21 20
173
7B
Integer Remainder
The quotient is divided by 2
41 until the new quotient
20 1 becomes 0
10 0
5 0
2 1
1 0
0 1 101001 answer
Converting Decimal to Binary
• To convert a fraction, keep multiplying the fractional part by
2 until it becomes 0. Collect the integer parts in forward
order
• Example: 162.375:
• So, (162.375)10 = (10100010.011)2
7 6 5 4 3 2 1 0
1 0 0 1 1 1 0 1
27 26 25 24 23 22 21 20
Some common
powers of 2
Converting Binary to Decimal
• For example, here is 1101.01 in binary:
1 1 0 1 . 0 1 Bits
23 22 21 20 2-1 2-2 Weights (in base 10)
8 + 4 + 0 + 1 + 0 + 0.25 = 13.25
(1101.01)2 = (13.25)10
Unsigned Binary Numbers
Binary and Octal Conversions
• Converting from octal to binary: Replace each octal digit with
its equivalent 3-bit binary sequence
(673.12)8 = 6 7 3 . 1 2
= 110 111 011 . 001 010
= (110111011.001010)2
261.3516 = 2 6 1 . 3 516
=0010 0110 0001 . 0011 01012
+6 = 0110 +6 = 0110
Change 1 bit Invert
-6 = 1110 +4 = 1001
+1 Increment
-6 = 1010
Why Not Sign+Magnitude?
• Complicates addition :
+3 0011 – To add, first check the signs. If they
+2 0010 agree, then add the magnitudes and
+1 0001 use the same sign; else subtract the
smaller from the larger and use the
+0 0000 sign of the larger.
-0 1000
– How do you determine which is
-1 1001 smaller/larger?
-2 1010
• Complicates comparators:
-3 1011
– Two zeroes!
Which is Greater: 1001 or 0011?
Answer: It depends!
0011
3 +3
+ Hardware +
Adder
Manipulates bit
12 patterns, not 1100 -4
numbers!
Right! Wrong!
Why 2’s Complement?
1. Just as easy to determine sign as in
+3 0011 sign+magnitude.
+2 0010
2. Almost as easy to change the sign
+1 0001 of a number.
0 0000 3. Addition can proceed w/out
-1 1111 worrying about which operand is
larger.
-2 1110
4. A single zero!
-3 1101
5. One hardware adder works for both
-4 1100
signed and unsigned operands.
Easier Hand Method
-6 = 1010
One Hardware Adder Handles Both!
(or subtractor)
9 1001 -7
3 0011 +3
+ Hardware
+
Adder
Manipulates bit
patterns, not
12 1100 -4
numbers!
Twos Complement
• Most common scheme of representing
negative numbers in computers
• Affords natural arithmetic (no special rules!)
• To represent a negative number in 2’s
complement notation…
1. Decide upon the number of bits (n)
2. Find the binary representation of the +ve value in n-
bits
3. Flip all the bits (change 1’s to 0’s and vice versa)
4. Add 1
Twos Complement Example
• Represent -5 in binary using 2’s complement
notation
1. Decide on the number of bits 6 bits(for example)
111010
4. Add 1 + 1
-5
111011
“Complementary” Notation
• Conversions between positive and negative
numbers are easy
• For binary (base 2)…
2’s C
+ve -ve
2’s C
Example
+5 0 0 0 1 0 1
1 1 1 0 1 0
2’s C
+ 1
-5 1 1 1 0 1 1
0 0 0 1 0 0
2’s C
+ 1
+5 0 0 0 1 0 1
Properties of Two's Complement
Numbers
• X plus the complement of X equals 0.
• There is one unique 0.
• Positive numbers have 0 as their leading bit (MSB);
while negatives have 1 as their MSB.
• The range for an n-bit binary number in 2’s
complement representation is:
from -2(n-1) to 2(n-1) - 1
• The complement of the complement of a number is
the original number.
• Subtraction is done by addition to the complement
of the number.
The Two’s Complement
Representation
Range of Unsigned Integers
Total no. of patterns of n bits = 2 2 2… 2
‘n’ 2’s
= 2n
If n-bits are used to represent an unsigned integer
value:
Range: 0 to 2n-1 (2n different values)
Range of Signed Integers
• Half is 2n-1.
0111 0011
7 3
• Unsigned: 0 to 2N - 1
• 2s Complement: - 2 N-1 to 2 N-1 - 1
• BCD 0 to 10 N/4 - 1
• For 32 bits:
Unsigned: 0 to 4,294,967,295
2s Complement: - 2,147,483,648 to 2,147,483,647
BCD: 0 to 99,999,999
What Values Can Be Represented in N Bits?
9,369,396,989,487,762,367,254,859,087,678
0.0000000000000000000000000318579157
Only Solution is ……..
• FLOATING POINT REPRESENTATION
23 -24
1.02 x 10 -1.673 x 10
yyyyyyy
1.xxxxx X 2
Number of ‘y’s
Number of ‘x’s determines range
determines accuracy
32 bits
Single
Precision
8 bits 23 bits
Sign
(1 bit) Exponent Significand
64 bits
Double
Precision
11 bits 52 bits
IEEE floating point format
2. Binary Subtraction
1. 1’s Complement Subtraction
2. 2’s Complement Subtraction
3. Binary Multiplication
4. Binary Division
Decimal Addition Explanation
1+1 = 210
= 102 = 0 with 1 to carry
1 + 1 + 1 = 310
= 112 = 1 with 1 to carry
Binary Addition Example 1
Col 1) Add 1 + 0 = 1
Example 1: Add Write 1
binary 110111 to 11100 Col 2) Add 1 + 0 = 1
Write 1
Col 3) Add 1 + 1 = 2 (10 in binary)
1 1 1 1 Write 0, carry 1
1 1 0 1 1 1 Col 4) Add 1+ 0 + 1 = 2
Write 0, carry 1
+ 0 1 1 1 0 0 Col 5) Add 1 + 1 + 1 = 3 (11 in binary)
1 0 1 0 0 1 1 Write 1, carry 1
Col 6) Add 1 + 1 + 0 = 2
Write 0, carry 1
Col 7) Bring down the carried 1
Write 1
Binary Addition Explanation
In the first two columns,
What is actually there were no carries.
happened when we In column 3, we add 1 + 1 = 2
carried in binary? Since 2 is equal to the base, subtract
the base from the sum and carry 1.
1 1 1 1 In column 4, we also subtract
the base from the sum and carry 1.
1 1 0
1 1 1
In column 5, we also subtract
+ 0 1 1
1 0 0 the base from the sum and carry 1.
2 3 2
2 In column 6, we also subtract
the base from the sum and carry 1.
- 2 2 2
2 .
In column 7, we just bring down the
1 0 1 0 0 1 1 carried 1
Binary Addition Verification
Example 2: Verification
Add 1111 to 111010. 1110102 5810
+ 0011112 +1510
1 1 1 1 1 7310
1 1 1 0 1 0
64 32 16 8 4 2 1
+ 0 0 1 1 1 1
1 0 0 1 0 0 1
1 0 0 1 0 0 1 = 64 + 8 +1
= 7310
BCD Addition
Add 965 and 672
0110 0110
0001 0110 0011 0111 (1637)10
Decimal Subtraction Example
Subtract binary
Verification
11100 from 110011: 1100112 5110
- 111002 - 2810
2310
1 1 0 0 1 1
- 1 1 1 0 0 64 32 16 8 4 2 1
1 0 1 1 1
1 0 1 1 1
= 16 + 4 + 2 + 1
= 2310
Binary Subtraction Example 2
Verification
Example 2: Subtract
binary 10100 from 101001 1010012 4110
- 101002 - 2010
2110
0 2 0 2
1 0 1 0 0 1 64 32 16 8 4 2 1
- 1 0 1 0 0 1 0 1 0 1
1 0 1 0 1 = 16 + 4 + 1
= 2110
1’s complement Subtraction
• Steps:
a. First find out the 1’s Complement of the subtrahend.
0111 (+7)
+ 1011 + (- 4)
1 0010
0010
+ 1
0011 (+3)
1’s complement Subtraction
• Example: 4 – 7 = ?
0100 (+4)
+ 1000 + (- 7)
1100
11100111 (-25)
00010100 ( 20)
11111011
00001010+
11111011
100000101
(a – b) = a + [2’s complement(b)]
In General ……………….
2’s Complement Subtraction
• Since the negative of any number is its two's
complement, the sum of a number and its
two's complement is always 0
+12 = 000011002
-12 = 111101002
0 000000002
Binary Multiplication
• Multiplication can’t be that hard!
– It’s just repeated addition
– If we have adders, we can do multiplication also
0 0 0 0 Partial products
1 1 0 1
1 1 0 1
+ 0 0 0 0
1 0 0 1 1 1 0 Product
• There are four partial products which are added to form the
result
Unsigned Multiplication
1 1 0 1
x 1 0 1 1
1 1 0 1 Add
1 0 0 0 1 1 1 1
Signed Multiplication
1 1 1 1 (-1)10
x 0 0 0 1 (+1)10
1 1 1 1
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0 1 1 1 1
X
(+15)10
Signed Multiplication
Sign extended
1 1 1 1 1 1 1 1 (-1)10
x 0 0 0 1 (+1)10
1 1 1 1 1 1 1 1
0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0
1 1 1 1 1 1 1 1
(-1)10
Division of Unsigned Binary Integers
Q: Divide 1 0 0 1 0 0 1 1 by 1 0 1 1
0 0 0 0 1 1 0 1 Quotient
Divisor 1 0 1 1 1 0 0 1 0 0 1 1 Dividend
1 0 1 1
Partial 0 0 1 1 1 0
Remainder 1 1 0 1 1
0 0 0 0 1 1 1 1
Partial
Remainder 2 1 0 1 1
1 0 0 Remainder
Quotient = 1 1 0 1
Remainder = 1 0 0
Module 1
1. Introduction
2. Number Systems
3. Binary Arithmetic
4. Logic Functions
5. Boolean Algebra
6. Minimization Techniques
Logic
Functions
Introductory Paragraph
• In its basic form, logic is the realm of human
reasoning that tells you a certain proposition
(declarative statement) is true if certain conditions
are true.
• The standard distinctive shape symbols for the three basic logic
operations are shown below.
Logic Gates
• A circuit that performs a specified basic logic operation is
called a logic gate.
• Logic gates form the building blocks for digital systems.
• The true/false statements mentioned earlier are represented
by a HIGH (true) and a LOW (false).
• AND & OR gates can have any number of inputs.
The AND operator
(both, all)
• fruit OR vegetables
• The truth table for the NOT gate shows input and output.
A Q
0 1
A X
1 0
0 1
1 0
Inside NOT
Transistor Gate
as a Switch
Timing analysis of an inverter gate
NOT gate application
A group of inverters can be used to form the 1’s complement of
a binary number
Binary number
1 0 0 0 1 1 0 1
0 1 1 1 0 0 1 0
1’s complement
AND gate
• The AND gate has the following symbol and truth table.
A B X
0 0 0
0 1 0
1 0 0
1 1 1
AND gate
Multiple Input AND Gate
Inside the AND gate
A B X
0 0 0
0 1 0
1 0 0
1 1 1
Timing analysis of an AND gate
A B X
0 0 0
0 1 0
1 0 0
1 1 1
Timing analysis of 3 input AND gate
Timing analysis of 3 input AND gate
AND Gate Application
The AND operation is used in computer programming as a
selective mask.
If you want to retain certain bits of a binary number but reset
the other bits to 0, you could set a mask with 1’s in the
position of the retained bits.
A B X
0 0 0
0 1 1
1 0 1
1 1 1
OR gate
Multiple Input OR Gate
Inside the OR gate
A B X
0 0 0
0 1 1
1 0 1
1 1 1
Timing analysis of OR gate
A B X
0 0 0
0 1 1
1 0 1
1 1 1
Timing analysis of OR gate
A B X
0 0 0
0 1 1
1 0 1
1 1 1
OR Gate Application
OR operation can be used in computer programming to SET / RESET
certain bits of a binary number.
Example: ASCII letters have a 1 in the bit 5 position for all lower case
letters and a 0 in this position for all upper case letters.(Bit positions
are numbered from right to left starting with 0)
OR =0 OR =1
0+0=0 0+1=1
AND =0 AND =1
1•0=0 1•1=1
Timing analysis of an AND gate
Logic analyzer display.
Using an AND gate to enable/disable a
clock oscillator.
Using an OR gate to enable/disable a
clock oscillator.
An Example: A Burglar Alarm
• This circuit shows how the
elements discussed so far could be
used to build a burglar alarm.
p q Y = NOT((p AND q) OR q)
0 0 1
0 1 0
Y 1 0 1
1 1 0
Construct the logic table for these
circuits.
What happens when you add a
NOT to an AND gate?
A B X
0 0 1
0 1 1
1 0 1
1 1 0
Symbols for 3 and 8-input NAND
gates.
Timing analysis of a NAND gate.
Timing analysis of a NAND gate.
What happens when you add a
NOT to an OR gate?
A B X
0 0 1
0 1 0
1 0 0
1 1 0
NOR gate timing analysis.
NOR gate timing analysis.
NOR Gate Application
When is the LED is ON for the circuit shown?
+5.0 V
330 W
A
B X
C
D
&
A B X
0 0 0
0 1 1
1 0 1
1 1 0
XNOR Gate
• The Symbol and Truth Table is shown below.
A B X
0 0 1
0 1 0
1 0 0
1 1 1
Logic Gates
Review
NOT Operator
Y=A
AND Operator
Y=A B
OR Operator
Y=A+B
NAND Operator
Y=A B
NOR Operator
Y=A+B
Exclusive OR (XOR) Operator
Y=A+B
Exclusive NOR (XNOR) Operator
Y=A+B
Universal Gates
• NAND Gate and NOR Gate are known as
Universal Gates.
A Q
A Q 0 1 A Q
1 0
Universal Gates
A B Q
A 0 0 0 A
Q 0 1 0 Q
B B
1 0 0
1 1 1
Universal Gates
A Q
A Q 0 1
1 0
Universal Gates
A B X
0 0 0
0 1 1
1 0 1
1 1 1
Logic Gates summary
Electronic 2 input Logic Gate ICs
Vcc 4B 4A 4Y 3B 3A 3Y Vcc 4Y 4B 4A 3Y 3B 3A
14 13 12 11 10 9 8 14 13 12 11 10 9 8
1 2 3 4 5 6 7 1 2 3 4 5 6 7
1A 1B 1Y 2A 2B 2Y GND 1Y 1A 1B 2Y 2A 2B GND
7400:Y =AB 7402:
Y =A + B
Quadruple two-input NAND gates Quadruple two-input NOR gates
Vcc 6A 6Y 5A 5Y 4A 4Y Vcc 4B 4A 4Y 3B 3A 3Y
14 13 12 11 10 9 8 14 13 12 11 10 9 8
1 2 3 4 5 6 7 1 2 3 4 5 6 7
1A 1Y 2A 2Y 3A 3Y GND 1A 1B 1Y 2A 2B 2Y GND
7404:Y =A 7408:Y =AB
Hex inverters Quadruple two-input AND gates
Electronic 2 input Logic Gate ICs
Electronic 3 input Logic Gate ICs
Vcc 1C 1Y 3C 3B 3A 3Y Vcc 2D 2C NC 2B 2A 2Y
14 13 12 11 10 9 8 14 13 12 11 10 9 8
1 2 3 4 5 6 7 1 2 3 4 5 6 7
1A 1B 2A 2B 2C 2Y GND 1A 1B NC 1C 1D 1Y GND
7410:Y =ABC 7420:Y =ABCD
Triple three-input NAND gates Dual four-input NAND gates
Electronic 8 input Logic Gate IC
Selected Key Terms
Inverter A logic circuit that inverts or complements its inputs.
AND gate A logic gate that produces a HIGH output only when all of its
inputs are HIGH.
Selected Key Terms
OR gate A logic gate that produces a HIGH output when one or more
inputs are HIGH.
NAND gate A logic gate that produces a LOW output only when all of its
inputs are HIGH.
NOR gate A logic gate that produces a LOW output when one or more
inputs are HIGH.
Exclusive-OR A logic gate that produces a HIGH output only when its two
gate inputs are at opposite levels.
Exclusive-NOR A logic gate that produces a LOW output only when its two
gate inputs are at opposite levels.
Class Question:
Basic Components
AND NAND OR NOR XOR XNOR NOT
Name and
Symbol
A out
B
Truth AB out
00 0
table 01 0
10 0
11 1
Notation A·B=out
1. The truth table for a 2-input AND gate is
a. OR gate
b. AND gate
c. NOR gate
d. XOR gate
A
5. The symbol B X is for which gate
a. OR gate
b. AND gate
c. NOR gate
d. XOR gate
6. A logic gate that produces a HIGH output only when all of
its inputs are HIGH
a. OR gate
b. AND gate
c. NOR gate
d. NAND gate
7. The expression X = A + B means
a. A OR B
b. A AND B
c. A XOR B
d. A XNOR B
8. A 2-input gate produces the output shown. (X represents
the output)
a. OR gate
b. AND gate
c. NOR gate
d. NAND gate
9. A 2-input gate produces a HIGH output only when the
inputs agree.
a. OR gate
b. AND gate
c. NOR gate
d. XNOR gate
Answers:
1. c 6. b
2. b 7. c
3. a 8. d
4. a 9. d
5. d
Logic Gate Characteristics
1. Gate Voltages and Currents
2. Fan – in
3. Fan – out
4. Propagation Delay
5. Power Requirements
6. Noise Margin or Noise Immunity
7. Speed – Power Product (SPP)
Gate Voltages and Currents
• VIH (min) – High level input voltage. The minimum level
required for a logical 1 at an input. Any voltage below
this level will not be accepted as a HIGH by the logic
circuit
• IIH – High level input current. The current that flows into
an input when a specified high level voltage is applied to
that input
• IIL – Low level input current. The current that flows into
an input when a specified low level voltage is applied to
that input
Gate Voltages and Currents
• IOH – High level output current. The current that flows
from an output when a specified high level voltage is
obtained at that output
X Y Z X Y Z X Y Z X Y Z
0 0 0 0 0 0 0 0 0 0 0 0
0 1 0 0 1 0 0 1 0 0 1 0
1 0 0 1 0 0 1 0 0 1 0 0
1 1 1 1 1 1 1 1 1 1 1 1
Boolean Theorems (2 of 7)
Single Variable - OR Function
Theorem #5 Theorem #6 Theorem #7 Theorem #8
X0 X X 1 1 XXX X X 1
X Y Z X Y Z X Y Z X Y Z
0 0 0 0 0 0 0 0 0 0 0 0
0 1 1 0 1 1 0 1 1 0 1 1
1 0 1 1 0 1 1 0 1 1 0 1
1 1 1 1 1 1 1 1 1 1 1 1
Boolean Theorems (3 of 7)
Single Variable – Invert (NOT) Function
Theorem #9
XX
X X X
0 1 0
1 0 1
Summary of Theorems (1,2 & 3 of 7)
AND Function OR Function NOT Function
Theorem #1 Theorem #5 Theorem #9
X0 0 X0 X
XX
Theorem #2 Theorem #6
X 1 X X 1 1
Theorem #3 Theorem #7
XX X XXX
Theorem #4 Theorem #8
XX 0 X X 1
Example #1: Boolean Algebra
Simplify the following Boolean expression and note the
Boolean theorem used at each step. Put the answer in SOP
form.
F1 A A B C C D
Y = AB + BC
Y = (A+B) (B+C)
Example #1: Boolean Algebra
Simplify the following Boolean expression and note the
Boolean theorem used at each step. Put the answer in SOP
form.
F1 A A B C C D
Solution
F1 A A B C C D
F1 A B C C D ; Theorem #3
F1 A B 0 D ; Theorem #4
F1 A B 0 ; Theorem #1
F1 A B ; Theorem #5
F1 A B
Example #2: Boolean Algebra
Simplify the following Boolean expression and note the
Boolean theorem used at each step. Put the answer in SOP
form.
F2 B B C B C C A B 1 A B 0
Example #2: Boolean Algebra
Simplify the following Boolean expression and note the
Boolean theorem used at each step. Put the answer in SOP
form.
F2 B B C B C C A B 1 A B 0
Solution
F2 B B C B C C A B 1 A B 0
F2 B C B C A B 1 A B 0 ; Theorem #3 (twice)
F2 BC A B 1 A B 0 ; Theorem #7
F2 BC A B A B 0 ; Theorem #2
F2 BC AB 0 ; Theorem #1
F2 BC AB ; Theorem #5
F2 B C A B
Boolean Theorems (4 of 7)
Commutative Law
X Y Y X
Boolean Theorems (4 of 7)
Commutative Law
X YY X
Boolean Theorems (5 of 7)
Associative Law
X (Y Z) (X Y) Z
Boolean Theorems (5 of 7)
Associative Law
X (Y Z) (X Y) Z
Boolean Theorems (6 of 7)
Distributive Law
X (Y Z) X Y X Z
Boolean Theorems (6 of 7)
Distributive Law
( X Y)(W Z) XW XZ YW YZ
Example #3: Boolean Algebra
Simplify the following Boolean expression and note the
Boolean theorem used at each step. Put the answer in SOP
form.
F3 R T (R S)(R T)
Example #3: Boolean Algebra
Simplify the following Boolean expression and note the
Boolean theorem used at each step. Put the answer in SOP
form.
F3 R T (R S)(R T)
Solution
F3 R T R S R T
F3 R T R R R T S R S T ; Theorem #12B
F3 R T 0 R T S R S T ; Theorem #4
F3 R T R T S R S T ; Theorem #5
F3 T R R S S R ; Theorem #12A
F3 T 1 S S R ; Theorem #8
F3 T1 S R ; Theorem #6
F3 T S R ; Theorem #2
Boolean Theorems (7 of 7)
Consensus Theorem
XXYXY XXYXY
XXYXY XXYXY
Example #4: Boolean Algebra
Simplify the following Boolean expression and note the
Boolean theorem used at each step. Put the answer in SOP
form.
F4 P S P Q S P Q S
Example #4: Boolean Algebra
Simplify the following Boolean expression and note the
Boolean theorem used at each step. Put the answer in SOP
form.
F4 P S P Q S P Q S
Solution
F4 P S P Q S P Q S
F4 P S Q S P Q S ; Theorem #12A
F4 P S Q P Q S ; Theorem #13C
F4 P S PQ P Q S ; Theorem #12A
F4 PS 1 Q P Q ; Theorem #12A
F4 PS 1 P Q ; Theorem #6
F4 PS P Q ; Theorem #2
Augustus DeMorgan
My name is Augustus DeMorgan. I’m an
Englishman born in India in 1806. I was
instrumental in the advancement of
mathematics and am best known for the logic
theorems that bear my name.
P.S. George Boolean gets WAY too much credit.
He has more theorems, but mine are WAY
Cooler!
DeMorgan’s Theorems
DeMorgan’s Theorems are two additional simplification
techniques that can be used to simplify Boolean
expressions.
Again, the simpler the Boolean expression, the simpler
the resulting logic.
DeMorgan’s Theorem #1
A B A B
Proof
A B A B
A B A B A B A B A B A B
0 0 0 1 0 0 1 1 1
0 1 0 1 0 1 1 0 1
1 0 0 1 1 0 0 1 1
1 1 1 0 1 1 0 0 0
The truth-tables are equal; therefore, the
Boolean equations must be equal.
DeMorgan’s Theorem #2
A B A B
Proof
A B A B
A B A B A B A B A B A B
0 0 0 1 0 0 1 1 1
0 1 1 0 0 1 1 0 0
1 0 1 0 1 0 0 1 0
1 1 1 0 1 1 0 0 0
The truth-tables are equal; therefore, the
Boolean equations must be equal.
DeMorgan Shortcut
BREAK THE LINE, CHANGE THE SIGN
Break the LINE over the two variables,
and change the SIGN directly under the line.
NAND = bubbled OR
8) X X 1 13D) X XY X Y
14A) XYXY DeMorgan’s
9) XX NOT
Theorem
14B) XYX Y
DeMorgan’s: Example #1
Example
Simplify the following Boolean expression and note the Boolean or
DeMorgan’s theorem used at each step. Put the answer in SOP form.
F1 ( X Y ) ( Y Z)
DeMorgan’s: Example #1
Example
Simplify the following Boolean expression and note the Boolean or
DeMorgan’s theorem used at each step. Put the answer in SOP form.
F1 ( X Y ) ( Y Z)
Solution
F1 ( X Y ) ( Y Z )
F1 ( X Y ) ( Y Z ) ; Theorem #14A
F 2 ( X Z )( XY )
F 2 ( X Z ) ( XY ) ; Theorem #14A
F 2 ( X Z ) ( XY ) ; Theorem #9
F 2 ( X Z ) ( XY ) ; Theorem #14B
F 2 ( X Z ) ( XY ) ; Theorem #9
1. Karnaugh Map
• 3 Variable K Map
• 4 Variable K Map
2 Variable Karnaugh map.
a b f (a,b)
0 0
0 1
1 0
1 1
K-map for f(a, b) = ab + ab’.
a b f (a,b)
0 0 0
0 1 0
1 0 1
1 1 1
K-map solution for f(a, b) = ab + ab’.
a b f (a,b)
0 0 0
0 1 0
1 0 1
1 1 1
K-map solution for f(a, b) = ab + ab’ + a’b’.
K-map solution for f(a, b) = ab’ + a’b.
3 Variable K Map
3 variable K-map
K-map solution for Equation
ab’c’+ab’c+abc+a’b’c+a’bc+a’bc’
K-map for Equation
f(x,y,z) = x’y’z’+x’y’z+x’yz+xy’z
K-map for Equation
f(x,y,z) = x’y’z’+x’y’z+x’yz+xy’z
Solution of Equation
f(a,b,c) = a’bc+ab’c’+abc+abc’
302
4 Variable Karnaugh map
a b c d f (a,b,c,d)
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
f(a,b,c,d) =
a’b’c’d’+a’b’cd’+abc’d’+abc’d+abcd+abcd’+ab’c’d’+ab’c’d+ab’cd+ab’cd’
a b c d f (a,b,c,d)
0 0 0 0 1
0 0 0 1 0
0 0 1 0 1
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1
K-map with don’t cares
a b c d f (a,b,c,d)
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 1
0 1 0 0 1
0 1 0 1 X
0 1 1 0 0
0 1 1 1 1
1 0 0 0 0
1 0 0 1 X
1 0 1 0 1
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 X
Representations of Boolean Functions
x y z f • Algebraic expressions
0 0 0 0 x
– f( x, y, z ) = xy+z
0 0 1 1 y z
0 1 0 0 • Tabular forms
0 1 1 1
1 0 0 0 • Venn diagrams
1 0 1 1
1 1 0 1
• Cubical representations
1 1 1 1
Cubical Representation
Cubical Representation
0-cube in cubic notation
z
01 11
10
00 10 x
0-cube by product terms
z
01 11
x z’
00 10 x
0-cube in cubic notation
z
011
111
001 101
y
010 110
000 100 x
0-cube by product terms
z 111
011
xyz
001 101
y
010 110
000 100 x
1-cube in cubic notation
z
011 111
001 101
1_0
y
010 110
000 100 x
1-cube by product terms
z
011 111
001 101
xz’
y
010 110
000 100 x
2-cube in cubic notation
z
011 111
001 101
y
010 _0_ 110
000 100 x
2-cube by product terms
z
011 111
001 101
y
010 Y’ 110
000 100 x
Cubical Representation of Minterms and
Implicants
• f1 = a’b’c’+a’b’c+ab’c+abc+abc’
• f2 = a’b’c+ab’c
Cubical representation of minterms
• f1 = a’b’c’ + a’b’c + ab’c + abc +abc’
α β γ δ
• f2 = a’b’c + ab’c
β
111
γ
β 101 β
001 001
δ
101
α 110
b
c
000
a f1 f2
Implicants
• IMPLICANT: An implicant of a function is a product term
that is included in the function.
• Quine-McClusky
(1) generate all primes
(2) find a minimum cover
Quine-McClusky
(1) generate all primes
( utilize AB+AB’=A(B+B’)=A )
f = Sm( 4, 5, 6, 8, 9, 10, 13 ) + d( 0, 7, 15 )