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Carry-select adder

It Computes two versions of the addition with

different carry inputs then selects the right one.

The carry-select adder is typically divided into

m-bit stages.

The second stage computes two values: one assuming

that the carry-in is 0 another assuming that it is 1
Carry-select structure
The carry out of previous stage is used to select
which version is correct:

Multiplexers controlled by the previous stage’s

carry-out choose the correct sum and carry-out.

This scheme speeds up the addition, once the

carry-out is available the ith stage’s delay is limited to
that of two-input multiplexer
Manchester carry chain
Which computes the sum from P and G. Two bits
of a Manchester carry chain
The storage node, which holds the complement
of the carry (Ci’) is charged to 1 during the precharge

If Gi=1 during the evaluate phase, the storage node

is discharged, producing a carry into next stage.

If Pi=1, then the ith storage node is connected to

the i-1th storage node in this case, the ith storage node
can be discharged by the Pi-1 pulldown.
Serial adder

Serial adders present an entirely different approach

to high-speed arithmetic

They required many clock cycles to add two n-bit

numbers, but with a very short cycle time.

Serial adders can work on nibbles or bytes,

0 1 1 0

Data format

A bit-serial adder
The data stream consists of three signals the two
numbers to be added and an LSB.The LSB signal
clears the carry register.

Subsequently, the two input bits added with the

carry-out of the last bit.

The serial adder is small and has a cycle time

equal to that of a signal full adder.
An ALU can perform both arithmetic and bit-wise
logic operations.

A basic ALU takes two data inputs and set of control

signals, also called an opcode.

The opcode, together with the ALU’s carry-in,

determine the ALU’s function.

For Ex:- if the ALU is set to add, then C0=0

produces a + b while C0=1 produces a + b + 1.
A three function block ALU
The ALU is built around an adder. The three
function blocks require a total of 12 opcode bits to
determine the ALU’s function.

The two function blocks at the inputs compute

signals used to drive the adder’s, P and G inputs are
not a CLA functions.

The two function blocks at the inputs compute

signals used to drive the adder’s P and G inputs,

The ALU’s output is computed by the final

function block from the adder’s carry and the
propagate signal.
A two-input function block
It takes two data inputs and their complements
along with four control signals and can compute all 16
possible functions of the two data inputs.

An ALU which implement only addition,

subtraction, and one or two bit-wise functions can
usually be implanted using static gates.