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  • Introduction To ASIC

    Diunggah oleh

    Supriyo Srimani
    11 tayangan16 halaman
    1) ASICs have evolved from single transistors to chips with millions of transistors due to increasing levels of integration from SSI to VLSI to ULSI. 2) There are different types of ASIC designs including FPGA, gate array, standard cell based, full custom, and semi custom depending on factors like application, cost, performance, and production volume. 3) Common programmable logic devices include ROM, PAL, PLA, and FPGA which provide flexibility but have lower performance than ASIC designs.

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    asic design flow

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    Introduction to ASIC

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    1) ASICs have evolved from single transistors to chips with millions of transistors due to increasing levels of integration from SSI to VLSI to ULSI. 2) There are different types of ASIC designs including FPGA, gate array, standard cell based, full custom, and semi custom depending on factors like application, cost, performance, and production volume. 3) Common programmable logic devices include ROM, PAL, PLA, and FPGA which provide flexibility but have lower performance than ASIC designs.

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    © All Rights Reserved
    Unduh sebagai PPT, PDF, TXT atau baca online dari Scribd
    Tandai sebagai konten tidak pantas
    11 tayangan16 halaman

    Introduction To ASIC

    Diunggah oleh

    Supriyo Srimani
    1) ASICs have evolved from single transistors to chips with millions of transistors due to increasing levels of integration from SSI to VLSI to ULSI. 2) There are different types of ASIC designs including FPGA, gate array, standard cell based, full custom, and semi custom depending on factors like application, cost, performance, and production volume. 3) Common programmable logic devices include ROM, PAL, PLA, and FPGA which provide flexibility but have lower performance than ASIC designs.

    Hak Cipta:

    © All Rights Reserved
    Unduh sebagai PPT, PDF, TXT atau baca online dari Scribd
    Tandai sebagai konten tidak pantas
    dari 16

    Introduction to ASICs

    Module: 1
    Evolution of VLSI
    Evolution of integration level in Integrated Circuits

    Year Era No. of transistors/gates on


    a single chip
    1958 Single transistor 1

    1960 Monolithic IC 1-2

    1962 Multi-function 2 – 10

    1964 Small Scale Integration (SSI) 10 – 100

    1967 Medium Scale Integration (MSI) 100 – 1000

    1972 Large Scale Integration (LSI) 1000 - 10,000

    1978 Very Large Scale Integration 10,000 - 1,00,000


    (VLSI)
    1989 Ultra Large Scale Integration 1,00,000 - 10,00,000
    (ULSI)
    Level of integration for Intel microprocessors
    Types of Integrated Circuits

    Classifications of Integrated Circuits


    Based on types Based on types Based on the types of Based on the
    of substrates of devices signals such as analog, applications
    digital, mixed & RF
    Digital IC: these ICs are TTL-equivalent ICs at SSI,
    Silicon Bi-polar operated with only digital MSI & LSI levels. e,g;
    signals memory, micro-
    processors
    Appl. Specific Standard
    Ga-As CMOS Analog IC Products (ASSP). e.g; a
    chip for PC, Modem.
    ASIC. e,g; a chip for
    Si-Ge Bi-CMOS Mixed-signal IC mobile phone, satellite,
    soft-toys, etc.

    Si-Ge MESFET RF IC ASIC. e,g; a chip for


    radar.
    Types of ASICs

    Depending on the application, cost of production, performance & volume


    of production, there are different types of ASIC are followed to implement
    on a chip:

    » FPGA Design
    » Gate Array (GA) Design
    » Standard Cell Based Design
    » Full Custom Design
    » Semi Custom Design
    » PLD Design
    FPGA Design

    Merit – It provides a
    Means for fast proto-
    Typing and also for cost
    Effective chip-design,
    especially for low-volume
    Applications.

    • Typical design time:


    Few hours to a couple of
    days.
    Detailed view of Switch Matrices & Interconnection Routing
    between CLBs
    Gate Array (GA) Design

    GA architectures: i) Channeled ii) Channel – less iii) Structured

    • In GA architecture transistors are fabricated on the silicon wafer, but the


    inter-connections are not fabricated.

    • The metal musk layers are customized to define inter-connections between


    the transistors.

    • GA design time typically varies from a few days to few weeks. Ranked after
    FPGA design.
    Standard Cell-based Design
    Full Custom & Semi Custom Design
    • As the full-custom design starts from the scratch, all the chips are
    highly optimized for area, power and delay. Hence the full-custom
    design is always superior to any other design styles.
    • Merit: Used for high performance and high volume products. But
    typical design style is higher compared to other designs.

    • In semi-custom design, only few cells are designed from beginning,


    which are not available in the std. cell library.
    • Merit: Faster compared to full-custom design, but slower than std.
    cell based design.
    • Performance wise: It is superior to std. cell based design, but inferior
    to the full-custom design.
    ASIC Design
    Flow & Automation
    PLD Design

    Read Only Memory (ROM)

    An 8 X 4 ROM architecture
    PLD Design (contd.)

    Programmable Array Logic (PAL)

    Block diagram of PAL architecture


    PLD Design (contd.)

    Programmable Logic Array (PLA)

    Block diagram of PLA architecture


    Comparison of Design Styles

    Full- Std. cell- Gate array FPGA


    custom based
    Area Small Small to Moderate Large
    moderate
    Performance High High to Moderate Low
    moderate

    Fabrication All All Metal layers None


    layers

    Design time High High to Moderate Low


    moderate

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