PIC Microcontroller

Dr.Narayana Swamy R
Professor, Dept. of Electronics and Communication Engineering, SET-JU
A Brief history of the PIC Microcontroller
• In 1989, Microchip Technology corporation introduced an 8-bit microcontroller called PIC,
which stands for Peripheral Interface Controller.
• This Microcontroller had
• small amounts of data RAM,
• a few hundred bytes of on-chip ROM for the program,
• one timer, and
• a few pins for I/O ports,
• all on a single chip with only 8 pins
• Microchip is the number one supplier of 8-bit microcontrollers in the world.
• Since the introduction of the PIC16xxx, they have introduced an array of 8-bit microcontrollers too
numerous to list here. They include the PIC families of 10xxx, 12xxx, 14xxx, 16xxx, 17xxx, and
18xxx.
• They are all 8-bit processors, meaning that the CPU can work on only 8 bits of data at a time.
Simplified View of a PIC Microcontroller
• One of the problems with the PIC family is that they are not all 100% upwardly compatible in
terms of software when going from one family to another family.
• For example, while the 12xxx/16xxx has 12-bit and 14-bit wide instructions, the PICI8xxx
instruction is 16 bits wide with many new instructions. To run programs written for the PIC12xxx
on a PIC18, we must recompile the program and possibly change some register locations
before loading it into the PIC18.
• PIC18xxx family has the highest performance of all the families of 8-bit PIC microcontrollers.
• The fact that PIC18xxx is available in 18- to 80-pin packages makes it an ideal choice for new
designs because it allows an easy migration to more powerful versions of the chip without losing
software compatibility. At this time, no 8-pin version of the PIC18xxx exists, and that is the main
reason to choose other family members of the 10xxx-16xxx if your design calls for a small
package.
PIC18 Features
• 8 bit CPU architecture/instruction set
• RISC architecture
• Harvard architecture
• Little endian architecture
• On chip Program memory (Code) ROM, addressing up to 2M
• Not all come with 2M, ROM Size can vary from 4K to 128K
• Different types - Flash (Version F),few seconds to erase and reprogram, prototype
- OTP (Version C), Mass production
- Masked, during fabrication of PIC18, cheaper
• Code is compatible with each other (different families of PIC18)
• Data RAM, addressing to 4Kbytes
• Not all come with 4K, RAM Size can vary from 256 bytes to 4096 bytes
• Two Components, GPR (size is multiple of 256 bytes) and SFR (size is fixed)
• 256 bytes of additional EEPROM (Data)
• Store critical data (does not change)
• Up to 10 MIPs operation
• DC - 40 MHz operating frequency
• 16-bit wide instructions, 8-bit wide data path
• High current sink/source 25 mA/25 mA
• Three external interrupt pins-Priority levels for interrupts
• Timer0 module,Timer1 module,Timer2 module,Timer3 module
• 3-wire SPI (supports all 4 SPI modes)
• I2C Master and Slave mode
• 10-bit Analog-to-Digital Converter module (ADC)
• Addressable USART/UART module
• CAN protocol module
• Supports RS-485 and RS-232
• Parallel Slave Port (PSP) module
• 5 -IO Ports- PORTA, PORTB,PORTC,PORTD,PORTE
• PIC 18 has dedicated 16 to 72 I/O pins (18pins and 80 pins package)
• Programmable Brown-out Reset (BOR)
• Power-on Reset (POR),
• Watchdog Timer (WDT) with its own On-Chip RC
• Oscillator
• Programmable code protection
• Power saving SLEEP mode
• In-Circuit Serial Programming (ICSP) via two pins
• In-Circuit Debug (ICD) via two pins
WREG Register
• In CPU Registers are used to store information temporarily,
information can be data to be processed, or an address pointing to
the data to be fetched.
• In PIC registers are 8-bit registers (D7-MSB, DO-LSB)

• In PIC there is only one data type: 8bit

• WREG (working register) is most widely used register and is same as
accumulator in other microprocessors.it is used for all arithmetic and
logic operations.
PIC File Register
• Data memory space in PIC is read/write (Static RAM) memory, it is
also called as file register.
• File register is used by CPU as data storage, scratch pad, and
registers for internal use and functions (arithmetic and logic
operations).
• File register data RAM in pic is divided into two sections
• GP RAM
• SFRs
• Size varies from 32bytes to several thousand bytes depending on the
chip.
Assembly Language Programming
• Structure of assembly language
Assembling and Linking a PIC Program
Program Counter and Program ROM Space
RISC Architecture
• Feature 1: Fixed length instruction- 2 to 4bytes
• Feature 2: Large number of registers – 32 registers
• Feature 3: Small Instruction set – 75 instructions
• Feature 4: One Clock Cycle – 95% of instructions and 5% in 2 clock cycle
• Feature 5: Separate bus for data and code
• Feature 6: Instructions are hardwired – 10% transistors
• Feature 7: Load/store architecture
IMMEDIATE AND DIRECT ADDRESSING MODES
PIC18 Interrupts
• Interrupt vs polling
• A single microcontroller can serve several devices.
• There are two methods by which devices receive service from microcontroller: interrupts or
polling

Polling Interrupts
BASIS FOR COMPARISON INTERRUPT POLLING
Basic Device notify CPU that it needs CPU CPU constantly checks device status
attention. whether it needs CPU's attention.
Mechanism An interrupt is a hardware mechanism. Polling is a Protocol.

Servicing Interrupt Service Routine/handler services CPU services the device.

the Device.
Indication Interrupt-request line indicates that device Comand-ready bit indicates the device
needs servicing. needs servicing.
CPU CPU is disturbed only when a device needs CPU has to wait and check whether a
servicing, which saves CPU cycles. device needs servicing which wastes
lots of CPU cycles.
Occurrence An interrupt can occur at any time. CPU polls the devices at regular
interval.
Efficiency Interrupt becomes inefficient when devices Polling becomes inefficient when CPU
keep on interrupting the CPU repeatedly. rarely finds a device ready for service.

Example Let the bell ring then open the door to check Constantly keep on opening the door
who has come. to check whether anybody has come.
• Interrupt Service Routine
• For every interrupt, there must be an ISR or handler,
• For every interrupt there is a fixed location in memory that holds the
address of its ISR
• Interrupt vector table holds the address of ISRs, only two locations 0008 and
0018
• There are limited number of bytes is set aside for high priority
interrupts, for example a total of 8bytes (0008 to 0017H) and (0 to
7H) for reset.
• Normally service routines for an interrupt is too long to fit in the
memory space allocated.
• GOTO Instruction is placed in the vector table to point to the address
of the ISR. The rest of the bytes allocated to the interrupt are unused.