S O R I N G

E S F A C
R O C E R
O P I N T
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I C G AN 2 D
63 M
C 2 M IN t ur e
ES GRAM Lec
PR O

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 Last Lecture
 Evolution of Computers and Microprocessors
 Moore's Law

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 Today's Lecture
 Instruction Set Architecture
 Overview of a Microprocessor
 Design Example

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 The Personal Computer
Speaker

Processor
Timer (8086 Coprocessor
logic through (8087 through System 640KB
(8253) Pentium 80387 ROM DRAM

System bus (data, address & control signals)

Keyboard DMA Expansion Interrupt

logic (8253) Controller logic logic (8259)
(8237)
Video card
Disk controller
Serial port
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Keyboard ES C263 Microprocessor
... Programming 4
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Extension slots
 Instruction Set
Architecture (ISA)
 ISA refers to the actual set of programmer visible
instruction set.
 Serves as a boundary between the hardware and
software.

Seven dimensions of ISA
 Class of ISA: general purpose register
architectures, where operands are either
memory or register locations.

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• Memory Addressing: Byte addressing to access
memory locations.
• Addressing Modes: specify the address of
register, constant operands and memory
objects-- register, immediate, displacement.

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• Types and sizes of operands: supports operand sizes of 8
bit, 16 bit, 32 bit.
• Operations: data transfer, arithmetic, logic, control.
• Control flow instructions: support conditonal branches,
unconditional jumps, procedure calls and returns.
• Encoding an ISA: fixed length or variable length.

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 Memory Overview

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 RAM

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Evolution of
programming:
machine language
late 40’s / early 50’s:
programmers coded directly
in machine language
 each machine had its
own set of instructions
(sequences of 0's & 1's)
corresponding to its
underlying hardware
 extremely tedious,
error-prone
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101000000000000000000000000000000000000000000001010000000000000001
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001110010011101000110000101100010000000000010111001110100011001010
111100001110100000000000010111001110010011011110110010001100001011
101000110000100000000001011100111001101111001011011010111010001100
001011000100000000000101110011100110111010001110010011101000110000
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111010001100101011110000111010000000000001011100110001101101111011
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11
 Microprocessor
-Fetches Instruction

-Executes Instruction

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 Computer Hardware Organization
Example: 3 Instructions of a program
• Input Value from port 05
• Add 7 to this value
• Output the result to port 02

Control
unit common bus

Arithmetic
logic
unit

memory
output input
Registers program data
storage storage unit unit

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 Add
Bus

Data
CPU Bus

Control
signals

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 Add Bus

Data Bus
Memory

Read

Write

Memory – Registers to hold bits

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 Ex :
4 bits

8 Registers

Add lines : 3 (Unidirectional)

Data lines : 4 ES
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 Design Example

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 Design a microprocessor based system to
control pH of a solution in a reactor tank.

– User enters desired pH (0-14) and controller

gain
– Reactor tank provided with three pH
sensors, to compute the average pH.
– Reactor tank has three inputs.
• (acid, base flow controlled by valves,
effluent discharged from factory)

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Valve Control

-Controlled by stepper motors

-1 step is by 1.8 degrees rotation

Valve opening = kP * error

Where error = desired pH – measured pH.

Error positive- close fully acid valve and open

base valve accordingly

Error negative- close fully base valve and open acid valve
accordingly.
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0 – 360 degrees correspond to 0 to 200 steps.
and Interfacing
 Parallel Serial
I/O I/O

CPU Memory I/O

Interface
Data

Address

Control

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 Stepper Motor sequence:

A B C D

1 0 1 0
0 1 1 0
0 1 0 1
1 0 0 1
1 0 1 0
CW ACW

Use a 4- bit port + driver (nearly 1 A current)

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 pH sensor
Vout

0 pH
7 14

Voltage output 60mV/pH

-420mV - +420mV

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 Interfacing Analog to Digital Converter

8-bit ADC
I0
D0
I7
D7
Start
A
EOC
B
C OE
ALE
ADC 0809
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 Input Keys

- Numeric keys 0 – 9

- Function keys
pH, kP, enter

Matrix Keypad interfacing!!

- 2 four bit ports.

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 Two digit Display
Two seven segment display
devices to display pH

Memory Interfacing
ROM (4K) - FF000H – FFFFFH

- SRAM (4K) - 00000H – 00FFFH

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 Method of Approach

Identify input and output devices

Memory requirements
Suitable memory and I/O interfacing
ALP
-Assumptions made
-ALP

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