Intel Core 2 Duo

Desktop Processor Architecture

Submitted by:Hardeep Singh Bca 3rd Roll no 1327 Pupin 18909000261

Submitted To:Prof Manpreet Kaur

Whats next?
History Intel Core 2 Duo Intel Core 2 Microarchitecture Intel Core 2 Models What is an instruction set? What is L1 and L2? Intel Advanced Smart Cache
Intel Advanced Digital Media Boost

History
(List of Intel microprocessors)
The 4-bit processors 4004, 4040 The 8-bit processors 8008, 8080, 8085 The 16-bit processors: Origin of x86 8086, 8088, 80186, 80188, 80286 The 32-bit processors: Non x86 iAPX 432, 80960, 80860, XScale The 32-bit processors: The 80386 Range 80386DX, 80386SX, 80376, 80386SL, 80386EX The 32-bit processors: The 80486 Range 80486DX, 80486SX, 80486DX2, 80486SL, 80486DX4 The 32-bit processors: The Pentium (I) Pentium, Pentium MMX The 32-bit processors: P6/Pentium M Pentium Pro, Pentium II, Celeron, Pentium III, PII and III Xeon Celeron(PIII), Pentium M, Celeron M, Intel Core, Dual Core Xeon LV The 32-bit processors: NetBurst microarchitecture Pentium 4, Xeon, Pentium 4 EE The 64-bit processors: IA-64 Itanium, Itanium 2 The 64-bit processors: EM64T-NetBurst Pentium D, Pentium Extreme Edition, Xeon The 64-bit processors: EM64T- Core microarchitecture Xeon, Intel Core 2

Intel Core 2 Duo

Intel Core 2 Microarchitecture

Woodcrest Intel Wide Dynamic Execution Intel Intelligent Power Capability Intel Advanced Smart Cache Intel Smart Memory Access Intel Advanced Digital Media Boost

Server Optimized
Conroe

Desktop Optimized

65nm
Merom

Mobile Optimized

Intel Core 2 models

Allendale, Conroe
    
- 65 nm process technology

Desktop CPU Introduced on July 27, 2006 Number of Transistors 291 Million on 4 MB Models Number of Transistors 167 Million on 2 MB Models Variants
Core Core Core Core Core 2 2 2 2 2 Duo Duo Duo Duo Duo E6700 E6600 E6400 E6300 E4200 2.67 2.40 2.13 1.86 1.60 GHz GHz GHz GHz GHz (4 (4 (2 (2 (2 MB MB MB MB MB L2, L2, L2, L2, L2, 1066 MHz ) 1066 MHz ) 1066 MHz ) 1066 MHz ) 800 MHz )

Intel Core 2 models

Woodcrest
   
- 65 nm process technology

Server optimized CPU Introduced on July 26, 2006 Same features as Conroe Variants

Xeon Xeon Xeon Xeon Xeon Xeon Xeon

5160 - 3.00 GHz (4 MB L2, 1333 MHz , 80 W) 5150 - 2.66 GHz (4 MB L2, 1333 MHz , 65 W) 5140 - 2.33 GHz (4 MB L2, 1333 MHz , 65 W) 5130 - 2.00 GHz (4 MB L2, 1333 MHz , 65 W) 5120 - 1.86 GHz (4 MB L2, 1066 MHz , 65 W) 5110 - 1.60 GHz (4 MB L2, 1066 MHz , 65 W) 5148LV - 2.33 GHz (4 MB L2,1333 MHz ,40 W)

Intel Core 2 models

Merom - 65 nm process technology
    Mobile CPU Introduced on July 27, 2006 Same features as Conroe Variants

Core Core Core Core Core Core

2 2 2 2 2 2

Duo Duo Duo Duo Duo Duo

T7600 T7400 T7200 T5600 T5500 T5200

2.33 2.16 2.00 1.83 1.66 1.60

GHz GHz GHz GHz GHz GHz

(4 (4 (4 (2 (2 (2

MB MB MB MB MB MB

L2, L2, L2, L2, L2, L2,

667 667 667 667 667 533

MHz MHz MHz MHz MHz MHz

) ) ) ) ) )

What is an instruction set?

All instructions, and all their variations, that a processor can execute Types:
   Arithmetic such as add and subtract Logic instructions such as and, or, and not Data instructions such as move, input, output, load, and store

Part of the computer architecture Distinguished from the microarchitecture Different microarchitectures can share common instruction set while their internal designs differ
Fetch Decode Operand Fetch Execute Retire

What is L1 and L2?

Level-1 and Level-2 caches The cache memories in a computer Much faster than RAM L1 is built on the microprocessor chi itself. L2 is a seperate chip L2 cache is much larger than L1 cache

Intel Advanced Smart Cache

Decreased traffic

Higher cache hit rate Reduced bus traffic Lower latency to data

Advantage
Increased traffic

L2 cache is shared equally Optimizes cache resource Up to 100% utilization of L2 cache

Intel Advanced Digital Media Boost

Lower 64 bit in one cycle, upper in the next

Intel Advanced Digital Media Boost

128 bit instruction completed in one cycle

THANKS