Bahan Kuliah

Devais Mikro Elektronika

Pertemuan ke 2

KARAKTERISTIK
JFET & MOSFET
Oleh
Sigit Priyambodo, S.T., M.T
Jurusan Teknik Elektro
IST AKPRIND
2015
1

Jenis-jenis FET

JFET (Junction FET)

MOSFET (Metal Oxide Silikon FET)
PMOS ( MOS saluran P)
NMOS (MOS saluran N)

Masih banyak lagi

ID

FET
VDS

FET
Parameter FET : ID, VGS, VDS.

VGS

Dasar pemikiran FET:

IS

Ada arus ID = IS yang mengalir melalui

saluran, yang besarnya saluran dikendalikan
oleh tegangan VGS.
Karena arus lewat saluran (yang berupa
hambatan) maka ada tegangan VDS.
3

Junction FETs

JFET saluran N
5

aerah deplesi membesar dengan bertambahnya tegangan ba

6

Saluran N

10

11

Arus Drain current vs tegangan drain-ke-source

(tegangan gate-source = 0)
12

n-Channel FET for vGS = 0.

13

Typical drain characteristics of an n-channel JFET.

14

If vDG exceeds the breakdown voltage VB,

drain current increases rapidly.

15

16

KURVA KARAKTERISTIK Junction FET

Hubungan
VGS dan ID

I D k VGS VP
k

: konstanta

VP : tegangan pinch-off atau threshold.

Arus dibatasi hanya saat tegangan VGS = 0

17

Junction FET Sumber Arus

VDD
RLoad

RS
Kurva tak dipengaruhi tegangan VDS.
Arus hanya dipengaruhi VGS bukan VDS.
RS membuat VGS selalu negatip.
Misalnya RS = 4K, VGS = -4 V.
Arus di Rload = 1 mA.

18

KURVA VDS-ID Junction FET

Linear

Ada dua daerah operasi

:

Saturation

saturation
linear.
Linear
Saturation

I D k VGS VP
2

VDS
I D 2k VGS VP VDS

19

JFET - variable resistor

VDD

RD
VGS

RG

For low values of VDS the

slopes, change from
a resistance
(~5v/2.7mA~1.9k) to
a resistance
(5v/10mA~0.5k).

A resistance is
controlled by an
input voltage.

VDS, DRAIN-SOURCE
VOLTAGE, (Volts)

This makes it possible to have an element

in a circuit that can be electronically
adjusted.

20

JFET - variable resistor (2)

VDD

Now lets analyze the circuit. In the linear region

we had a relationship between ID and VDS.

RD
VGS

RG

I D 2k VGS VT VDS

VDS

To find the effective resistance this is the voltage

across the channel divided by the current through
the channel.

1
ID
VDS

2k VGS VT

RDS VDS
2

If it wasnt for the last term, we would have a value of 1/RDS that was
proportional to VGS, the control voltage and didnt depend on VDS
(remember VT is a constant of the FET, the pinch off voltage). This is like
a resistor, and it forms a VOLTAGE DIVIDER with RD.
21

n-Channel depletion MOSFET.

22

n-Channel enhancement MOSFET

showing channel length L and channel width W.

23

n-Channel depletion MOSFET

showing channel length L and channel width W.

24

enhancement-mode n-channel MOSFET

25

v < Vto pn junction antara drain dan body

reverse biased iD=0.

GS

26

Terbentuk saluran N

v < Vto pn junction antara drain dan body

reverse biased iD=0.

GS

27

For vGS < Vto the pn junction between drain and body
is reverse biased and iD=0.
28

vGS >Vto terbentuk saluran n.

vGS bertambah saluran membesar.
vDS kecil ,I D sebanding dengan vDS.
resistor tergantung nilai vGS.

29

vDS bertambah, saluran mengecil di drain dan

Laju pertambahan iD : melambat

Saat vDS> vGS -Vto, iD tetap

30

Threshold Voltage
Vto (VP)

31

Kurva karakteristik transistor NMOS

32

Drain characteristics

33

Rangkaian penguat sederhana menggunakan NMOS .

34

Drain characteristics and load line

35

vDS versus time.

36

37

Graphical solution
38

39

The more nearly horizontal bias line results in less change in the Q-point.
40

Sinyal campuran
41

Rangkaian Ekivalen FET

42

Rangkaian ekivalen FET ( iD terpengaruh vDS)

43

Penentuan gm dan rd

44

Common-source amplifier.
45

Rangkaian Ekivalen Common-Source amplifier.

46

Common-source amplifier dengan nilai R

47

vo(t) dan vin(t) versus time

48

Gain magnitude versus frequency

49

Source follower.
50

Rangkaian Ekivalen Source Follower.

51

Common-gate amplifier.
52

n-Channel depletion MOSFET.

53

Drain current versus vGS in the saturation region

for n-channel devices.
54

p-Channel FET circuit symbols.

Sama = n-channel devices,
kecuali arah panah

55

MOSFET-switch
VDD
RLOAD
RG
VGS

IRF510

Power MOSFET dapat dialiri arus

besar sampai 75 A, dan daya 150 W.
Saat ON punya hambatan sekitar 10
Ohm.
Contoh : IRF510
Mempunyai arus maksimum 5,6 A
dab hambatan saat ON 0,4 Ohm. 56

Note the
log scale!

MOSFET-switch (2)
Kurva ID vs. VGS.
Ideal saklar:
ON

saat OFF Arus =0.

Dari kuva terlihat :
Tegangan VGS
< 3 volt, ID = 0

OFF

>5V

arus besar.

57

PMOS
In this device the gate controls hole
flow from source to drain.

source

It is made in n-type silicon.

|VGS |>|Vt |
+
gate

source

drain

n-type Si

P-MOS

gate

drain
p

n-type Si

What if we apply a big negative

voltage on the gate?
If |VGS |>|Vt | (both negative)
then we induce a + charge on
the surface (holes)
58

NMOS and PMOS Compared

NMOS
Body
p-type
Source n-type
Drain
n-type
VGS
positive
VT
positive
VDS
positive
ID
positive (into drain)
G
S
D
ID
n
n
p
ID

ID

VGS=3V

1 mA

(for IDS =
1mA)
2

VGS= 3V

1 mA

(for IDS =
-1mA)

VGS=0
1

PMOS
Body
n-type
Source p-type
Drain
p-type
VGS
negative
VT
negative
VDS
negative
ID
negative (into drain)
G
S
D
ID
p
n
B

VGS=0

VDS
1

VDS

59

CIRCUIT SYMBOLS
D
G

D
G

NMOS circuit symbol

PMOS circuit symbol

A small circle is drawn at the gate

to remind us that the polarities are
reversed for PMOS.

60

PMOS Transistor Switch Model

Operation compared to NMOS: It is complementary.

VDD

VDD

S
G

VDD

VG =0

VG = VDD

V=0
D

Switch OPEN

Switch CLOSED

For PMOS for the normal circuit connection is to connect

S to VDD (The function of the device is a pull up)

Switch is closed: Drain (D) is connected to Source (S) when VG =0

Switch is open :

Drain (D) is disconnected from Source (S) when VG = VDD

61